xlli_lowlev_mac.mac

pxa270的bootloader,linux下的,好不容易搞到的

@*********************************************************************************
@
@        COPYRIGHT (c) 2002 Intel Corporation
@
@   The information in this file is furnished for informational use only,
@   is subject to change without notice, and should not be construed as
@   a commitment by Intel Corporation. Intel Corporation assumes no
@   responsibility or liability for any errors or inaccuracies that may appear
@   in this document or any software that may be provided in association with
@   this document.
@
@*********************************************************************************
@
@                                 xlli_LowLev_mac.mac
@                          MainStone Platform Low Level Macros
@
@ Copyright (c) 2002 by Intel Corp. Hudson MA
@
@ List of macros in this file:
@
@
@ xlli_mapSECTIONS   (Macro) Generates page table entries for MMU
@
@*********************************************************************************

@      This macro will map a region using 1MB sections
@      Notes: 
@             1)You must call xlli_initPageTable before this macro is valid.
@             2) This version of the macro is used when NAMED values are passed to the macro
    
    .macro    xlli_mapSECTIONS  w1,w2,w3,w4,size,virtual,physical,access,Level1tab
    
@       $size      = size of region to be mapped
@       $virtual   = starting virtual address of region
@       $physical  = starting physical address of region
@       $access    = access bits for this region
@       $tabl      = physical (base) address of page tables
@       $Level1tab = offset from page table base to level 1 entries

        @ get the page table base address from cp15
        
        mrc     p15, 0, \w4, c2, c0, 0
        mov     \w4, \w4, LSR #14                         @ Clear the low order 14 bits because cp15...
        mov     \w4, \w4, LSL #14                         @ ...read of these bits are unpredictable

        ldr     \w3,  =\size                              @ get size of bank
        cmp     \w3,  #0
        beq     2                                       @ if size=0, skip

        ldr     \w2,  =\Level1tab + (\virtual:SHR:(20-2)) @ generate table index

        add     \w2,  \w2,   \w4                          @ offset into page table
        mov     \w3,  \w3,   LSR #20                      @ no. of 1MB segments

        ldr     \w1,  =(\physical + \access)              @ create table entry
1:
        str     \w1,  [\w2], #4                           @ store table entry and increment
        add     \w1,  \w1,   #xlli_MemSize_1Mb            @ add section number field
        subs    \w3,  \w3,   #1                           @ decrement loop count
        bne     1
2:

    .endm
@*********************************************************************************
@
@      This macro will map a region using 1MB sections
@      Notes: 
@             1)You must call xlli_initPageTable before this macro is valid.
@             2) This version of the macro is used when REGISTER values are passed to the macro
    
    .macro    xlli_mapSECTIONS_Var  w1,w2,w3,w4,size,virtual,physical,access,Level1tab
    
@       $size      = size of region to be mapped
@       $virtual   = starting virtual address of region
@       $physical  = starting physical address of region
@       $access    = access bits for this region
@       $tabl      = physical (base) address of page tables
@       $Level1tab = offset from page table base to level 1 entries

        @ get the page table base address from cp15
        
        mrc     p15, 0, \w4, c2, c0, 0
        mov     \w4, \w4, LSR #14                @ Clear the low order 14 bits because cp15...
        mov     \w4, \w4, LSL #14                @ ...read of these bits are unpredictable

        mov     \w3,  \size                      @ get size of bank
        cmp     \w3,  #0
        beq     2                              @ if size=0, skip

		mov		\w2,  \virtual, LSR #(20-2)
		add		\w2,  \w2, #\Level1tab           @ generate table index

        add     \w2,  \w2,   \w4                 @ offset into page table
        mov     \w3,  \w3,   LSR #20             @ no. of 1MB segments

		add		\w1,  \physical, \access         @ create table entry
1:
        str     \w1,  [\w2], #4                  @ store table entry and increment
        add     \w1,  \w1,   #xlli_MemSize_1Mb   @ add section number field
        subs    \w3,  \w3,   #1                  @ decrement loop count
        bne     1
2:

    .endm