pxa.h

pxa270的bootloader,linux下的,好不容易搞到的

/*
 * proc/pxa.h - processor specific defines
 * 
 * Copyright (C) 2001  Erik Mouw ([e-mail])
 * Copyright (C) 2003  Abraham van der Merwe <[e-mail]>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 *
 */

#ifndef BLOB_PXA_PROC_H
#define BLOB_PXA_PROC_H

#define io_p2v(x) (x)
#define io_v2p(x) (x)

#ifndef __ASSEMBLY__

#define __REG(x)	(*((volatile u32 *)io_p2v(x)))

#define __REG2(x,y)	\
	( __builtin_constant_p(y) ? (__REG((x) + (y))) \
				  : (*(volatile u32 *)((u32)&__REG(x) + (y))) )

# define __PREG(x)	(io_v2p((u32)&(x)))

#else

# define __REG(x)	io_p2v(x)
# define __PREG(x)	io_v2p(x)

#endif


#define __ASM_ARCH_HARDWARE_H
// TODO
// Some Patches by Adrian van der Merwe didn't make it yet into Russels/Nico's
// Linux patches, so for now we use our local pxa-regs.h file
//#include <asm-arm/arch-pxa/pxa-regs.h>
#include <blob/arch/pxa-regs.h>

/* memory start and end */
#define MEMORY_START		(0xa0000000)
#define MEMORY_END			(0xb0000000)

#define GPIO_OUT_LO_BIT 4
#define GPIO_OUT_HI_BIT 5

#define GPIO_INPUT		0
#define GPIO_OUT_LO		(1 << GPIO_OUT_LO_BIT)
#define GPIO_OUT_HI		(1 << GPIO_OUT_HI_BIT)

#define GPIO_ALT_FN1	0x01
#define GPIO_ALT_FN2	0x02
#define GPIO_ALT_FN3	0x03
#define GPIO_ALT_FN_MASK (GPIO_ALT_FN1 | GPIO_ALT_FN2 | GPIO_ALT_FN3)

#define _SB(x) (((x) & GPIO_OUT_HI) >> GPIO_OUT_HI_BIT)
#define _SM(x) (_SB(GPIO##x##_VALUE) * GPIO_bit (x))

#define GPSR0_VALUE (								\
		_SM(0) | _SM(1) | _SM(2) | _SM(3) |			\
		_SM(4) | _SM(5) | _SM(6) | _SM(7) |			\
		_SM(8) | _SM(9) | _SM(10) | _SM(11) |		\
		_SM(12) | _SM(13) | _SM(14) | _SM(15) |		\
		_SM(16) | _SM(17) | _SM(18) | _SM(19) |		\
		_SM(20) | _SM(21) | _SM(22) | _SM(23) |		\
		_SM(24) | _SM(25) | _SM(26) | _SM(27) |		\
		_SM(28) | _SM(29) | _SM(30) | _SM(31)		\
	)

#define GPSR1_VALUE (								\
		_SM(32) | _SM(33) | _SM(34) | _SM(35) |		\
		_SM(36) | _SM(37) | _SM(38) | _SM(39) |		\
		_SM(40) | _SM(41) | _SM(42) | _SM(43) |		\
		_SM(44) | _SM(45) | _SM(46) | _SM(47) |		\
		_SM(48) | _SM(49) | _SM(50) | _SM(51) |		\
		_SM(52) | _SM(53) | _SM(54) | _SM(55) |		\
		_SM(56) | _SM(57) | _SM(58) | _SM(59) |		\
		_SM(60) | _SM(61) | _SM(62) | _SM(63)		\
	)

#define GPSR2_VALUE (								\
		_SM(64) | _SM(65) | _SM(66) | _SM(67) |		\
		_SM(68) | _SM(69) | _SM(70) | _SM(71) |		\
		_SM(72) | _SM(73) | _SM(74) | _SM(75) |		\
		_SM(76) | _SM(77) | _SM(78) | _SM(79) |		\
		_SM(80) | _SM(81) | _SM(82) | _SM(83) |		\
		_SM(84)										\
	)

#define _CB(x) (((x) & GPIO_OUT_LO) >> GPIO_OUT_LO_BIT)
#define _CM(x) (_CB(GPIO##x##_VALUE) * GPIO_bit (x))

#define GPCR0_VALUE (								\
		_CM(0) | _CM(1) | _CM(2) | _CM(3) |			\
		_CM(4) | _CM(5) | _CM(6) | _CM(7) |			\
		_CM(8) | _CM(9) | _CM(10) | _CM(11) |		\
		_CM(12) | _CM(13) | _CM(14) | _CM(15) |		\
		_CM(16) | _CM(17) | _CM(18) | _CM(19) |		\
		_CM(20) | _CM(21) | _CM(22) | _CM(23) |		\
		_CM(24) | _CM(25) | _CM(26) | _CM(27) |		\
		_CM(28) | _CM(29) | _CM(30) | _CM(31)		\
	)

#define GPCR1_VALUE (								\
		_CM(32) | _CM(33) | _CM(34) | _CM(35) |		\
		_CM(36) | _CM(37) | _CM(38) | _CM(39) |		\
		_CM(40) | _CM(41) | _CM(42) | _CM(43) |		\
		_CM(44) | _CM(45) | _CM(46) | _CM(47) |		\
		_CM(48) | _CM(49) | _CM(50) | _CM(51) |		\
		_CM(52) | _CM(53) | _CM(54) | _CM(55) |		\
		_CM(56) | _CM(57) | _CM(58) | _CM(59) |		\
		_CM(60) | _CM(61) | _CM(62) | _CM(63)		\
	)

#define GPCR2_VALUE (								\
		_CM(64) | _CM(65) | _CM(66) | _CM(67) |		\
		_CM(68) | _CM(69) | _CM(70) | _CM(71) |		\
		_CM(72) | _CM(73) | _CM(74) | _CM(75) |		\
		_CM(76) | _CM(77) | _CM(78) | _CM(79) |		\
		_CM(80) | _CM(81) | _CM(82) | _CM(83) |		\
		_CM(84)										\
	)

#define _DB(x) (_SB(x) | _CB(x))
#define _DM(x) (_DB(GPIO##x##_VALUE) * GPIO_bit (x))

#define GPDR0_VALUE (								\
		_DM(0) | _DM(1) | _DM(2) | _DM(3) |			\
		_DM(4) | _DM(5) | _DM(6) | _DM(7) |			\
		_DM(8) | _DM(9) | _DM(10) | _DM(11) |		\
		_DM(12) | _DM(13) | _DM(14) | _DM(15) |		\
		_DM(16) | _DM(17) | _DM(18) | _DM(19) |		\
		_DM(20) | _DM(21) | _DM(22) | _DM(23) |		\
		_DM(24) | _DM(25) | _DM(26) | _DM(27) |		\
		_DM(28) | _DM(29) | _DM(30) | _DM(31)		\
	)

#define GPDR1_VALUE (								\
		_DM(32) | _DM(33) | _DM(34) | _DM(35) |		\
		_DM(36) | _DM(37) | _DM(38) | _DM(39) |		\
		_DM(40) | _DM(41) | _DM(42) | _DM(43) |		\
		_DM(44) | _DM(45) | _DM(46) | _DM(47) |		\
		_DM(48) | _DM(49) | _DM(50) | _DM(51) |		\
		_DM(52) | _DM(53) | _DM(54) | _DM(55) |		\
		_DM(56) | _DM(57) | _DM(58) | _DM(59) |		\
		_DM(60) | _DM(61) | _DM(62) | _DM(63)		\
	)

#define GPDR2_VALUE (								\
		_DM(64) | _DM(65) | _DM(66) | _DM(67) |		\
		_DM(68) | _DM(69) | _DM(70) | _DM(71) |		\
		_DM(72) | _DM(73) | _DM(74) | _DM(75) |		\
		_DM(76) | _DM(77) | _DM(78) | _DM(79) |		\
		_DM(80) | _DM(81) | _DM(82) | _DM(83) |		\
		_DM(84)										\
	)

#define _FB(x) ((x) & GPIO_ALT_FN_MASK)
#define _FM(x) (_FB(GPIO##x##_VALUE) << (((x) & 0x0f) << 1))

#define GAFR0_L_VALUE (								\
		_FM(0) | _FM(1) | _FM(2) | _FM(3) |			\
		_FM(4) | _FM(5) | _FM(6) | _FM(7) |			\
		_FM(8) | _FM(9) | _FM(10) | _FM(11) |		\
		_FM(12) | _FM(13) | _FM(14) | _FM(15)		\
	)

#define GAFR0_U_VALUE (								\
		_FM(16) | _FM(17) | _FM(18) | _FM(19) |		\
		_FM(20) | _FM(21) | _FM(22) | _FM(23) |		\
		_FM(24) | _FM(25) | _FM(26) | _FM(27) |		\
		_FM(28) | _FM(29) | _FM(30) | _FM(31)		\
	)

#define GAFR1_L_VALUE (								\
		_FM(32) | _FM(33) | _FM(34) | _FM(35) |		\
		_FM(36) | _FM(37) | _FM(38) | _FM(39) |		\
		_FM(40) | _FM(41) | _FM(42) | _FM(43) |		\
		_FM(44) | _FM(45) | _FM(46) | _FM(47)		\
	)

#define GAFR1_U_VALUE (								\
		_FM(48) | _FM(49) | _FM(50) | _FM(51) |		\
		_FM(52) | _FM(53) | _FM(54) | _FM(55) |		\
		_FM(56) | _FM(57) | _FM(58) | _FM(59) |		\
		_FM(60) | _FM(61) | _FM(62) | _FM(63)		\
	)

#define GAFR2_L_VALUE (								\
		_FM(64) | _FM(65) | _FM(66) | _FM(67) |		\
		_FM(68) | _FM(69) | _FM(70) | _FM(71) |		\
		_FM(72) | _FM(73) | _FM(74) | _FM(75) |		\
		_FM(76) | _FM(77) | _FM(78) | _FM(79)		\
	)

#define GAFR2_U_VALUE (								\
		_FM(80) | _FM(81) | _FM(82) | _FM(83) |		\
		_FM(84)										\
	)

#ifndef __ASSEMBLY__

/* generic read/write */

#define readb(a)	(*(volatile u8*)(a))
#define readw(a)	(*(volatile u16*)(a))
#define readl(a)	(*(volatile u32*)(a))

#define writeb(v,a)	(*(volatile u8*)(a)=(v))
#define writew(v,a)	(*(volatile u16*)(a)=(v))
#define	writel(v,a)	(*(volatile u32*)(a)=(v))

#define insb(a,p,l)	({ 			\
	int __i;				\
	for (__i=0; __i<(l); __i++) 		\
		((u8*)(p))[__i]= readb((a)); 	\
})

#define insw(a,p,l)	({ 			\
	int __i;				\
	for (__i=0; __i<(l); __i++) 		\
		((u16*)(p))[__i] = readw((a)); 	\
})

#define insl(a,p,l)	({ 			\
	int __i;				\
	for (__i=0; __i<(l); __i++) 		\
		((u32*)(p))[__i] = readl((a)); 	\
})

#define outsb(a,p,l)	({ 			\
	int __i;				\
	for (__i=0; __i<(l); __i++)	 	\
		writeb(((u8*)(p))[__i],(a)); 	\
})

#define outsw(a,p,l)	({ 			\
	int __i;				\
	for (__i=0; __i<(l); __i++) 		\
		writew(((u16*)(p))[__i],(a)); 	\
})

#define outsl(a,p,l)	({	 		\
	int __i;				\
	for (__i=0; __i<(l); __i++)	 	\
		writel(((u32*)(p))[__i],(a));	\
})
#endif

#endif