accelent_sa.h

pxa270的bootloader,linux下的,好不容易搞到的

/*
 * accelent_sa.h: Accelent IDP specific defines
 *
 * Copyright (C) 2001  Erik Mouw ([e-mail])
 * Copyright (C) 2002  Holger Schurig <[e-mail]>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 *
 */

#ident "$Id: accelent_sa.h,v 1.4 2002/02/27 18:41:47 timriker Exp $"

#ifndef BLOB_ARCH_ACCELENT_SA_H
#define BLOB_ARCH_ACCELENT_SA_H

#undef  CPU_SPEED_133

/* boot CPU speed */
#ifdef CPU_SPEED_133
#       define CPU_SPEED                (0x05)
#else
#       define CPU_SPEED                (0x0a)
#endif

/* serial port */
#define USE_SERIAL1
#define TERMINAL_SPEED baud_115200

/* GPIO for the LED */
#define LED_GPIO		(0x00000002) /* GPIO 1 */


/* the base address were BLOB is loaded by the first stage loader */
#define BLOB_ABS_BASE_ADDR	(0xc0200400)


/* where do various parts live in RAM */
#define BLOB_RAM_BASE		(0xc0100000)
#define KERNEL_RAM_BASE		(0xC0008000)
#define PARAM_RAM_BASE		(0xc0110000)
#define RAMDISK_RAM_BASE	(0xC0400000)


/* and where do they live in flash */
#define BLOB_FLASH_BASE		(0x00000000)
#define BLOB_FLASH_LEN		(256 * 1024)
#define PARAM_FLASH_BASE	(BLOB_FLASH_BASE + BLOB_FLASH_LEN)
#define PARAM_FLASH_LEN		(256 * 1024)
#define KERNEL_FLASH_BASE	(PARAM_FLASH_BASE + PARAM_FLASH_LEN)
#define KERNEL_FLASH_LEN	(1024 * 1024)
#define LOAD_RAMDISK		1 /* load ramdisk into ram */
#define RAMDISK_FLASH_BASE	(KERNEL_FLASH_BASE + KERNEL_FLASH_LEN)
#define RAMDISK_FLASH_LEN	(4 * 1024 * 1024)


/* the position of the kernel boot parameters */
#define BOOT_PARAMS		(0xc0000100)


/* the size (in kbytes) to which the compressed ramdisk expands */
#define RAMDISK_SIZE		(8 * 1024)


#ifdef BLOB_NEED_MEMCONFIG
#ifdef CPU_SPEED_133

// found in the original Boot-Flash at 0x170fc (133 MHz)
#define MDCNFG_VALUE	0x1b541b54
#define MDCAS00_VALUE	0x55555557
#define MDCAS01_VALUE	0x55555555
#define MDCAS02_VALUE	0x55555555
#define MDCAS20_VALUE	0x55555557
#define MDCAS21_VALUE	0x55555555
#define MDCAS22_VALUE	0x55555555
#define MSC1_VALUE	0x27392738
#define MSC2_VALUE	0x27382739
#define MECR_VALUE	0x14a514a5
#define SMCNFG_VALUE	0x00000000
#define PPCR_VALUE	CPU_SPEED

#else

// found in the original Boot-Flash at 0x17164 (206 MHz)
#define MDCNFG_VALUE	0xf354f354
#define MDCAS00_VALUE	0xaaaaaaaf
#define MDCAS01_VALUE	0xaaaaaaaa
#define MDCAS02_VALUE	0xaaaaaaaa
#define MDCAS20_VALUE	0xaaaaaaaf
#define MDCAS21_VALUE	0xaaaaaaaa
#define MDCAS22_VALUE	0xaaaaaaaa
#define MSC1_VALUE	0x6c616c60
#define MSC2_VALUE	0x6c606c61
#define MECR_VALUE	0x21082108
#define SMCNFG_VALUE	0x00000000
#define PPCR_VALUE	CPU_SPEED

#endif

// MSC0 (nCS0, nCS1) is for Flash
// MSC1 (nCS2, nCS3) is for ?, SA1111
// MSC2 (nCS4, nCS5) is for ExtBus, LCD
#define MSC0_VALUE	0x6c616c60
#endif


// the control-registers in the FPGA
#define CONTROL_REG     __REG(0x42000000)


/* Debugging macros used in accelent code */
#define ACCELENT_DEBUG 1

#ifdef ACCELENT_DEBUG
#	define _DBGU32( x )	SerialOutputString( #x"=0x" ); \
				SerialOutputHex( (u32)x ); \
				serial_write( '\n' );
#else
#	define _DBGU32( x )
#endif


#endif