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PanelFloatHeight=200
End
ActivePanels
End
End
End
FrameLayout
FrameState=FrameStateFloating
FrameDockSite=DockSiteNone
FrameFloatLeft=159
FrameFloatTop=521
FrameFloatWidth=369
FrameFloatHeight=403
SectionLayout
SectionSplitRatio=50
SectionSplitType=Horizontal
PanelLayout
PanelName='SnippetsView'
PanelVisible=False
PanelFloatWidth=369
PanelFloatHeight=403
End
ActivePanels
'EditScript' 'SnippetsView'
'VHDMDL' 'SnippetsView'
End
End
End
FrameLayout
FrameState=FrameStateFloating
FrameDockSite=DockSiteNone
FrameDockedWidth=850
FrameFloatLeft=200
FrameFloatWidth=730
FrameFloatHeight=384
SectionLayout
PanelLayout
PanelName='NanoboardDevicePanel'
PanelVisible=False
PanelFloatWidth=728
PanelFloatHeight=220
End
PanelLayout
PanelName='NexusInstrumentPanel'
PanelVisible=False
PanelFloatWidth=730
PanelFloatHeight=160
End
PanelLayout
PanelName='PhysicalDevicePanel'
PanelVisible=False
PanelFloatWidth=730
PanelFloatHeight=384
End
ActivePanels
'FPGAWorkspace' 'NanoboardDevicePanel'
End
End
End
FrameLayout
FrameState=FrameStateFloating
FrameDockSite=DockSiteNone
FrameDockedWidth=280
FrameFloatLeft=64
FrameFloatTop=144
FrameFloatWidth=375
FrameFloatHeight=520
SectionLayout
PanelLayout
PanelName='Errors'
PanelVisible=False
PanelFloatWidth=375
PanelFloatHeight=520
End
PanelLayout
PanelName='Differences'
PanelVisible=False
PanelFloatWidth=313
PanelFloatHeight=349
End
PanelLayout
PanelName='InternalProperties'
PanelVisible=False
PanelFloatWidth=313
PanelFloatHeight=349
End
PanelLayout
PanelName='EmbeddedCrossReferences'
PanelVisible=False
PanelFloatWidth=375
PanelFloatHeight=520
End
PanelLayout
PanelName='EmbeddedEvaluate'
PanelVisible=False
PanelFloatWidth=535
PanelFloatHeight=350
End
PanelLayout
PanelName='EmbeddedConsole'
PanelVisible=False
End
PanelLayout
PanelName='EmbeddedBreakpoints'
PanelVisible=False
End
PanelLayout
PanelName='EmbeddedWatches'
PanelVisible=False
End
PanelLayout
PanelName='EmbeddedCodeExplorer'
PanelVisible=False
PanelFloatWidth=600
PanelFloatHeight=600
End
ActivePanels
End
End
End
FrameLayout
FrameState=FrameStateFloating
FrameDockSite=DockSiteNone
FrameDockedWidth=280
FrameFloatLeft=378
FrameFloatTop=151
FrameFloatWidth=428
FrameFloatHeight=360
SectionLayout
PanelLayout
PanelName='Browser'
PanelVisible=False
PanelFloatWidth=428
PanelFloatHeight=360
End
ActivePanels
End
End
End
FrameLayout
FrameState=FrameStateFloating
FrameDockSite=DockSiteNone
FrameDockedWidth=350
FrameDockedHeight=400
FrameFloatLeft=0
FrameFloatTop=0
FrameFloatWidth=350
SectionLayout
PanelLayout
PanelName='EditScriptDebuggerBreakPointList'
PanelVisible=False
PanelFloatWidth=350
End
PanelLayout
PanelName='EditScriptDebuggerCallStack'
PanelVisible=False
PanelFloatWidth=350
End
PanelLayout
PanelName='EditScriptDebuggerComponentPalette'
PanelVisible=False
PanelFloatWidth=350
End
PanelLayout
PanelName='EditScriptDebuggerObjectInspector'
PanelVisible=False
PanelFloatWidth=350
End
PanelLayout
PanelName='EditScriptDebuggerWatchList'
PanelVisible=False
PanelFloatWidth=350
End
ActivePanels
End
End
End
FrameLayout
FrameState=FrameStateFloating
FrameDockSite=DockSiteNone
FrameDockedWidth=280
FrameFloatLeft=459
FrameFloatTop=141
FrameFloatWidth=387
FrameFloatHeight=414
SectionLayout
PanelLayout
PanelName='PCBObjectInspector'
PanelVisible=False
PanelFloatWidth=387
PanelFloatHeight=414
End
PanelLayout
PanelName='PCBExpressionFilter'
PanelVisible=False
PanelFloatWidth=387
PanelFloatHeight=414
End
PanelLayout
PanelName='SchLibObjectInspector'
PanelVisible=False
PanelFloatWidth=387
PanelFloatHeight=414
End
PanelLayout
PanelName='LibFilter'
PanelVisible=False
PanelFloatWidth=387
PanelFloatHeight=414
End
ActivePanels
End
End
End
FrameLayout
FrameState=FrameStateFloating
FrameDockSite=DockSiteNone
FrameDockedWidth=280
FrameFloatLeft=192
FrameFloatTop=122
FrameFloatWidth=850
FrameFloatHeight=634
SectionLayout
PanelLayout
PanelName='AutoCheck'
PanelVisible=False
PanelFloatWidth=850
PanelFloatHeight=634
End
ActivePanels
End
End
End
FrameLayout
FrameState=FrameStateFloating
FrameDockSite=DockSiteNone
FrameFloatLeft=386
FrameFloatTop=143
FrameFloatWidth=535
FrameFloatHeight=350
SectionLayout
PanelLayout
PanelName='EmbeddedCPU'
PanelVisible=False
End
PanelLayout
PanelName='EmbeddedMemory'
PanelVisible=False
End
PanelLayout
PanelName='EmbeddedDisassembly'
PanelVisible=False
End
ActivePanels
End
End
End
FrameLayout
FrameState=FrameStateFloating
FrameDockSite=DockSiteNone
FrameDockedWidth=280
FrameFloatLeft=-17
FrameFloatTop=102
FrameFloatWidth=280
FrameFloatHeight=850
SectionLayout
PanelLayout
PanelName='NewDocuments'
PanelVisible=False
PanelFloatWidth=280
PanelFloatHeight=850
End
PanelLayout
PanelName='Navigator'
PanelVisible=False
PanelFloatWidth=280
PanelFloatHeight=850
End
ActivePanels
'EDIF' 'NewDocuments'
'EDIFLIB' 'NewDocuments'
'EditScript' 'Workspace'
'NSX' 'NewDocuments'
'MDL' 'NewDocuments'
'CKT' 'Workspace'
'VHDL' 'NewDocuments'
'VHDTST' 'NewDocuments'
'VHDLIB' 'NewDocuments'
'VHDMDL' 'NewDocuments'
'FPGTRG' 'NewDocuments'
'TEXT' 'Workspace'
'OutputJob' 'NewDocuments'
'DatabaseLink' 'NewDocuments'
'FPGAWorkspace' 'NewDocuments'
'LogicAnalyser' 'Workspace'
'Constraint' 'NewDocuments'
'CAMTastic' 'Workspace'
'PCBLIB' 'NewDocuments'
'Placer' 'NewDocuments'
'CUPL' 'Workspace'
'WAVE' 'NewDocuments'
'SIMDATA' 'NewDocuments'
'WAVESIM' 'NewDocuments'
'C' 'NewDocuments'
'Asm' 'NewDocuments'
'Disassembly' 'NewDocuments'
'PCB3D' 'PCB3DPanel'
'PCB3DLIB' 'Workspace'
End
End
End
FrameLayout
FrameState=FrameStateFloating
FrameDockSite=DockSiteNone
FrameDockedWidth=280
FrameFloatLeft=-29
FrameFloatTop=424
FrameFloatWidth=280
FrameFloatHeight=548
SectionLayout
PanelLayout
PanelName='EDIFSearchPanel'
PanelFloatWidth=280
PanelFloatHeight=850
End
PanelLayout
PanelName='SimSearchPanel'
PanelFloatWidth=280
PanelFloatHeight=850
End
PanelLayout
PanelName='HelpAdvisor'
PanelVisible=False
PanelFloatWidth=280
PanelFloatHeight=850
End
PanelLayout
PanelName='ConstraintsSearchPanel'
PanelFloatWidth=280
PanelFloatHeight=850
End
PanelLayout
PanelName='EditScriptDebuggerProjectManager'
PanelFloatWidth=350
End
PanelLayout
PanelName='CAMTasticPanel'
PanelFloatWidth=280
PanelFloatHeight=850
End
PanelLayout
PanelName='PCBNavigator'
PanelVisible=False
PanelFloatWidth=280
PanelFloatHeight=850
End
PanelLayout
PanelName='PCBLibPanel'
PanelFloatWidth=280
PanelFloatHeight=850
End
PanelLayout
PanelName='SchLibraryPanel'
PanelFloatWidth=280
PanelFloatHeight=850
End
PanelLayout
PanelName='PLDSearchPanel'
PanelFloatWidth=280
PanelFloatHeight=850
End
PanelLayout
PanelName='WavePanel'
PanelFloatWidth=280
PanelFloatHeight=850
End
PanelLayout
PanelName='SimDataPanel'
PanelFloatWidth=280
PanelFloatHeight=850
End
PanelLayout
PanelName='PCB3DLibPanel'
PanelFloatWidth=600
PanelFloatHeight=600
End
PanelLayout
PanelName='PCB3DPanel'
PanelFloatWidth=600
PanelFloatHeight=600
End
ActivePanels
'EDIF' 'NewDocuments'
'EDIFLIB' 'NewDocuments'
'EditScript' 'Workspace'
'NSX' 'NewDocuments'
'MDL' 'NewDocuments'
'CKT' 'Workspace'
'VHDL' 'NewDocuments'
'VHDTST' 'NewDocuments'
'VHDLIB' 'NewDocuments'
'VHDMDL' 'NewDocuments'
'FPGTRG' 'NewDocuments'
'FpgaFlow' 'Workspace'
'TEXT' 'Workspace'
'ProtelNetlist' 'NewDocuments'
'OutputJob' 'NewDocuments'
'DatabaseLink' 'NewDocuments'
'FPGAWorkspace' 'NewDocuments'
'LogicAnalyser' 'Workspace'
'Constraint' 'NewDocuments'
'CAMTastic' 'Workspace'
'PCBLIB' 'NewDocuments'
'Placer' 'NewDocuments'
'SCHLIB' 'SchLibraryPanel'
'CUPL' 'Workspace'
'WAVE' 'NewDocuments'
'SIMDATA' 'NewDocuments'
'WAVESIM' 'NewDocuments'
'C' 'NewDocuments'
'Asm' 'NewDocuments'
'Disassembly' 'NewDocuments'
'PCB3D' 'PCB3DPanel'
'PCB3DLIB' 'Workspace'
End
End
End
FrameLayout
FrameState=FrameStateFloating
FrameDockSite=DockSiteNone
FrameDockedWidth=280
FrameFloatLeft=155
FrameFloatTop=134
FrameFloatWidth=280
FrameFloatHeight=548
SectionLayout
PanelLayout
PanelName='Help'
PanelVisible=False
PanelFloatWidth=280
PanelFloatHeight=850
End
PanelLayout
PanelName='Workspace'
PanelVisible=False
PanelFloatWidth=280
PanelFloatHeight=548
End
ActivePanels
'EDIF' 'NewDocuments'
'EDIFLIB' 'NewDocuments'
'EditScript' 'Workspace'
'NSX' 'NewDocuments'
'MDL' 'NewDocuments'
'CKT' 'Workspace'
'VHDL' 'NewDocuments'
'VHDTST' 'NewDocuments'
'VHDLIB' 'NewDocuments'
'VHDMDL' 'NewDocuments'
'FPGTRG' 'NewDocuments'
'FpgaFlow' 'Workspace'
'TEXT' 'Workspace'
'ProtelNetlist' 'Workspace'
'OutputJob' 'NewDocuments'
'DatabaseLink' 'NewDocuments'
'FPGAWorkspace' 'NewDocuments'
'LogicAnalyser' 'Workspace'
'Constraint' 'NewDocuments'
'CAMTastic' 'Workspace'
'PCBLIB' 'NewDocuments'
'Placer' 'NewDocuments'
'CUPL' 'Workspace'
'WAVE' 'NewDocuments'
'SIMDATA' 'NewDocuments'
'WAVESIM' 'NewDocuments'
'C' 'NewDocuments'
'Asm' 'NewDocuments'
'Disassembly' 'NewDocuments'
'PCB3D' 'PCB3DPanel'
'PCB3DLIB' 'Workspace'
End
End
End
FrameLayout
FrameState=FrameStateUnpinned
FrameDockSite=DockSiteRight
FrameDockedWidth=280
FrameFloatLeft=405
FrameFloatTop=104
FrameFloatWidth=280
FrameFloatHeight=850
SectionLayout
PanelLayout
PanelName='Favorites'
PanelVisible=False
PanelFloatWidth=280
PanelFloatHeight=850
End
PanelLayout
PanelName='LibraryBrowser'
PanelFloatWidth=280
PanelFloatHeight=850
End
PanelLayout
PanelName='Clipboard'
PanelFloatWidth=280
PanelFloatHeight=850
End
PanelLayout
PanelName='Messages'
PanelFloatWidth=690
PanelFloatHeight=256
End
PanelLayout
PanelName='ToDo'
PanelVisible=False
PanelFloatWidth=690
PanelFloatHeight=256
End
PanelLayout
PanelName='SchObjectInspector'
PanelVisible=False
PanelFloatWidth=387
PanelFloatHeight=414
End
PanelLayout
PanelName='Filter'
PanelVisible=False
PanelFloatWidth=280
PanelFloatHeight=850
End
PanelLayout
PanelName='MiniViewer'
PanelFloatWidth=280
PanelFloatHeight=850
End
PanelLayout
PanelName='Output'
PanelFloatWidth=690
PanelFloatHeight=256
End
ActivePanels
'DefaultEditor' 'Clipboard'
'EDIF' 'LibraryBrowser'
'EDIFLIB' 'LibraryBrowser'
'EditScript' 'LibraryBrowser'
'MDL' 'LibraryBrowser'
'NSX' 'LibraryBrowser'
'CKT' 'LibraryBrowser'
'VHDL' 'LibraryBrowser'
'VHDTST' 'LibraryBrowser'
'VHDLIB' 'LibraryBrowser'
'VHDMDL' 'LibraryBrowser'
'FPGTRG' 'LibraryBrowser'
'FpgaFlow' 'Clipboard'
'TEXT' 'LibraryBrowser'
'ProtelNetlist' 'Clipboard'
'PickATask' 'LibraryBrowser'
'OutputJob' 'LibraryBrowser'
'DatabaseLink' 'LibraryBrowser'
'FPGAWorkspace' 'Favorites'
'LogicAnalyser' 'LibraryBrowser'
'Constraint' 'Favorites'
'CAMTastic' 'LibraryBrowser'
'PCB' 'LibraryBrowser'
'PCBLIB' 'LibraryBrowser'
'Placer' 'LibraryBrowser'
'SCH' 'LibraryBrowser'
'SCHLIB' 'LibraryBrowser'
'CUPL' 'LibraryBrowser'
'WAVE' 'LibraryBrowser'
'SIMDATA' 'LibraryBrowser'
'WAVESIM' 'LibraryBrowser'
'C' 'LibraryBrowser'
'Asm' 'LibraryBrowser'
'Disassembly' 'LibraryBrowser'
'PCB3DLib' 'LibraryBrowser'
'PCB3D' 'LibraryBrowser'
End
End
End
End
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