📄 tahiti_def.h
字号:
#define OTG_DMA_EP14_O_BPTR (OTG_DMA_BASE+0x2F0) // 32bit dma EP14 o/p buf tx pointer#define OTG_DMA_EP14_I_BPTR (OTG_DMA_BASE+0x2F4) // 32bit dma EP14 i/p buf tx pointer#define OTG_DMA_EP15_O_BPTR (OTG_DMA_BASE+0x2F8) // 32bit dma EP15 o/p buf tx pointer#define OTG_DMA_EP15_I_BPTR (OTG_DMA_BASE+0x2FC) // 32bit dma EP15 i/p buf tx pointer#define VENDOR_ID_REG0_ADD OTG_I2C_BASE+0x00#define VENDOR_ID_REG1_ADD OTG_I2C_BASE+0x01#define PRODUCT_ID_REG0_ADD OTG_I2C_BASE+0x02#define PRODUCT_ID_REG1_ADD OTG_I2C_BASE+0x03#define MODE_REG1_SET_ADD OTG_I2C_BASE+0x04#define MODE_REG1_CLR_ADD OTG_I2C_BASE+0x05#define OTG_CTRL_REG1_SET_ADD OTG_I2C_BASE+0x06#define OTG_CTRL_REG1_CLR_ADD OTG_I2C_BASE+0x07#define INT_SRC_REG_ADD OTG_I2C_BASE+0x08#define INT_LAT_REG_SET_ADD OTG_I2C_BASE+0x0a#define INT_LAT_REG_CLR_ADD OTG_I2C_BASE+0x0b#define INT_FALSE_REG_SET_ADD OTG_I2C_BASE+0x0c#define INT_FALSE_REG_CLR_ADD OTG_I2C_BASE+0x0d#define INT_TRUE_REG_SET_ADD OTG_I2C_BASE+0x0e#define INT_TRUE_REG_CLR_ADD OTG_I2C_BASE+0x0f#define OTG_CTRL_REG2_SET_ADD OTG_I2C_BASE+0x10#define OTG_CTRL_REG2_CLR_ADD OTG_I2C_BASE+0x11#define MODE_REG2_SET_ADD OTG_I2C_BASE+0x12#define MODE_REG2_CLR_ADD OTG_I2C_BASE+0x13#define BCD_DEV_REG0_ADD OTG_I2C_BASE+0x14#define BCD_DEV_REG1_ADD OTG_I2C_BASE+0x15#define OTG_XCVR_DEVAD_ADD OTG_I2C_BASE+0x18#define SEQ_OP_REG_ADD OTG_I2C_BASE+0x19#define SEQ_RD_STARTAD_ADD OTG_I2C_BASE+0x1a#define I2C_OP_CTRL_REG_ADD OTG_I2C_BASE+0x1b#define SCLK_TO_SCL_HPER_ADD OTG_I2C_BASE+0x1e#define I2C_MASTER_INT_REG_ADD OTG_I2C_BASE+0x1f//// ;---------------------------------------;// ; Clock & Reset (CRM) ;// ; &1002_7000 to $1002_7020 ;// ;---------------------------------------;#define CRM_BASE_ADDR 0x10027000 #define CRM_CSCR CRM_BASE_ADDR // ; Clock Source Control Reg#define CRM_MPCTL0 (CRM_BASE_ADDR+0x04) // ; MCU PLL Control Reg #define CRM_MPCTL1 (CRM_BASE_ADDR+0x08) // ; MCU PLL & System Clk Ctl Reg#define CRM_SPCTL0 (CRM_BASE_ADDR+0x0C) // ; USB PLL Control Reg 0#define CRM_SPCTL1 (CRM_BASE_ADDR+0x10) // ; USB PLL Control Reg 1#define CRM_OSC26MCTL (CRM_BASE_ADDR+0x14) // ; Oscillator 26M Register#define CRM_PCDR0 (CRM_BASE_ADDR+0x18) // ; Perpheral Clock Divider Reg#define CRM_PCDR1 (CRM_BASE_ADDR+0x1C) // ; Perpheral Clock Divider Reg#define CRM_PCCR0 (CRM_BASE_ADDR+0x20) // ; Perpheral Clock Control Reg0#define CRM_PCCR1 (CRM_BASE_ADDR+0x24) // ; Perpheral Clock Control Reg1 #define CRM_CCSR (CRM_BASE_ADDR+0x28) // ; Clock control status Reg//;######################################### //;# MAX # //;# $1003_F000 to $1003_FFFF # //;######################################### #define MAX_BASE_ADDR 0x1003F000 #define MAX_SLV0_BASE (MAX_BASE_ADDR+0x000) // base location for slave 0 #define MAX_SLV1_BASE (MAX_BASE_ADDR+0x100) // base location for slave 1 #define MAX_SLV2_BASE (MAX_BASE_ADDR+0x200) // base location for slave 2 #define MAX_SLV3_BASE (MAX_BASE_ADDR+0x300) // base location for slave 3 #define MAX_SLV0_MPR0 (MAX_SLV0_BASE+0x00) // 32bit max slv0 master priority reg #define MAX_SLV0_AMPR0 (MAX_SLV0_BASE+0x04) // 32bit max slv0 alt priority reg #define MAX_SLV0_SGPCR0 (MAX_SLV0_BASE+0x10) // 32bit max slv0 general ctrl reg #define MAX_SLV0_ASGPCR0 (MAX_SLV0_BASE+0x14) // 32bit max slv0 alt generl ctrl reg #define MAX_SLV1_MPR1 (MAX_SLV1_BASE+0x00) // 32bit max slv1 master priority reg #define MAX_SLV1_AMPR1 (MAX_SLV1_BASE+0x04) // 32bit max slv1 alt priority reg #define MAX_SLV1_SGPCR1 (MAX_SLV1_BASE+0x10) // 32bit max slv1 general ctrl reg #define MAX_SLV1_ASGPCR1 (MAX_SLV1_BASE+0x14) // 32bit max slv1 alt generl ctrl reg #define MAX_SLV2_MPR2 (MAX_SLV2_BASE+0x00) // 32bit max slv2 master priority reg #define MAX_SLV2_AMPR2 (MAX_SLV2_BASE+0x04) // 32bit max slv2 alt priority reg #define MAX_SLV2_SGPCR2 (MAX_SLV2_BASE+0x10) // 32bit max slv2 general ctrl reg #define MAX_SLV2_ASGPCR2 (MAX_SLV2_BASE+0x14) // 32bit max slv2 alt generl ctrl reg #define MAX_SLV3_MPR3 (MAX_SLV3_BASE+0x00) // 32bit max slv3 master priority reg #define MAX_SLV3_AMPR3 (MAX_SLV3_BASE+0x04) // 32bit max slv3 alt priority reg #define MAX_SLV3_SGPCR3 (MAX_SLV3_BASE+0x10) // 32bit max slv3 general ctrl reg #define MAX_SLV3_ASGPCR3 (MAX_SLV3_BASE+0x14) // 32bit max slv3 alt generl ctrl reg #define MAX_MST0_MGPCR0 (MAX_BASE_ADDR+0x800) // 32bit max mst0 general ctrl reg #define MAX_MST1_MGPCR1 (MAX_BASE_ADDR+0x900) // 32bit max mst1 general ctrl reg #define MAX_MST2_MGPCR2 (MAX_BASE_ADDR+0xA00) // 32bit max mst2 general ctrl reg #define MAX_MST3_MGPCR3 (MAX_BASE_ADDR+0xB00) // 32bit max mst3 general ctrl reg #define MAX_MST4_MGPCR4 (MAX_BASE_ADDR+0xC00) // 32bit max mst4 general ctrl reg #define MAX_MST5_MGPCR5 (MAX_BASE_ADDR+0xD00) // 32bit max mst5 general ctrl reg //// ;---------------------------------------;// ; WEIM ;// ; $DF00_1000 to $DF00_1030 ;// ;---------------------------------------;#define EIM_BASE_ADDR 0xDF001000 #define EIM_CS0H EIM_BASE_ADDR #define EIM_CS0L (EIM_BASE_ADDR+0x04) #define EIM_CS1H (EIM_BASE_ADDR+0x08) #define EIM_CS1L (EIM_BASE_ADDR+0x0C) #define EIM_CS2H (EIM_BASE_ADDR+0x10) #define EIM_CS2L (EIM_BASE_ADDR+0x14) #define EIM_CS3H (EIM_BASE_ADDR+0x18) #define EIM_CS3L (EIM_BASE_ADDR+0x1C) #define EIM_CS4H (EIM_BASE_ADDR+0x20) #define EIM_CS4L (EIM_BASE_ADDR+0x24) #define EIM_CS5H (EIM_BASE_ADDR+0x28) #define EIM_CS5L (EIM_BASE_ADDR+0x2C) #define EIM (EIM_BASE_ADDR+0x30)#ifdef FPGA#define EUART_BASE_ADDR 0x17000000#define EUART_DR (EUART_BASE_ADDR+0x0) #define EUART_RSR (EUART_BASE_ADDR+0x4) #define EUART_ECR (EUART_BASE_ADDR+0x4) #define EUART_LCRH (EUART_BASE_ADDR+0x8) #define EUART_LCRM (EUART_BASE_ADDR+0xC) #define EUART_LCRL (EUART_BASE_ADDR+0x10) #define EUART_CR (EUART_BASE_ADDR+0x14) #define EUART_FR (EUART_BASE_ADDR+0x18) #define EUART_IIR (EUART_BASE_ADDR+0x1C) #define EUARTI_ICR (EUART_BASE_ADDR+0x1C) #define LM_AIPI 0xC0000000#define LM_SW 0xC0001014 //#define LM_SW 0xC0000014 #define LED_BASE 0x1A000000#define LED_ALPHA (LED_BASE+0x0)#define LED_LIGHTS (LED_BASE+0x4)#define LED_SWITCHES (LED_BASE+0x8)#endif#endif⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -