usbrx.c

mx21的NAND Flash Bootloader源代码

	*(VP_U32)OTG_FUNC_EP_DSTAT = 0x1;

	//re-config the EP0OUT for status stage
	EP0OutForRequest();

}

// Set Address 00 05 02 00 00 00 00 00 
void HandleSetAddress(void)
{

	//  Configure EP0 for CTRL IN (8 bytes)
	//  EP0 for CTRL OUT configure at CommonInit (8 bytes)
	//  endpt dir stall         se          MPS  format  xbsa ybsa bufsize totalbytes
	EPConfig(EP0,   EP_IN_DIR, EP_NO_STALL, EP_NO_SETUP, 8, CTL_TYPE, 0, 0, 8, 0);
//	Enable_EP(1); 

 	// need to manually toggle because this is EP0 IN, previous transactions is EP0 SETUP (Out)
	// as this is the first transfer of EP0 IN, it suppose to DATA0 seq bit
	// but since this is a CTRL transfer, SETUP (EP0 OUT) follow by STATUS (EP0 IN) 
	// thus although first transfer, it need to send DATA1, thus need to be manually toggle
 	WriteEPToggleBit(EP0, EP_IN_DIR ,1);	//Toggle Status Stage In PID from DATA0 to DATA1
	
	ClearXYBufferInt();

	//send IN with Empty packet to complete the status stage
	//set xfill to indicate data memory filled of EP0 IN
	*(VP_U32)OTG_FUNC_XFILL_STAT = EP0IN;
	
	Ready_EP_IN(0);


	//check for EP0 IN transfer done to send the Empty packet
	while (!(*(VP_U32)OTG_FUNC_EP_DSTAT & EP0IN));

	//Write the Addr assiged by the host to OTG_FUNC_DEV_ADDR
	*(VP_U32)OTG_FUNC_DEV_ADDR = _gUsbOtgDevReq[2];

	//clear EP0 IN transfer done 
	*(VP_U32)OTG_FUNC_EP_DSTAT = EP0IN;
	ClearXYBufferInt();
	
	//un ready the EP0IN
	unready_ep_in(EP0);
	
}



void HandleGetConfigDscptr(void)
{
	int k=0;
	U32 EpStartAddress=0;
	
	//if length is exactly 9, return 9 bytes only
	if (_gUsbOtgDevReq[6] == 0x09)
	{
		//Re - EPConfig for EP0 IN
		//DW0 = 0x00080000	configure EP0 for CTRL setup, max. ps = 8
		//DW1 = 0x01000000	YBuf = 0x0100; XBuf = 0x00
		//DW2 reserved
		//DW3 = 0x00E00009	buffer size = 7 +1 ; TotalByteCnt = 9 byte

 	//	Disable_EP_IN(EP0);	//disable EP0 IN
  		EPConfig(EP0, EP_IN_DIR,   0,  0, 8, CTL_TYPE, (0*16),  200,   16,    9);
	//	Enable_EP(1);
		
		// need to manually toggle because this is EP0 IN, previous transactions is EP0 SETUP (Out)
		// as this is the first transfer of EP0 IN, it suppose to DATA0 seq bit
		// but since this is a CTRL transfer, SETUP (EP0 OUT) follow by STATUS (EP0 IN) 
		// thus although first transfer, it need to send DATA1, thus need to be manually toggle
		WriteEPToggleBit(EP0, EP_IN_DIR ,1);	//Toggle Status Stage In PID from DATA0 to DATA1


		//read the Start Address (xbsa, ybsa)
		if (EpNextBufToService & (EP0IN))	//X Buffer
			EpStartAddress = ((*(VP_U32)(OTG_EP_BASE+(16*1)+4))&0x0000FFFF);
		else		//Y Buffer
			EpStartAddress = (((*(VP_U32)(OTG_EP_BASE+(16*1)+4))>>16)&0x0000FFFF);
				
		//write the 8 bytes data to the XBuff
		for (k=0;k<2;k++)
			*(VP_U32)(OTG_DATA_BASE +EpStartAddress + (k*0x4)) = _gUsbOtgConfDscptr[k] ;
		//write the last 1 bytes
		*(VP_U32)(OTG_DATA_BASE +EpStartAddress + (k*0x4)) = (_gUsbOtgConfDscptr[k] & 0xFF);
	
		ClearXYBufferInt();
		Ready_EP_IN(0);		//ready EP0
		
		//Set/Clear Fill Status
		SetClearFillStatus(EP0IN);		

	}
	
	// return all 32 bytes
	else
	{
		//Re - EPConfig for EP0 IN
		//DW0 = 0x00080000	configure EP0 for CTRL setup, max. ps = 8
		//DW1 = 0x01000000	YBuf = 0x0100; XBuf = 0x00
		//DW2 reserved
		//DW3 = 0x00E00020	buffer size = 7 +1 ; TotalByteCnt = 32 byte
		
 	//	Disable_EP_IN(EP0);	//disable EP0 IN
  		EPConfig(EP0, EP_IN_DIR,   0,  0, 8, CTL_TYPE, (0*16),  200,   32,    32);
	//	Enable_EP(1);
		
		// need to manually toggle because this is EP0 IN, previous transactions is EP0 SETUP (Out)
		// as this is the first transfer of EP0 IN, it suppose to DATA0 seq bit
		// but since this is a CTRL transfer, SETUP (EP0 OUT) follow by STATUS (EP0 IN) 
		// thus although first transfer, it need to send DATA1, thus need to be manually toggle
		WriteEPToggleBit(EP0, EP_IN_DIR ,1);	//Toggle Status Stage In PID from DATA0 to DATA1


		//read the Start Address (xbsa, ybsa)
		if (EpNextBufToService & (EP0IN))	//X Buffer
			EpStartAddress = ((*(VP_U32)(OTG_EP_BASE+(16*1)+4))&0x0000FFFF);
		else		//Y Buffer
			EpStartAddress = (((*(VP_U32)(OTG_EP_BASE+(16*1)+4))>>16)&0x0000FFFF);
				
		//write the 32 bytes data to the XBuff
		for (k=0;k<8;k++)
			*(VP_U32)(OTG_DATA_BASE +EpStartAddress + (k*0x4)) = _gUsbOtgConfDscptr[k] ;
	
		ClearXYBufferInt();
		Ready_EP_IN(0);		//ready EP0
		
		//Set/Clear Fill Status
		SetClearFillStatus(EP0IN);
//20030827 begin		
if(_gUsbOtgDevReq[6] != 32){
		//to complete the previous 32 bytes transfer
        //check for EP0 IN transfer done
        while (!(*(VP_U32)OTG_FUNC_EP_DSTAT & EP0IN));

        //clear EP0 IN transfer done
        *(VP_U32)OTG_FUNC_EP_DSTAT = EP0IN;
        ClearXYBufferInt();

        //un ready the EP0IN
        unready_ep_in(EP0);

        // initiate another zero length byte packet at DATA0
        //configure for the zero length packet
        EPConfig(EP0, EP_IN_DIR,   0,  0, 8, CTL_TYPE, (0*16),  200,   8,    0);

        //Set/Clear Fill Status
        SetClearFillStatus(EP0IN);

        ClearXYBufferInt();
        Ready_EP_IN(0);  //ready EP0

        //Set/Clear Fill Status
        //SetClearFillStatus(EP0IN);
} //20030827 end	
	}

}

void HandleGetStringDscptr(void)
{
    switch (_gUsbOtgDevReq[2])
    {
        case 0:
            UsbOtgReturnStrDscptr0();
            break;
        case 1:		//iManufacturer
            UsbOtgReturnStrDscptr1();
            break;
        case 2:		//iProduct
            UsbOtgReturnStrDscptr2();
            break;
        case 3:		//iSerialNumber
            UsbOtgReturnStrDscptr3();
            break;
    }
}

void UsbOtgReturnStrDscptr0(void)
{
	U32 EpStartAddress;


	// return 2 bytes only
    if (_gUsbOtgDevReq[6] == 0x02)
	{
		//Re - EPConfig for EP0 IN
		//DW0 = 0x00080000	configure EP0 for CTRL setup, max. ps = 8
		//DW1 = 0x01000000	YBuf = 0x0100; XBuf = 0x00
		//DW2 reserved
		//DW3 = 0x00E00002	buffer size = 7 +1 ; TotalByteCnt = 2 byte
 		
  		EPConfig(EP0, EP_IN_DIR,   0,  0, 8, CTL_TYPE, (0*16),  200,   8,    2);
		
		// need to manually toggle because this is EP0 IN, previous transactions is EP0 SETUP (Out)
		// as this is the first transfer of EP0 IN, it suppose to DATA0 seq bit
		// but since this is a CTRL transfer, SETUP (EP0 OUT) follow by STATUS (EP0 IN) 
		// thus although first transfer, it need to send DATA1, thus need to be manually toggle
		WriteEPToggleBit(EP0, EP_IN_DIR ,1);	//Toggle Status Stage In PID from DATA0 to DATA1


		//read the Start Address (xbsa, ybsa)
		if (EpNextBufToService & (EP0IN))	//X Buffer
			EpStartAddress = ((*(VP_U32)(OTG_EP_BASE+(16*1)+4))&0x0000FFFF);
		else		//Y Buffer
			EpStartAddress = (((*(VP_U32)(OTG_EP_BASE+(16*1)+4))>>16)&0x0000FFFF);
				
		//write the 2 bytes
		*(VP_U32)(OTG_DATA_BASE +EpStartAddress + (0*0x4)) = (_gUsbOtgStrDscptr0[0] & 0xFFFF);
	
		ClearXYBufferInt();
		Ready_EP_IN(0);		//ready EP0
		
		//Set/Clear Fill Status
		SetClearFillStatus(EP0IN);		
			
	}
	
	//return all 4 bytes
    else	
    {
		//Re - EPConfig for EP0 IN
		//DW0 = 0x00080000	configure EP0 for CTRL setup, max. ps = 8
		//DW1 = 0x01000000	YBuf = 0x0100; XBuf = 0x00
		//DW2 reserved
		//DW3 = 0x00E00004	buffer size = 7 +1 ; TotalByteCnt = 4 byte
		
  		EPConfig(EP0, EP_IN_DIR,   0,  0, 8, CTL_TYPE, (0*16),  200,   8,    4);
		
		// need to manually toggle because this is EP0 IN, previous transactions is EP0 SETUP (Out)
		// as this is the first transfer of EP0 IN, it suppose to DATA0 seq bit
		// but since this is a CTRL transfer, SETUP (EP0 OUT) follow by STATUS (EP0 IN) 
		// thus although first transfer, it need to send DATA1, thus need to be manually toggle
		WriteEPToggleBit(EP0, EP_IN_DIR ,1);	//Toggle Status Stage In PID from DATA0 to DATA1


		//read the Start Address (xbsa, ybsa)
		if (EpNextBufToService & (EP0IN))	//X Buffer
			EpStartAddress = ((*(VP_U32)(OTG_EP_BASE+(16*1)+4))&0x0000FFFF);
		else		//Y Buffer
			EpStartAddress = (((*(VP_U32)(OTG_EP_BASE+(16*1)+4))>>16)&0x0000FFFF);
				
		//write the 4 bytes
		*(VP_U32)(OTG_DATA_BASE +EpStartAddress + (0*0x4)) = _gUsbOtgStrDscptr0[0];
	
		ClearXYBufferInt();
		Ready_EP_IN(0);		//ready EP0
		
		//Set/Clear Fill Status
		SetClearFillStatus(EP0IN);		
    }
 
}

void UsbOtgReturnStrDscptr1(void)
{
	int k=0;
	U32 EpStartAddress=0;
	
	//Re - EPConfig for EP0 IN
	//DW0 = 0x00080000	configure EP0 for CTRL setup, max. ps = 8
	//DW1 = 0x01000000	YBuf = 0x0100; XBuf = 0x00
	//DW2 reserved
	//DW3 = 0x00E00012	buffer size = 7 +1 ; TotalByteCnt = 18 bytes
	
	EPConfig(EP0, EP_IN_DIR,   0,  0, 8, CTL_TYPE, (0*16),  200,   24,    18);

	// need to manually toggle because this is EP0 IN, previous transactions is EP0 SETUP (Out)
	// as this is the first transfer of EP0 IN, it suppose to DATA0 seq bit
	// but since this is a CTRL transfer, SETUP (EP0 OUT) follow by STATUS (EP0 IN) 
	// thus although first transfer, it need to send DATA1, thus need to be manually toggle
	WriteEPToggleBit(EP0, EP_IN_DIR ,1);	//Toggle Status Stage In PID from DATA0 to DATA1


	//read the Start Address (xbsa, ybsa)
	if (EpNextBufToService & (EP0IN))	//X Buffer
		EpStartAddress = ((*(VP_U32)(OTG_EP_BASE+(16*1)+4))&0x0000FFFF);
	else		//Y Buffer
		EpStartAddress = (((*(VP_U32)(OTG_EP_BASE+(16*1)+4))>>16)&0x0000FFFF);
			
	//write the 16 bytes
	for (k=0;k<4;k++)
	*(VP_U32)(OTG_DATA_BASE + EpStartAddress + (k*0x4)) = (_gUsbOtgStrDscptr1[k] );
	//write the last 2 bytes
	*(VP_U32)(OTG_DATA_BASE + EpStartAddress + (k*0x4)) = (_gUsbOtgStrDscptr1[k] & 0xFFFF);

	ClearXYBufferInt();
	Ready_EP_IN(0);		//ready EP0

	//Set/Clear Fill Status
	SetClearFillStatus(EP0IN);		
}

void UsbOtgReturnStrDscptr2(void)
{
 
 	int k=0;
	U32 EpStartAddress = 0;
	
	//Re - EPConfig for EP0 IN
	//DW0 = 0x00080000	configure EP0 for CTRL setup, max. ps = 8
	//DW1 = 0x01000000	YBuf = 0x0100; XBuf = 0x00
	//DW2 reserved
	//DW3 = 0x00E0001A	buffer size = 7 +1 ; TotalByteCnt = 26 bytes
	
//	Disable_EP_IN(EP0);	//disable EP0 IN
	EPConfig(EP0, EP_IN_DIR,   0,  0, 8, CTL_TYPE, (0*16),  200,   32,    26);
//	Enable_EP(1);

	// need to manually toggle because this is EP0 IN, previous transactions is EP0 SETUP (Out)
	// as this is the first transfer of EP0 IN, it suppose to DATA0 seq bit
	// but since this is a CTRL transfer, SETUP (EP0 OUT) follow by STATUS (EP0 IN) 
	// thus although first transfer, it need to send DATA1, thus need to be manually toggle
	WriteEPToggleBit(EP0, EP_IN_DIR ,1);	//Toggle Status Stage In PID from DATA0 to DATA1


	//read the Start Address (xbsa, ybsa)
	if (EpNextBufToService & (EP0IN))	//X Buffer
		EpStartAddress = ((*(VP_U32)(OTG_EP_BASE+(16*1)+4))&0x0000FFFF);
	else		//Y Buffer
		EpStartAddress = (((*(VP_U32)(OTG_EP_BASE+(16*1)+4))>>16)&0x0000FFFF);
			
	//write the 24 bytes
	for (k=0;k<6;k++)
	*(VP_U32)(OTG_DATA_BASE + EpStartAddress + (k*0x4)) = (_gUsbOtgStrDscptr2[k] );
	//write the last 2 bytes
	*(VP_U32)(OTG_DATA_BASE + EpStartAddress + (k*0x4)) = (_gUsbOtgStrDscptr2[k] & 0xFFFF);

	ClearXYBufferInt();
	Ready_EP_IN(0);		//ready EP0

	//Set/Clear Fill Status
	SetClearFillStatus(EP0IN);		



}

void UsbOtgReturnStrDscptr3(void)
{

	int k=0;
	U32 EpStartAddress = 0;


	// return 2 bytes only
    if (_gUsbOtgDevReq[6] == 0x02)
	{
		//Re - EPConfig for EP0 IN
		//DW0 = 0x00080000	configure EP0 for CTRL setup, max. ps = 8
		//DW1 = 0x01000000	YBuf = 0x0100; XBuf = 0x00
		//DW2 reserved
		//DW3 = 0x00E00002	buffer size = 7 +1 ; TotalByteCnt = 2 byte
 	//	Disable_EP_IN(EP0);	//disable EP0 IN
  		EPConfig(EP0, EP_IN_DIR,   0,  0, 8, CTL_TYPE, (0*16),  200,   8,    2);
	//	Enable_EP(1);
		
		// need to manually toggle because this is EP0 IN, previous transactions is EP0 SETUP (Out)
		// as this is the first transfer of EP0 IN, it suppose to DATA0 seq bit
		// but since this is a CTRL transfer, SETUP (EP0 OUT) follow by STATUS (EP0 IN) 
		// thus although first transfer, it need to send DATA1, thus need to be manually toggle
		WriteEPToggleBit(EP0, EP_IN_DIR ,1);	//Toggle Status Stage In PID from DATA0 to DATA1


		//read the Start Address (xbsa, ybsa)
		if (EpNextBufToService & (EP0IN))	//X Buffer
			EpStartAddress = ((*(VP_U32)(OTG_EP_BASE+(16*1)+4))&0x0000FFFF);
		else		//Y Buffer
			EpStartAddress = (((*(VP_U32)(OTG_EP_BASE+(16*1)+4))>>16)&0x0000FFFF);
				
		//write the 2 bytes
		*(VP_U32)(OTG_DATA_BASE +EpStartAddress + (0*0x4)) = (_gUsbOtgStrDscptr3[0] & 0xFFFF);
	
		ClearXYBufferInt();
		Ready_EP_IN(0);		//ready EP0
		
		//Set/Clear Fill Status
		SetClearFillStatus(EP0IN);		
			
	}
	
	//return all 24 bytes
    else	
    {
		//Re - EPConfig for EP0 IN
		//DW0 = 0x00080000	configure EP0 for CTRL setup, max. ps = 8
		//DW1 = 0x01000000	YBuf = 0x0100; XBuf = 0x00
		//DW2 reserved
		//DW3 = 0x00E00016	buffer size = 7 +1 ; TotalByteCnt = 4 byte
		
 	//	Disable_EP_IN(EP0);	//disable EP0 IN
  		EPConfig(EP0, EP_IN_DIR,   0,  0, 8, CTL_TYPE, (0*16),  200,   24,    24);
	//	Enable_EP(1);
		
		// need to manually toggle because this is EP0 IN, previous transactions is EP0 SETUP (Out)
		// as this is the first transfer of EP0 IN, it suppose to DATA0 seq bit
		// but since this is a CTRL transfer, SETUP (EP0 OUT) follow by STATUS (EP0 IN) 
		// thus although first transfer, it need to send DATA1, thus need to be manually toggle
		WriteEPToggleBit(EP0, EP_IN_DIR ,1);	//Toggle Status Stage In PID from DATA0 to DATA1


		//read the Start Address (xbsa, ybsa)
		if (EpNextBufToService & (EP0IN))	//X Buffer
			EpStartAddress = ((*(VP_U32)(OTG_EP_BASE+(16*1)+4))&0x0000FFFF);
		else		//Y Buffer
			EpStartAddress = (((*(VP_U32)(OTG_EP_BASE+(16*1)+4))>>16)&0x0000FFFF);
				
		//write the 24 bytes
		for (k=0;k<6;k++)
			*(VP_U32)(OTG_DATA_BASE +EpStartAddress + (k*0x4)) = (_gUsbOtgStrDscptr3[k] & 0xFFFFFFFF);
	
		ClearXYBufferInt();
		Ready_EP_IN(0);		//ready EP0
		
		//Set/Clear Fill Status
		SetClearFillStatus(EP0IN);		
//20030827
if (_gUsbOtgDevReq[6]!=24){
		//to complete the previous 24 bytes transfer
  		//check for EP0 IN transfer done 
  		while (!(*(VP_U32)OTG_FUNC_EP_DSTAT & EP0IN));
  
  		//clear EP0 IN transfer done 
  		*(VP_U32)OTG_FUNC_EP_DSTAT = EP0IN;
  		ClearXYBufferInt();
  
  		//un ready the EP0IN
  		unready_ep_in(EP0);

		// initiate another zero length byte packet at DATA0  
  		//configure for the zero length packet
   		EPConfig(EP0, EP_IN_DIR,   0,  0, 8, CTL_TYPE, (0*16),  200,   8,    0);
  
  		//Set/Clear Fill Status
  		SetClearFillStatus(EP0IN); 

  		ClearXYBufferInt();
  		Ready_EP_IN(0);  //ready EP0
  
  		//Set/Clear Fill Status
  		//SetClearFillStatus(EP0IN); 
}//20030827
    }
 
}