qtimer.h

MC56F802BLDC 可以使用的算法 就是电机启动有点慢

/* Input and Output polarity select (used in QT_INPUT_POLARITY command) */
#define	QT_NORMAL_POLARITY				false
#define	QT_INVERTED_POLARITY			true

/* Input Capture Mode (used in QT_SET_CAPTURE_MODE command) */
#define QT_CAPTURE_DISABLED				0	/*0x0000*/
#define QT_RISING_EDGE					1	/*0x0040*/
#define QT_FALLING_EDGE					2	/*0x0080*/
#define QT_BOTH_EDGES					3	/*0x00C0*/

/* enable/disable */
#define	QT_DISABLE						false
#define	QT_ENABLE						true



/*******************************************************************************
	Register bits
*******************************************************************************/
/* CONTROL REGISTER */
#define QT_COUNT_ONCE_BIT				0x0040
#define QT_COUNT_LENGTH_BIT				0x0020
#define QT_COUNT_DIRECTION_BIT			0x0010
#define QT_CO_INIT_BIT					0x0008
/* STATUS CONTROL REGISTER*/
#define QT_INPUT_POLARITY_BIT			0x0200
#define QT_EXT_INPUT_PIN				0x0100
#define QT_MASTER_MODE_BIT				0x0020
#define QT_ENABLE_OFLAG_FORCE_BIT		0x0010
#define QT_OFLAG_VALUE_BIT				0x0008
#define QT_FORCE_OFLAG_BIT				0x0004
#define QT_OUTPUT_POLARITY_BIT			0x0002
#define QT_OUTPUT_ENABLE_BIT			0x0001



/* Function prototypes */
void qtInit(arch_sTimerChannel *pTimerBase);




/*******************************************************************************
	Implementations of Quad Timer ioctl() commands
*******************************************************************************/
#define ioctlQT_INIT(pTimerBase,param)	qtInit((arch_sTimerChannel *) pTimerBase)


/* Control Register */
#define ioctlQT_SET_COUNT_MODE(pTimerBase, param) \
	{ periphBitClear(0xE000, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->ControlReg)); \
	  periphBitSet(param << 13, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->ControlReg)); }

#define ioctlQT_SET_PRIMARY_SOURCE(pTimerBase,param) \
	{ periphBitClear(0x1E00, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->ControlReg)); \
	  periphBitSet(param << 9, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->ControlReg)); }

#define ioctlQT_SET_SECONDARY_SOURCE(pTimerBase,param) \
	{ periphBitClear(0x0180, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->ControlReg)); \
	  periphBitSet(param << 7, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->ControlReg)); }

#define ioctlQT_SET_COUNT_ONCE(pTimerBase, param) \
	if (param) {periphBitSet(QT_COUNT_ONCE_BIT, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->ControlReg));} \
	else		 {periphBitClear(QT_COUNT_ONCE_BIT, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->ControlReg));}
				
#define ioctlQT_SET_COUNT_LENGTH(pTimerBase, param) \
	if (param) {periphBitSet(QT_COUNT_LENGTH_BIT, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->ControlReg));} \
	else		 {periphBitClear(QT_COUNT_LENGTH_BIT, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->ControlReg));}

#define ioctlQT_SET_COUNT_DIRECTION(pTimerBase, param) \
	if (param) {periphBitSet(QT_COUNT_DIRECTION_BIT, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->ControlReg));} \
	else		 {periphBitClear(QT_COUNT_DIRECTION_BIT, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->ControlReg));}

#define ioctlQT_CO_CHANNEL_INIT(pTimerBase, param) \
	if (param) {periphBitSet(QT_CO_INIT_BIT, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->ControlReg));} \
	else		 {periphBitClear(QT_CO_INIT_BIT, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->ControlReg));}

#define ioctlQT_SET_OUTPUT_MODE(pTimerBase,param) \
	{ periphBitClear(0x0007, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->ControlReg)); \
	  periphBitSet(param, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->ControlReg)); }


/* Status and Control Register */
#define ioctlQT_SET_FLAG(pTimerBase,param) \
	periphBitSet(param, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->StatusControlReg))

#define ioctlQT_CLEAR_FLAG(pTimerBase,param) \
	periphBitClear(param, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->StatusControlReg))

#define ioctlQT_READ_FLAG(pTimerBase,param) \
	periphBitTest(param, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->StatusControlReg))

#define ioctlQT_ENABLE_INT(pTimerBase,param) \
	periphBitSet(param, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->StatusControlReg))

#define ioctlQT_DISABLE_INT(pTimerBase,param) \
	periphBitClear(param, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->StatusControlReg))

#define ioctlQT_SET_INPUT_POLARITY(pTimerBase, param) \
	if (param) {periphBitSet(QT_INPUT_POLARITY_BIT, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->StatusControlReg));} \
	else		 {periphBitClear(QT_INPUT_POLARITY_BIT, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->StatusControlReg));}

#define ioctlQT_READ_EXT_INPUT_PIN(pTimerBase,param) \
	periphBitTest(QT_EXT_INPUT_PIN, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->StatusControlReg))

#define ioctlQT_SET_CAPTURE_MODE(pTimerBase, param)	\
	{ periphBitClear(0x00C0, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->StatusControlReg)); \
	  periphBitSet(param << 6, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->StatusControlReg)); }

#define ioctlQT_MASTER_MODE(pTimerBase, param) \
	if (param) {periphBitSet(QT_MASTER_MODE_BIT, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->StatusControlReg));} \
	else		 {periphBitClear(QT_MASTER_MODE_BIT, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->StatusControlReg));}

#define ioctlQT_EXT_OFLAG_FORCE(pTimerBase, param) \
	if (param) {periphBitSet(QT_ENABLE_OFLAG_FORCE_BIT, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->StatusControlReg));} \
	else		 {periphBitClear(QT_ENABLE_OFLAG_FORCE_BIT, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->StatusControlReg));}

#define ioctlQT_FORCE_OFLAG(pTimerBase, param) \
    if(param)	{periphBitSet(QT_OFLAG_VALUE_BIT, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->StatusControlReg)); } \
    else		{periphBitClear(QT_OFLAG_VALUE_BIT, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->StatusControlReg)); } \
    periphBitSet(QT_FORCE_OFLAG_BIT, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->StatusControlReg))

#define ioctlQT_SET_OUTPUT_POLARITY(pTimerBase, param) \
	if (param) {periphBitSet(QT_OUTPUT_POLARITY_BIT, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->StatusControlReg));} \
	else		 {periphBitClear(QT_OUTPUT_POLARITY_BIT, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->StatusControlReg));}

#define ioctlQT_OUTPUT_ON_EXT_PIN(pTimerBase, param) \
	if (param) {periphBitSet(QT_OUTPUT_ENABLE_BIT, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->StatusControlReg));} \
	else		 {periphBitClear(QT_OUTPUT_ENABLE_BIT, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->StatusControlReg));}



/* Reading(writing) from(to) registers */
#define ioctlQT_WRITE_CONTROL_REG(pTimerBase,param) \
	periphMemWrite(param, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->ControlReg))

#define ioctlQT_WRITE_STATUS_CONTROL_REG(pTimerBase,param) \
	periphMemWrite(param, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->StatusControlReg))

#define ioctlQT_WRITE_COMPARE_REG1(pTimerBase,param) \
	periphMemWrite(param, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->CompareReg1))

#define ioctlQT_WRITE_COMPARE_REG2(pTimerBase,param) \
	periphMemWrite(param, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->CompareReg2))

#define ioctlQT_WRITE_LOAD_REG(pTimerBase,param) \
	periphMemWrite(param, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->LoadReg))

#define ioctlQT_WRITE_COUNTER_REG(pTimerBase,param) \
	periphMemWrite(param, (UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->CounterReg))


#define ioctlQT_READ_CONTROL_REG(pTimerBase,param) \
	periphMemRead((UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->ControlReg))

#define ioctlQT_READ_STATUS_CONTROL_REG(pTimerBase,param) \
	periphMemRead((UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->StatusControlReg))

#define ioctlQT_READ_COMPARE_REG1(pTimerBase,param) \
	periphMemRead((UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->CompareReg1))

#define ioctlQT_READ_COMPARE_REG2(pTimerBase,param) \
	periphMemRead((UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->CompareReg2))

#define ioctlQT_READ_LOAD_REG(pTimerBase,param) \
	periphMemRead((UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->LoadReg))

#define ioctlQT_READ_COUNTER_REG(pTimerBase,param) \
	periphMemRead((UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->CounterReg))

#define ioctlQT_READ_CAPTURE_REG(pTimerBase,param) \
	periphMemRead((UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->CaptureReg))

#define ioctlQT_READ_HOLD_REG(pTimerBase,param) \
	periphMemRead((UWord16 *)(&((arch_sTimerChannel*)pTimerBase)->HoldReg))




/**********************************************************************
* Include of device specific QTIMER commands and defines
***********************************************************************/
#include "qtimertarget.h"  /* device specific defines */


#endif