sys.h

来自「MC56F802BLDC 可以使用的算法 就是电机启动有点慢」· C头文件 代码 · 共 211 行

/*****************************************************************************
*
* Motorola Inc.
* (c) Copyright 2001 Motorola, Inc.
* ALL RIGHTS RESERVED.
*
******************************************************************************
*
* File Name: sys.h
*
* Description: SYS system reset, low voltage interrupt and various system 
*			   support macros and definitions
*
* Modules Included: none
*
*****************************************************************************/


#ifndef __SYS_H
#define __SYS_H


/************************************************************
* COP module identifier, corresponds to module base address
*************************************************************/
#define SYS (&ArchIO.Sim)

/***************************************************
* SYS ioctl commands
****************************************************/
/* command                    |        Param       */

/* SYS(SIM) registers initialization according static config in AppConfig.h */
#define SYS_INIT				/* NULL */

/* enable pull-up for defined pin group */
#define SYS_PULL_UP_ENABLE		/* SYS_TIMER_IO | SYS_CONTROL_BUS */
								/* | SYS_ADDRESS_BUS | SYS_DATA_BUS */
/* disable pull-up for defined pin group */
#define SYS_PULL_UP_DISABLE		/* SYS_TIMER_IO | SYS_CONTROL_BUS */
								/* | SYS_ADDRESS_BUS | SYS_DATA_BUS */

/* memory boot map mode when MA=0 and MB=0 */
#define SYS_BOOT_MAP			/* SYS_HALF_INTERN_EXTERN (1) / SYS_INTERNAL */

/* low voltage interrupt enable for defined level */
#define SYS_LOW_VOLTAGE_INT_ENABLE	/* SYS_22V_LEVEL | SYS_27V_LEVEL */
/* low voltage interrupt disable for defined level */
#define SYS_LOW_VOLTAGE_INT_DISABLE	/* SYS_22V_LEVEL | SYS_27V_LEVEL */

/* permanent stop/wait disable - if disabled stop/wait acts as loop */
/* can be enabled only by RESET */
#define SYS_STOP_WAIT_PERMANENT_DISABLE /* NULL */
/* reprogramable stop/wait disable - if disabled stop/wait acts as loop */ 
#define SYS_STOP_WAIT 				/* SYS_ENABLE (0)/SYS_DISABLE (1) */

/* get/test type of the previous RESET */
#define SYS_TEST_RESET_SOURCE		/* SYS_COP_RESET | SYS_EXTERN_RESET | SYS_POWER_ON_RESET */

/* test low voltage interrupt flags */
#define SYS_GET_LOW_VOLTAGE			/* SYS_22V_LEVEL | SYS_27V_LEVEL */

/* clear low voltage interrupt flags */
#define SYS_CLEAR_LOW_VOLTAGE		/* SYS_22V_LEVEL | SYS_27V_LEVEL */

/* Bus Control Register - it is core register but it is added here because */
/* it affects mainly peripheral and external devices */
/* system bus driven(1)/undriven when not accessed */
#define SYS_SET_DRIVE_BUS		/* SYS_DRIVEN (1)/ SYS_NON_DRIVEN */

/* set wait states for both memories (X: and P:) */
#define SYS_SET_WAIT_STATES	/* SYS_PMEM_WAIT_STx | SYS_XMEM_WAIT_STx, x=0,4,8,12 */  

/****************************************************************************
* SYS constants and type declarations used in the ioctl functions
*****************************************************************************/

#define SYS_ENABLE		1
#define SYS_DISABLE 	0

#define SYS_DRIVEN		1
#define SYS_NON_DRIVEN	0

#define SYS_HALF_INTERN_EXTERN	1
#define SYS_INTERNAL			0

#define SYS_22V_LEVEL		0x0001 
#define SYS_27V_LEVEL		0x0002

#define SYS_COP_RESET		0x0010
#define SYS_EXTERN_RESET	0x0008
#define SYS_POWER_ON_RESET	0x0004

#define SYS_TIMER_IO	0x0800
#define SYS_CONTROL_BUS	0x0400
#define SYS_ADDRESS_BUS	0x0200
#define SYS_DATA_BUS	0x0100

/* constants and bit masks */

#define	SYS_TMRPD	0x0800
#define	SYS_CTRLPD	0x0400
#define	SYS_ADRPD	0x0200
#define	SYS_DATAPD	0x0100
#define	SYS_BOOTMAP_B	0x0010
#define	SYS_LVIE27	0x0008
#define	SYS_LVIE22	0x0004
#define	SYS_PD		0x0002
#define	SYS_RPD		0x0001

#define SYS_COPR	0x0010
#define SYS_EXTR	0x0008
#define SYS_POR		0x0004
#define SYS_LVIS27	0x0002
#define SYS_LVIS22	0x0001

#define SYS_PMEM_WAIT_ST0	0x0000
#define SYS_PMEM_WAIT_ST4	0x0004
#define SYS_PMEM_WAIT_ST8	0x0008
#define SYS_PMEM_WAIT_ST12	0x000C

#define SYS_XMEM_WAIT_ST0	0x0000
#define SYS_XMEM_WAIT_ST4	0x0040
#define SYS_XMEM_WAIT_ST8	0x0080
#define SYS_XMEM_WAIT_ST12	0x00C0


#define SYS_BCR_DRV	0x0200

/****************************************************************************
* SYS function prototypes
*****************************************************************************/
extern void sys_Init(arch_sSIM *pSimBase);

/***********************************************************************
* SYS control command macros
***********************************************************************/
/* SYS initialization */
#define ioctlSYS_INIT(pSimBase,param) sys_Init((arch_sSIM*)pSimBase)

/* SYS pull-ups enable */
#define ioctlSYS_PULL_UP_ENABLE(pSimBase,param) \
  periphBitClear(param, (UWord16 *) &((arch_sSIM*)pSimBase)->ControlReg);

/* SYS pull-ups disable */
#define ioctlSYS_PULL_UP_DISABLE(pSimBase,param) \
  periphBitSet(param, (UWord16 *) &((arch_sSIM*)pSimBase)->ControlReg);

/* SYS boot map half internal-external(1) / internal */
#define ioctlSYS_BOOT_MAP(pSimBase,param) \
 if (param) periphBitSet(SYS_BOOTMAP_B, (UWord16 *) &((arch_sSIM*)pSimBase)->ControlReg); \
 else periphBitClear(SYS_BOOTMAP_B, (UWord16 *) &((arch_sSIM*)pSimBase)->ControlReg)

/* SYS low voltage interrupt enable */
#define ioctlSYS_LOW_VOLTAGE_INT_ENABLE(pSimBase,param) \
  periphBitSet((param)<<2, (UWord16 *) &((arch_sSIM*)pSimBase)->ControlReg);

/* SYS low voltage interrupt disable */
#define ioctlSYS_LOW_VOLTAGE_INT_DISABLE(pSimBase,param) \
  periphBitClear((param)<<2, (UWord16 *) &((arch_sSIM*)pSimBase)->ControlReg);

/* SYS stop/wait mode permanent disable (acts as loop) */
#define ioctlSYS_STOP_WAIT_PERMANENT_DISABLE(pSimBase,param) periphBitSet(SYS_PD, \
                                    (UWord16 *) &((arch_sSIM*)pSimBase)->ControlReg)

/* SYS stop/wait mode rewritable enable(1)/disable (acts as loop) */
#define ioctlSYS_STOP_WAIT(pSimBase,param) \
 if (param) periphBitClear(SYS_RPD, (UWord16 *) &((arch_sSIM*)pSimBase)->ControlReg); \
 else periphBitSet(SYS_RPD, (UWord16 *) &((arch_sSIM*)pSimBase)->ControlReg)


/* test SYS Status COPR, EXTR, POR bits */
#define ioctlSYS_TEST_RESET_SOURCE(pSimBase,param) \
  periphBitTest(param, (UWord16 *) &((arch_sSIM*)pSimBase)->StatusReg)


/* test SYS Status LVIS27, LVIS22 bits */
#define ioctlSYS_GET_LOW_VOLTAGE(pSimBase,param) \
  periphBitTest(param, (UWord16 *) &((arch_sSIM*)pSimBase)->StatusReg)


/* clear SYS Status LVIS27, LVIS22 bits (cleared by writing "1") */
#define ioctlSYS_CLEAR_LOW_VOLTAGE(pSimBase,param) \
  periphBitSet(param, (UWord16 *) &((arch_sSIM*)pSimBase)->StatusReg)

/* system bus driven(1)/undriven when not accessed */
#define ioctlSYS_SET_DRIVE_BUS(pCore,param) \
 if (param) periphBitSet(SYS_BCR_DRV, &(ArchCore.BusControlReg)); \
 else periphBitClear(SYS_BCR_DRV, &(ArchCore.BusControlReg))

/* sets wait states for program and data memory */
#define ioctlSYS_SET_WAIT_STATES(pCore,param) \
  ArchCore.BusControlReg = (ArchCore.BusControlReg & 0xFF00) | ((UWord16) (param))


/***********************************************************************
* SYS static configuration items
***********************************************************************/
/* these items should be added to AppConfig.h config file and appropriate
   init values should be chosen. It is also possible to generate AppConfig.h
   by graphic configuration tool
*/

/*
#define SYS_CONTROL_REG 0x0000
#define SYS_BUS_CONTROL_REG 0x00CC
*/


#endif