sci.c

MC56F802BLDC 可以使用的算法 就是电机启动有点慢

/******************************************************************************
*
* Motorola Inc.
* (c) Copyright 2001 Motorola, Inc.
* ALL RIGHTS RESERVED.
*
*******************************************************************************
*
* FILE NAME: sci.c   
*
* DESCRIPTION: Source file for SCI Driver
*
* MODULES INCLUDED: none
*
* NOTES:
*
*******************************************************************************/

#include "types.h"
#include "arch.h"
#include "periph.h"

#include "appconfig.h"
#include "sci.h"

/****************************************************/
/* global variables used in read/write functions    */
/****************************************************/
volatile        UWord16  sci0_status;            /* status word */
volatile        UWord16  sci0_TxCounter = 0;     /* TX counter */
volatile static UWord16 *sci0_TxDataPtr;         /* pointer to TX data */
volatile        UWord16  sci0_RxCounter = 0;     /* RX counter */
volatile static UWord16 *sci0_RxDataPtr;         /* pointer to RX data */

#if( defined(DSP56F805) || defined(DSP56F807) )
volatile        UWord16  sci1_status;            /* status word */
volatile        UWord16  sci1_TxCounter = 0;     /* TX counter */
volatile static UWord16 *sci1_TxDataPtr;         /* pointer to TX data */
volatile        UWord16  sci1_RxCounter = 0;     /* RX counter */
volatile static UWord16 *sci1_RxDataPtr;         /* pointer to RX data */
#endif

/********************************************************************************
 sciInit() function performs the SCI module static configuration
 based on the configurable items from appconfig.h 
********************************************************************************/
void sciInit(arch_sSCI *pSciBase)
{
	if (pSciBase == SCI_0)
	{
		#ifdef SCI_0_BAUD_RATE_REG
		periphMemWrite(SCI_0_BAUD_RATE_REG, &pSciBase->BaudRateReg);
		#endif
		
		#ifdef SCI_0_CONTROL_REG
		periphMemWrite(SCI_0_CONTROL_REG, &pSciBase->ControlReg);
		#endif
		
		/* !!! initialization because of CW4.0 bug !!! */
		sci0_TxCounter = 0;
		sci0_RxCounter = 0;
		sci0_status = 0;
	}
#if( defined(DSP56F805) || defined(DSP56F807) )
	else
	{
		#ifdef SCI_1_BAUD_RATE_REG
		periphMemWrite(SCI_1_BAUD_RATE_REG, &pSciBase->BaudRateReg);
		#endif
		
		#ifdef SCI_1_CONTROL_REG
		periphMemWrite(SCI_1_CONTROL_REG, &pSciBase->ControlReg);
		#endif

		/* !!! initialization because of CW4.0 bug !!! */
		sci1_TxCounter = 0;
		sci1_RxCounter = 0;
		sci1_status = 0;
	}
#endif
}


/********************************************************************************
 read_SCI_0_NON_BLOCKING() function performs nonblocking SCI block read using buffers 
********************************************************************************/
void read_SCI_0_NON_BLOCKING(UWord16 *data, UWord16 size)
{
	if (sci0_RxCounter == 0)
	{
		sci0_RxDataPtr = (UWord16 *) data;
		sci0_RxCounter = size;
		periphBitSet(SCI_STATUS_READ_INPROGRESS,&sci0_status);  /* read in progress */

		/* clear exception if any */		
		if(ioctl(SCI_0, SCI_GET_ERROR, NULL)) /* read SCI status register */
		{
			ioctl(SCI_0, SCI_CLEAR_STATUS_REG, NULL);	/* clear exception */
		}
		
		/* enable all RX interrupts */
		ioctl(SCI_0, SCI_RX_FULL_INT, SCI_ENABLE);	
		ioctl(SCI_0, SCI_RX_ERROR_INT, SCI_ENABLE);
	}
}

/********************************************************************************
 read_SCI_0_BLOCKING() function performs blocking SCI block read using buffers 
********************************************************************************/
void read_SCI_0_BLOCKING(UWord16 *data, UWord16 size)
{
	if (sci0_RxCounter == 0)
	{
		sci0_RxDataPtr = (UWord16 *) data;
		sci0_RxCounter = size;

		while (sci0_RxCounter)
		{
		    /* clear exception if any */		
		    if(ioctl(SCI_0, SCI_GET_ERROR, NULL))   /* read SCI status register */
		    {
		    	ioctl(SCI_0, SCI_CLEAR_STATUS_REG, NULL);	/* clear exception */
		    }
			if (ioctl(SCI_0, SCI_GET_RX_FULL, NULL))
			{
				*(sci0_RxDataPtr++) = ioctl(SCI_0, SCI_READ_DATA, NULL); 
				sci0_RxCounter--;
			}
		}
	}
}

/********************************************************************************
 write_SCI_0_NON_BLOCKING() function performs nonblocking SCI block write using buffers 
********************************************************************************/
void write_SCI_0_NON_BLOCKING(UWord16 *data, UWord16 size)
{
	UWord16 sci_tmp;
	
	if (sci0_TxCounter == 0)
	{	
		sci0_TxDataPtr = (UWord16 *) data;
		sci0_TxCounter = size;
	 	
		/* clear exception if any */
		if(ioctl(SCI_0, SCI_GET_ERROR, NULL))   /* read SCI status register */
		{
			ioctl(SCI_0, SCI_CLEAR_STATUS_REG, NULL);	/* clear exception */
		}

	 	sci_tmp = ioctl(SCI_0, SCI_GET_STATUS_REG, NULL);
		ioctl(SCI_0, SCI_WRITE_DATA, *sci0_TxDataPtr++);
		
		periphBitSet(SCI_STATUS_WRITE_INPROGRESS, &sci0_status);  /* write in progress */
		ioctl(SCI_0, SCI_TX_EMPTY_INT, SCI_ENABLE);
	}
}

/********************************************************************************
 write_SCI_0_BLOCKING() function performs blocking SCI block write using buffers 
********************************************************************************/
void write_SCI_0_BLOCKING(UWord16 *data, UWord16 size)
{
	UWord16 sci_tmp;

	if (sci0_TxCounter == 0)
	{	
		sci0_TxDataPtr = (UWord16 *) data;
		sci0_TxCounter = size;

		/* clear exception if any */	 	
		if(ioctl(SCI_0, SCI_GET_ERROR, NULL))   /* read SCI status register */
		{
			ioctl(SCI_0, SCI_CLEAR_STATUS_REG, NULL);	/* clear exception */
		}
	
		while (sci0_TxCounter)
		{
			if (ioctl(SCI_0, SCI_GET_STATUS_REG, NULL) & SCI_TDRE)
			{
				sci_tmp = ioctl(SCI_0, SCI_GET_STATUS_REG, NULL);
		 		ioctl(SCI_0, SCI_WRITE_DATA, *sci0_TxDataPtr++);
		 		sci0_TxCounter--;
			}
		}
	}
}

/********************************************************************************
 read_SCI_1_NON_BLOCKING() function performs nonblocking SCI block read using buffers 
********************************************************************************/
#if( defined(DSP56F805) || defined(DSP56F807) )
void read_SCI_1_NON_BLOCKING(UWord16 *data, UWord16 size)
{
	if (sci1_RxCounter == 0)
	{
		sci1_RxDataPtr = (UWord16 *) data;
		sci1_RxCounter = size;
		periphBitSet(SCI_STATUS_READ_INPROGRESS,&sci1_status);  /* read in progress */
		
		/* clear exception if any */		
		if(ioctl(SCI_1, SCI_GET_ERROR, NULL)) /* read SCI status register */
		{
			ioctl(SCI_1, SCI_CLEAR_STATUS_REG, NULL);	/* clear exception */
		}
		
		/* enable all RX interrupts */
		ioctl(SCI_1, SCI_RX_FULL_INT, SCI_ENABLE);	
		ioctl(SCI_1, SCI_RX_ERROR_INT, SCI_ENABLE);
	}
}
#endif
/********************************************************************************
 read_SCI_1_BLOCKING() function performs blocking SCI block read using buffers 
********************************************************************************/
#if( defined(DSP56F805) || defined(DSP56F807) )
void read_SCI_1_BLOCKING(UWord16 *data, UWord16 size)
{
	if (sci1_RxCounter == 0)
	{
		sci1_RxDataPtr = (UWord16 *) data;
		sci1_RxCounter = size;

		while (sci1_RxCounter)
		{
    		/* clear exception if any */		
    		if(ioctl(SCI_1, SCI_GET_ERROR, NULL)) /* read SCI status register */
    		{
    			ioctl(SCI_1, SCI_CLEAR_STATUS_REG, NULL);	/* clear exception */
    		}
			if (ioctl(SCI_1, SCI_GET_RX_FULL, NULL))
			{
				*(sci1_RxDataPtr++) = ioctl(SCI_1, SCI_READ_DATA, NULL);
				sci1_RxCounter--; 
			}
		}
	}
}
#endif
/********************************************************************************
 write_SCI_1_NON_BLOCKING() function performs nonblocking SCI block write using buffers 
********************************************************************************/
#if( defined(DSP56F805) || defined(DSP56F807) )
void write_SCI_1_NON_BLOCKING(UWord16 *data, UWord16 size)
{
	UWord16 sci_tmp;

	if (sci1_TxCounter == 0)
	{	
		sci1_TxDataPtr = (UWord16 *) data;
		sci1_TxCounter = size;
	 	
		/* clear exception if any */
		if(ioctl(SCI_1, SCI_GET_ERROR, NULL))   /* read SCI status register */
		{
			ioctl(SCI_1, SCI_CLEAR_STATUS_REG, NULL);	/* clear exception */
		}

	 	sci_tmp = ioctl(SCI_1, SCI_GET_STATUS_REG, NULL);
		ioctl(SCI_1, SCI_WRITE_DATA, *sci1_TxDataPtr++);
		
		periphBitSet(SCI_STATUS_WRITE_INPROGRESS, &sci1_status);  /* write in progress */
		ioctl(SCI_1, SCI_TX_EMPTY_INT, SCI_ENABLE);
	}
}
#endif
/********************************************************************************
 write_SCI_1_BLOCKING() function performs blocking SCI block write using buffers 
********************************************************************************/
#if( defined(DSP56F805) || defined(DSP56F807) )
void write_SCI_1_BLOCKING(UWord16 *data, UWord16 size)
{
	UWord16 sci_tmp;

	if (sci1_TxCounter == 0)
	{	
		sci1_TxDataPtr = (UWord16 *) data;
		sci1_TxCounter = size;

		/* clear exception if any */	 	
		if(ioctl(SCI_1, SCI_GET_ERROR, NULL))   /* read SCI status register */
		{
			ioctl(SCI_1, SCI_CLEAR_STATUS_REG, NULL);	/* clear exception */
		}
	
		while (sci1_TxCounter)
		{
			if (ioctl(SCI_1, SCI_GET_STATUS_REG, NULL) & SCI_TDRE)
			{
				sci_tmp = ioctl(SCI_1, SCI_GET_STATUS_REG, NULL);
		 		ioctl(SCI_1, SCI_WRITE_DATA, *sci1_TxDataPtr++);
		 		sci0_TxCounter--;
			}
		}
	}

}
#endif
/********************************************************************************
  read/write interrupt functions
********************************************************************************/

/********************************************************************************
 Sci0ReceiverFullISR() function performs nonblocking SCI block read using buffers 
********************************************************************************/
#pragma interrupt
void Sci0RxFullISR(void)
{
	UWord16 sci_tmp;

	if (sci0_RxCounter)
	{
		sci_tmp = ioctl(SCI_0, SCI_GET_STATUS_REG, NULL);
		*(sci0_RxDataPtr++) = ioctl(SCI_0, SCI_READ_DATA, NULL); 
		if ((--sci0_RxCounter) == 0)
		{
			periphBitClear(SCI_STATUS_READ_INPROGRESS,&sci0_status);  /* end of read */			
		}
	}
	else
	{
		sci_tmp = ioctl(SCI_0, SCI_GET_STATUS_REG, NULL); 	/* clear status register */
		sci_tmp = ioctl(SCI_0, SCI_READ_DATA, NULL); 			/* throw away received byte */
		periphBitSet(SCI_STATUS_EXCEPTION_EXIST | SCI_EXCEPTION_BUFFER_OVERFLOW,&sci0_status);  /* buffer overflow */				
	}
}

/********************************************************************************
 Sci0TransmitterEmptyISR() function performs nonblocking SCI block write using buffers 
********************************************************************************/
#pragma interrupt
void Sci0TxEmptyISR(void)
{
	UWord16 sci_tmp;

	if (--sci0_TxCounter)
	{
		sci_tmp = ioctl(SCI_0, SCI_GET_STATUS_REG, NULL);
	 	ioctl(SCI_0,SCI_WRITE_DATA,*sci0_TxDataPtr++);
	}
	else
	{
		/* disable TX interrupt */
		ioctl(SCI_0, SCI_TX_EMPTY_INT, SCI_DISABLE);
		periphBitClear(SCI_STATUS_WRITE_INPROGRESS,&sci0_status);  /* end of write */	   
	}
}

/********************************************************************************
 Sci0ReceiverErrorISR() function performs SCI module error handling 
********************************************************************************/
#pragma interrupt
void Sci0RxErrorISR(void)
{
	UWord16 sci_tmp;

	periphBitSet(SCI_STATUS_EXCEPTION_EXIST, &sci0_status);
	sci_tmp = ioctl(SCI_0, SCI_GET_STATUS_REG, NULL);
	ioctl(SCI_0, SCI_CLEAR_STATUS_REG, NULL);
}

/********************************************************************************
 Sci1ReceiverFullISR() function performs nonblocking SCI block read using buffers 
********************************************************************************/
#if( defined(DSP56F805) || defined(DSP56F807) )
#pragma interrupt
void Sci1RxFullISR(void)
{
	UWord16 sci_tmp;

	if (sci1_RxCounter)
	{
		sci_tmp = ioctl(SCI_1, SCI_GET_STATUS_REG, NULL);
		*(sci1_RxDataPtr++) = ioctl(SCI_1, SCI_READ_DATA, NULL); 
		if ((--sci1_RxCounter) == 0)
		{
			periphBitClear(SCI_STATUS_READ_INPROGRESS,&sci1_status);  /* end of read */			
		}
	}
	else
	{
		sci_tmp = ioctl(SCI_1, SCI_GET_STATUS_REG, NULL); 	/* clear status register */
		sci_tmp = ioctl(SCI_1, SCI_READ_DATA, NULL); 			/* throw away received byte */
		periphBitSet(SCI_STATUS_EXCEPTION_EXIST | SCI_EXCEPTION_BUFFER_OVERFLOW,&sci1_status);  /* buffer overflow */				
	}
}
#endif
/********************************************************************************
 Sci1TransmitterEmptyISR() function performs nonblocking SCI block write using buffers 
********************************************************************************/
#if( defined(DSP56F805) || defined(DSP56F807) )
#pragma interrupt
void Sci1TxEmptyISR(void)
{
	UWord16 sci_tmp;

	if (--sci1_TxCounter)
	{
		sci_tmp = ioctl(SCI_1, SCI_GET_STATUS_REG, NULL);
	 	ioctl(SCI_1,SCI_WRITE_DATA,*sci1_TxDataPtr++);
	}
	else
	{
		/* disable TX interrupt */
		ioctl(SCI_1, SCI_TX_EMPTY_INT, SCI_DISABLE);
		periphBitClear(SCI_STATUS_WRITE_INPROGRESS,&sci1_status);  /* end of write */	   
	}
}
#endif
/********************************************************************************
 Sci1ReceiverErrorISR() function performs SCI module error handling 
********************************************************************************/
#if( defined(DSP56F805) || defined(DSP56F807) )
#pragma interrupt
void Sci1RxErrorISR(void)
{
	UWord16 sci_tmp;

	periphBitSet(SCI_STATUS_EXCEPTION_EXIST, &sci1_status);
	sci_tmp = ioctl(SCI_1, SCI_GET_STATUS_REG, NULL);
	ioctl(SCI_1, SCI_CLEAR_STATUS_REG, NULL);
}
#endif