📄 decoder.h
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/******************************************************************************
*
* Motorola Inc.
* (c) Copyright 2001 Motorola, Inc.
* ALL RIGHTS RESERVED.
*
*******************************************************************************
*
* FILE NAME: decoder.h
*
* DESCRIPTION: Header file for Quadrature Decoder driver
*
* MODULES INCLUDED: decodertarget.h
*
* NOTES:
*
*******************************************************************************/
#ifndef __DECODER_H
#define __DECODER_H
/******************************************************************************
*
* General Interface Description
*
* On the DSP56805/807, the Quad Timer modules A and B share pins with
* Quadrature Decoder modules #0 and #1. Note, the DSP56801 has no Quadrature Decoder
* module, the DSP56803 has one Quadrature Decoder module (#0) which shares pins with Quad
* Timer module A. If the shared pins are not configured as timer
* outputs, then the pins are available for use as inputs to the Quadrature Decoder modules.
* Each Quadrature Decoder module has four input signals: PHASEA, PHASEB, INDEX,
* and HOME.
* Each Quadrature Decoder module has circuitry called the switch matrix that provides a
* means to share the input pins with an associated timer module. The switch matrix has
* three modes. Mode 0 will provide the signals directly from the pins to the timer's inputs.
* Mode 1 will pass the pin signals through the Quadrature Decoder's digital filter, then
* place the filtered signals on the timer's inputs. Mode 2 will place the filtered version of
* PHASEA on the inputs of timer channels 0 and 1 and the filtered version of PHASEB on
* the inputs of timer channels 2 and 3. Mode 2 is most likely to be used with the Quadrature
* Decoder. This will allow the timer to time the period between the positive and negative
* transitions of PHASEA and PHASEB, to provide high precision velocity measurements at
* very low motor speeds.
*
* The Quadrature Decoder features:
* - Includes logic to decode quadrature signals
* - Configurable digital filter for inputs
* - 32-bit position counter
* - 16-bit position difference register
* - Maximum count frequency equals the peripheral clock rate
* - Position counter can be initialized by SW or external events
* - Preloadable 16-bit revolution counter
* - Inputs can be connected to a general purpose timer to aid low speed velocity
* measurements
* - Quadrature decoder filter can be bypassed
* - A watchdog timer to detect a non-rotating shaft condition
*
* For more information, please refer to the User Manual for the particular chip that you
* are using, such as the DSP56F801/803/805/807 User's Manual,
* for a description of the Quadratute Decoder device.
*
* The Quadratute Decoder device driver interface uses "ioctl" call to control specific
* Quadratute Decoder functions during operation. For details see "ioctl" call.
*
*
******************************************************************************/
/***************************************************************************
* Quadrature Decoder module identifiers; corresponds to module base address
****************************************************************************/
#define DEC_0 (&ArchIO.Decoder0) /* not applicable for DSP56801 */
#define DEC_1 (&ArchIO.Decoder1) /* not applicable for DSP56801/803 */
/****************************************************
* Configurable items, i.e. defines, for appconfig.h
*****************************************************
void decxxISR( void ); prototype for user ISR
#define INTERRUPT_VECTOR_ADDR_yy decxxISR
#define ITCN_INT_PRIORITY_yy value 0-7 (0 = interrupt disabled)
#define DEC_x_CONTROL_REG 0x0000
#define DEC_x_WATCHDOG_TIMEOUT_REG 0x0000
#define DEC_x_FILTER_INTERVAL_REG 0x0000
#define DEC_x_UPPER_INIT_REG 0x0000
#define DEC_x_LOWER_INIT_REG 0x0000
where:
x is Quadrature Decoder module (0 or 1)
yy is interrupt vector number
29 - Quadrature Decoder 0 INDEX Pulse
28 - Quadrature Decoder 0 Home switch or Watchdog
27 - Quadrature Decoder 1 INDEX Pulse
26 - Quadrature Decoder 1 Home switch or Watchdog
*/
/***********************************************************************
* ioctl() commands
*
* Word16 ioctl( Decoder_module_identifier, Command_name, Parameter );
*
************************************************************************
COMMAND NAME PARAMETERS, COMMENTS
------------------------------------------------------------------------------- */
#define DEC_INIT /* NULL */
#define DEC_HOME_INT_REQUEST_CLEAR /* NULL HIRQ */
#define DEC_HOME_INT /* DEC_ENABLE / DEC_DISABLE HIE in DECCR */
#define DEC_HOME_TRIGGERED_INIT /* DEC_ENABLE / DEC_DISABLE HIP in DECCR */
#define DEC_HOME_EDGE /* DEC_NEGATIVE / DEC_POSITIVE HNE in DECCR */
#define DEC_SOFTWARE_TRIGGERED_INIT /* NULL SWIP */
#define DEC_DIRECTION_COUNTING_ENABLE /* DEC_REVERSE / DEC_NORMAL REV in DECCR */
#define DEC_SINGLE_PHASE_COUNT /* DEC_ENABLE / DEC_DISABLE PH1 in DECCR */
#define DEC_INDEX_PULSE_INT_REQUEST_CLEAR /* NULL XIRQ */
#define DEC_INDEX_PULSE_INT /* DEC_ENABLE / DEC_DISABLE XIE in DECCR */
#define DEC_INDEX_TRIGGERED_INIT /* DEC_ENABLE / DEC_DISABLE XIP in DECCR */
#define DEC_INDEX_EDGE /* DEC_NEGATIVE / DEC_POSITIVE XNE in DECCR */
#define DEC_WATCHDOG_INT_REQUEST_CLEAR /* NULL DIE in DECCR */
#define DEC_WATCHDOG_INT /* DEC_ENABLE / DEC_DISABLE WDE in DECCR */
#define DEC_WATCHDOG /* DEC_ENABLE / DEC_DISABLE WDE in DECCR */
#define DEC_SWITCH_MATRIX /* DEC_MODE_x MODE[1:0] in DECCR */
#define DEC_WRITE_FILTER /* value */
#define DEC_WRITE_WATCHDOG_TIMEOUT /* value */
#define DEC_READ_POSITION_DIFFERENCE /* NULL */
#define DEC_READ_REVOLUTION /* NULL */
#define DEC_WRITE_REVOLUTION /* value */
#define DEC_READ_POSITION /* decoder_uReg32bit value; (32bit ) */
#define DEC_WRITE_POSITION /* value (32bit) */
#define DEC_WRITE_INIT_STATE /* value (32bit) */
#define DEC_READ_MONITOR_REG /* NULL */
#define DEC_GET_RAW_ENCSIGNALS /* NULL */
#define DEC_GET_FILTERED_ENCSIGNALS /* NULL */
#define DEC_READ_HOLD_DATA_REGS /* *decoder_sState */
#define DEC_READ_CONTROL_REG /* NULL */
#define DEC_CALCULATE_SCALE_COEF /* *decoder_sEncScale */
#define DEC_GET_SCALED_POSITION /* *decoder_sEncScale */
#define DEC_GET_SCALED_POSITION_DIFFERENCE /* *decoder_sEncScale */
/*******************************************************************************
* Quadratute Decoder constants and type declarations used in the ioctl functions
********************************************************************************/
#define DEC_ENABLE true
#define DEC_DISABLE false
#define DEC_NEGATIVE true
#define DEC_POSITIVE false
#define DEC_REVERSE true
#define DEC_NORMAL false
#define DEC_MODE_0 0
#define DEC_MODE_1 1
#define DEC_MODE_2 2
/******************************************************************************/
typedef union
{
struct
{
UWord16 LSBpart;
Word16 MSBpart;
}RegParts;
Word32 Reg32bit;
} decoder_uReg32bit;
typedef struct
{
Word16 PositionDifferenceHoldReg;
Word16 RevolutionHoldReg;
decoder_uReg32bit PositionHoldReg;
}decoder_sState;
typedef struct
{
UWord16 EncPulses;
UWord16 RevolutionScale;
Int16 scaleDiffPosCoef;
UInt16 scalePosCoef;
Int16 normDiffPosCoef;
Int16 normPosCoef;
}decoder_sEncScale;
typedef struct
{
UWord16 Index :1;
UWord16 PhaseB :1;
UWord16 PhaseA :1;
UWord16 Reserved :13;
}decoder_sEncSignals;
typedef union{
decoder_sEncSignals EncSignals;
UWord16 Value;
} decoder_uEncSignals;
/*******************************************************************************
* Quadrature Decoder constants and type declarations used in the ioctl functions
********************************************************************************/
#define DEC_MAX_INT 0xffff
/* Decoder Control Register DECCR */
#define DEC_HIRQ 0x8000 /* HOME Signal Transition Interrupt Request */
#define DEC_HIE 0x4000 /* HOME Interrupt Enable */
#define DEC_HIP 0x2000 /* Enable HOME to Initialize UPOS and LPOS */
#define DEC_HNE 0x1000 /* Use Negative Edge of HOME Input */
#define DEC_SWIP 0x0800 /* Software Triggered Initialization of UPOS and LPOS */
#define DEC_REV 0x0400 /* Enable Reverse Direction Counting */
#define DEC_PH1 0x0200 /* Enable Signal Phase Count Mode */
#define DEC_XIRQ 0x0100 /* Index Pulse Interrupt Request */
#define DEC_XIE 0x0080 /* Index Pulse Interrupt Enable */
#define DEC_XIP 0x0040 /* Index Triggered Initialization of UPOS and LPOS */
#define DEC_XNE 0x0020 /* Use Negative Edge of Index Pulse */
#define DEC_DIRQ 0x0010 /* Watchdog Time-Out Interrupt Request */
#define DEC_DIE 0x0008 /* Watchdog Time-Out Interrupt Enable */
#define DEC_WDE 0x0004 /* Watch Dog Enable */
#define DEC_MODE 0x0003 /* Switch Matrix Mode bits [1:0] */
/* Test Register TSTREG */
#define DEC_TEN 0x8000 /* Test Mode Enable */
#define DEC_TCE 0x4000 /* Test Counter Enable */
#define DEC_QDN 0x2000 /* Quadrature Decoder Negative Signal */
/***********************************************************************
*
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