📄 io_map.h
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byte STOP :1; /* STOP Instruction Enable Bit */
byte SSREC :1; /* Short Stop Recovery Bit */
byte :1;
byte LVIPWRD :1; /* LVI Power Disable Bit */
byte LVIRSTD :1; /* LVI Reset Disable Bit */
byte LVISTOP :1; /* LVI Enable in Stop Mode Bit */
byte COPRS :1; /* COP rate Select Bit */
} Bits;
} CONFIG1STR;
extern volatile CONFIG1STR _CONFIG1 @0x0000001F;
#define CONFIG1 _CONFIG1.Byte
#define CONFIG1_COPD _CONFIG1.Bits.COPD
#define CONFIG1_STOP _CONFIG1.Bits.STOP
#define CONFIG1_SSREC _CONFIG1.Bits.SSREC
#define CONFIG1_LVIPWRD _CONFIG1.Bits.LVIPWRD
#define CONFIG1_LVIRSTD _CONFIG1.Bits.LVIRSTD
#define CONFIG1_LVISTOP _CONFIG1.Bits.LVISTOP
#define CONFIG1_COPRS _CONFIG1.Bits.COPRS
#define CONFIG1_COPD_MASK 0x01
#define CONFIG1_STOP_MASK 0x02
#define CONFIG1_SSREC_MASK 0x04
#define CONFIG1_LVIPWRD_MASK 0x10
#define CONFIG1_LVIRSTD_MASK 0x20
#define CONFIG1_LVISTOP_MASK 0x40
#define CONFIG1_COPRS_MASK 0x80
/*** T1SC - TIM1 Status and Control Register; 0x00000020 ***/
typedef union {
byte Byte;
struct {
byte PS0 :1; /* Prescaler Select Bit 0 */
byte PS1 :1; /* Prescaler Select Bit 1 */
byte PS2 :1; /* Prescaler Select Bit 2 */
byte :1;
byte TRST :1; /* TIM1 Reset Bit */
byte TSTOP :1; /* TIM1 Stop Bit */
byte TOIE :1; /* TIM1 Overflow Interrupt Enable Bit */
byte TOF :1; /* TIM1 Overflow Flag Bit */
} Bits;
struct {
byte grpPS :3;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} T1SCSTR;
extern volatile T1SCSTR _T1SC @0x00000020;
#define T1SC _T1SC.Byte
#define T1SC_PS0 _T1SC.Bits.PS0
#define T1SC_PS1 _T1SC.Bits.PS1
#define T1SC_PS2 _T1SC.Bits.PS2
#define T1SC_TRST _T1SC.Bits.TRST
#define T1SC_TSTOP _T1SC.Bits.TSTOP
#define T1SC_TOIE _T1SC.Bits.TOIE
#define T1SC_TOF _T1SC.Bits.TOF
#define T1SC_PS _T1SC.MergedBits.grpPS
#define T1SC_PS0_MASK 0x01
#define T1SC_PS1_MASK 0x02
#define T1SC_PS2_MASK 0x04
#define T1SC_TRST_MASK 0x10
#define T1SC_TSTOP_MASK 0x20
#define T1SC_TOIE_MASK 0x40
#define T1SC_TOF_MASK 0x80
#define T1SC_PS_MASK 0x07
#define T1SC_PS_BITNUM 0x00
/*** T1CNT - TIM1 Counter Register; 0x00000021 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** T1CNTH - TIM1 Counter Register; 0x00000021 ***/
union {
byte Byte;
} T1CNTHSTR;
#define T1CNTH _T1CNT.Overlap_STR.T1CNTHSTR.Byte
/*** T1CNTL - TIM1 Counter Register; 0x00000022 ***/
union {
byte Byte;
} T1CNTLSTR;
#define T1CNTL _T1CNT.Overlap_STR.T1CNTLSTR.Byte
} Overlap_STR;
} T1CNTSTR;
extern volatile T1CNTSTR _T1CNT @0x00000021;
#define T1CNT _T1CNT.Word
/*** T1MOD - TIM1 Counter Modulo Register; 0x00000023 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** T1MODH - TIM1 Counter Modulo Register; 0x00000023 ***/
union {
byte Byte;
} T1MODHSTR;
#define T1MODH _T1MOD.Overlap_STR.T1MODHSTR.Byte
/*** T1MODL - TIM1 Counter Modulo Register; 0x00000024 ***/
union {
byte Byte;
} T1MODLSTR;
#define T1MODL _T1MOD.Overlap_STR.T1MODLSTR.Byte
} Overlap_STR;
} T1MODSTR;
extern volatile T1MODSTR _T1MOD @0x00000023;
#define T1MOD _T1MOD.Word
/*** T1SC0 - TIM1 Channel Status and Control Register; 0x00000025 ***/
typedef union {
byte Byte;
struct {
byte CH0MAX :1; /* Channel 0 Maximum Duty Cycle Bit */
byte TOV0 :1; /* Toggle-On-Overflow Bit */
byte ELS0A :1; /* Edge/Level Select Bit */
byte ELS0B :1; /* Edge/Level Select Bit */
byte MS0A :1; /* Mode Select Bit A */
byte MS0B :1; /* Mode Select Bit B */
byte CH0IE :1; /* Channel 0 Interrupt Enable Bit */
byte CH0F :1; /* Channel 0 Flag Bit */
} Bits;
struct {
byte :1;
byte grpTOV :1;
byte grpELS0x :2;
byte grpMS0x :2;
byte :1;
byte :1;
} MergedBits;
} T1SC0STR;
extern volatile T1SC0STR _T1SC0 @0x00000025;
#define T1SC0 _T1SC0.Byte
#define T1SC0_CH0MAX _T1SC0.Bits.CH0MAX
#define T1SC0_TOV0 _T1SC0.Bits.TOV0
#define T1SC0_ELS0A _T1SC0.Bits.ELS0A
#define T1SC0_ELS0B _T1SC0.Bits.ELS0B
#define T1SC0_MS0A _T1SC0.Bits.MS0A
#define T1SC0_MS0B _T1SC0.Bits.MS0B
#define T1SC0_CH0IE _T1SC0.Bits.CH0IE
#define T1SC0_CH0F _T1SC0.Bits.CH0F
#define T1SC0_ELS0x _T1SC0.MergedBits.grpELS0x
#define T1SC0_MS0x _T1SC0.MergedBits.grpMS0x
#define T1SC0_CH0MAX_MASK 0x01
#define T1SC0_TOV0_MASK 0x02
#define T1SC0_ELS0A_MASK 0x04
#define T1SC0_ELS0B_MASK 0x08
#define T1SC0_MS0A_MASK 0x10
#define T1SC0_MS0B_MASK 0x20
#define T1SC0_CH0IE_MASK 0x40
#define T1SC0_CH0F_MASK 0x80
#define T1SC0_ELS0x_MASK 0x0C
#define T1SC0_ELS0x_BITNUM 0x02
#define T1SC0_MS0x_MASK 0x30
#define T1SC0_MS0x_BITNUM 0x04
/*** T1CH0 - TIM1 Channel Register; 0x00000026 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** T1CH0H - TIM1 Channel Register; 0x00000026 ***/
union {
byte Byte;
} T1CH0HSTR;
#define T1CH0H _T1CH0.Overlap_STR.T1CH0HSTR.Byte
/*** T1CH0L - TIM1 Channel Register; 0x00000027 ***/
union {
byte Byte;
} T1CH0LSTR;
#define T1CH0L _T1CH0.Overlap_STR.T1CH0LSTR.Byte
} Overlap_STR;
} T1CH0STR;
extern volatile T1CH0STR _T1CH0 @0x00000026;
#define T1CH0 _T1CH0.Word
/* T1CH_ARR: Access 2 T1CHx registers in an array */
#define T1CH_ARR ((volatile word * __far) &T1CH0)
/*** T1SC1 - TIM1 Channel Status and Control Register; 0x00000028 ***/
typedef union {
byte Byte;
struct {
byte CH1MAX :1; /* Channel 1 Maximum Duty Cycle Bit */
byte TOV1 :1; /* Toggle-On-Overflow Bit */
byte ELS1A :1; /* Edge/Level Select Bit */
byte ELS1B :1; /* Edge/Level Select Bit */
byte MS1A :1; /* Mode Select Bit A */
byte :1;
byte CH1IE :1; /* Channel 1 Interrupt Enable Bit */
byte CH1F :1; /* Channel 1 Flag Bit */
} Bits;
struct {
byte :1;
byte grpTOV_1 :1;
byte grpELS1x :2;
byte grpMS1x :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} T1SC1STR;
extern volatile T1SC1STR _T1SC1 @0x00000028;
#define T1SC1 _T1SC1.Byte
#define T1SC1_CH1MAX _T1SC1.Bits.CH1MAX
#define T1SC1_TOV1 _T1SC1.Bits.TOV1
#define T1SC1_ELS1A _T1SC1.Bits.ELS1A
#define T1SC1_ELS1B _T1SC1.Bits.ELS1B
#define T1SC1_MS1A _T1SC1.Bits.MS1A
#define T1SC1_CH1IE _T1SC1.Bits.CH1IE
#define T1SC1_CH1F _T1SC1.Bits.CH1F
#define T1SC1_ELS1x _T1SC1.MergedBits.grpELS1x
#define T1SC1_CH1MAX_MASK 0x01
#define T1SC1_TOV1_MASK 0x02
#define T1SC1_ELS1A_MASK 0x04
#define T1SC1_ELS1B_MASK 0x08
#define T1SC1_MS1A_MASK 0x10
#define T1SC1_CH1IE_MASK 0x40
#define T1SC1_CH1F_MASK 0x80
#define T1SC1_ELS1x_MASK 0x0C
#define T1SC1_ELS1x_BITNUM 0x02
/*** T1CH1 - TIM1 Channel Register; 0x00000029 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** T1CH1H - TIM1 Channel Register; 0x00000029 ***/
union {
byte Byte;
} T1CH1HSTR;
#define T1CH1H _T1CH1.Overlap_STR.T1CH1HSTR.Byte
/*** T1CH1L - TIM1 Channel Register; 0x0000002A ***/
union {
byte Byte;
} T1CH1LSTR;
#define T1CH1L _T1CH1.Overlap_STR.T1CH1LSTR.Byte
} Overlap_STR;
} T1CH1STR;
extern volatile T1CH1STR _T1CH1 @0x00000029;
#define T1CH1 _T1CH1.Word
/*** T2SC - TIM2 Status and Control Register; 0x0000002B ***/
typedef union {
byte Byte;
struct {
byte PS0 :1; /* Prescaler Select Bit */
byte PS1 :1; /* Prescaler Select Bit */
byte PS2 :1; /* Prescaler Select Bit */
byte :1;
byte TRST :1; /* TIM2 Reset Bit */
byte TSTOP :1; /* TIM2 Stop Bit */
byte TOIE :1; /* TIM2 Overflow Interrupt Enable Bit */
byte TOF :1; /* TIM2 Overflow Flag Bit */
} Bits;
struct {
byte grpPS :3;
byte :1;
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