io_map.h
来自「基于MC908LK24 MCU的热量表程序」· C头文件 代码 · 共 1,601 行 · 第 1/5 页
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/*** SCC1 - SCI Control Register 1 ***/
typedef union {
byte Byte;
struct {
byte PTY :1; /* Parity Bit */
byte PEN :1; /* Parity Enable Bit */
byte ILTY :1; /* Idle Line Type Bit */
byte WAKE :1; /* Wakeup Condition Bit */
byte M :1; /* Mode (Character Length) Bit */
byte :1;
byte ENSCI :1; /* Enable SCI Bit */
byte LOOPS :1; /* Loop Mode Select Bit */
} Bits;
} SCC1STR;
extern volatile SCC1STR _SCC1 @0x00000013;
#define SCC1 _SCC1.Byte
#define SCC1_PTY _SCC1.Bits.PTY
#define SCC1_PEN _SCC1.Bits.PEN
#define SCC1_ILTY _SCC1.Bits.ILTY
#define SCC1_WAKE _SCC1.Bits.WAKE
#define SCC1_M _SCC1.Bits.M
#define SCC1_ENSCI _SCC1.Bits.ENSCI
#define SCC1_LOOPS _SCC1.Bits.LOOPS
/*** SCC2 - SCI Control Register 2 ***/
typedef union {
byte Byte;
struct {
byte SBK :1; /* Send Break Bit */
byte RWU :1; /* Receiver Wakeup Bit */
byte RE :1; /* Receiver Enable Bit */
byte TE :1; /* Transmitter Enable Bit */
byte ILIE :1; /* Idle Line Interrupt Enable Bit */
byte SCRIE :1; /* SCI Receive Interrupt Enable Bit */
byte TCIE :1; /* Transmission Complete Interrupt Enable Bit */
byte SCTIE :1; /* SCI Transmit Interrupt Enable Bit */
} Bits;
} SCC2STR;
extern volatile SCC2STR _SCC2 @0x00000014;
#define SCC2 _SCC2.Byte
#define SCC2_SBK _SCC2.Bits.SBK
#define SCC2_RWU _SCC2.Bits.RWU
#define SCC2_RE _SCC2.Bits.RE
#define SCC2_TE _SCC2.Bits.TE
#define SCC2_ILIE _SCC2.Bits.ILIE
#define SCC2_SCRIE _SCC2.Bits.SCRIE
#define SCC2_TCIE _SCC2.Bits.TCIE
#define SCC2_SCTIE _SCC2.Bits.SCTIE
/*** SCC3 - SCI Control Register 3 ***/
typedef union {
byte Byte;
struct {
byte PEIE :1; /* Receiver Parity Error Interrupt Enable Bit */
byte FEIE :1; /* Receiver Framing Error Interrupt Enable Bit */
byte NEIE :1; /* Receiver Noise Error Interrupt Enable Bit */
byte ORIE :1; /* Receiver Overrun Interrupt Enable Bit */
byte :1;
byte :1;
byte T8 :1; /* Transmitted Bit 8 */
byte R8 :1; /* Received Bit 8 */
} Bits;
} SCC3STR;
extern volatile SCC3STR _SCC3 @0x00000015;
#define SCC3 _SCC3.Byte
#define SCC3_PEIE _SCC3.Bits.PEIE
#define SCC3_FEIE _SCC3.Bits.FEIE
#define SCC3_NEIE _SCC3.Bits.NEIE
#define SCC3_ORIE _SCC3.Bits.ORIE
#define SCC3_T8 _SCC3.Bits.T8
#define SCC3_R8 _SCC3.Bits.R8
/*** SCS1 - SCI Status Register 1 ***/
typedef union {
byte Byte;
struct {
byte PE :1; /* Receiver Parity Error Bit */
byte FE :1; /* Receiver Framing Error Bit */
byte NF :1; /* Receiver Noise Flag Bit */
byte OR :1; /* Receiver Overrun Bit */
byte IDLE :1; /* Receiver Idle Bit */
byte SCRF :1; /* SCI Receiver Full Bit */
byte TC :1; /* Transmission Complete Bit */
byte SCTE :1; /* SCI Transmitter Empty Bit */
} Bits;
} SCS1STR;
extern volatile SCS1STR _SCS1 @0x00000016;
#define SCS1 _SCS1.Byte
#define SCS1_PE _SCS1.Bits.PE
#define SCS1_FE _SCS1.Bits.FE
#define SCS1_NF _SCS1.Bits.NF
#define SCS1_OR _SCS1.Bits.OR
#define SCS1_IDLE _SCS1.Bits.IDLE
#define SCS1_SCRF _SCS1.Bits.SCRF
#define SCS1_TC _SCS1.Bits.TC
#define SCS1_SCTE _SCS1.Bits.SCTE
/*** SCS2 - SCI Status Register 2 ***/
typedef union {
byte Byte;
struct {
byte RPF :1; /* Reception in Progress Flag Bit */
byte BKF :1; /* Break Flag Bit */
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
} SCS2STR;
extern volatile SCS2STR _SCS2 @0x00000017;
#define SCS2 _SCS2.Byte
#define SCS2_RPF _SCS2.Bits.RPF
#define SCS2_BKF _SCS2.Bits.BKF
/*** SCDR - SCI Data Register ***/
typedef union {
byte Byte;
struct {
byte R0_T0 :1; /* Receive/Transmit Data Bit 0 */
byte R1_T1 :1; /* Receive/Transmit Data Bit 1 */
byte R2_T2 :1; /* Receive/Transmit Data Bit 2 */
byte R3_T3 :1; /* Receive/Transmit Data Bit 3 */
byte R4_T4 :1; /* Receive/Transmit Data Bit 4 */
byte R5_T5 :1; /* Receive/Transmit Data Bit 5 */
byte R6_T6 :1; /* Receive/Transmit Data Bit 6 */
byte R7_T7 :1; /* Receive/Transmit Data Bit 7 */
} Bits;
} SCDRSTR;
extern volatile SCDRSTR _SCDR @0x00000018;
#define SCDR _SCDR.Byte
#define SCDR_R0_T0 _SCDR.Bits.R0_T0
#define SCDR_R1_T1 _SCDR.Bits.R1_T1
#define SCDR_R2_T2 _SCDR.Bits.R2_T2
#define SCDR_R3_T3 _SCDR.Bits.R3_T3
#define SCDR_R4_T4 _SCDR.Bits.R4_T4
#define SCDR_R5_T5 _SCDR.Bits.R5_T5
#define SCDR_R6_T6 _SCDR.Bits.R6_T6
#define SCDR_R7_T7 _SCDR.Bits.R7_T7
/*** SCBR - SCI Baud Rate Register ***/
typedef union {
byte Byte;
struct {
byte SCR0 :1; /* SCI Baud Rate Select Bit 0 */
byte SCR1 :1; /* SCI Baud Rate Select Bit 1 */
byte SCR2 :1; /* SCI Baud Rate Select Bit 2 */
byte :1;
byte SCP0 :1; /* SCI Baud Rate Prescaler Bit 0 */
byte SCP1 :1; /* SCI Baud Rate Prescaler Bit 1 */
byte :1;
byte CKS :1; /* Baud Clock Input Select */
} Bits;
struct {
byte grpSCR :3;
byte :1;
byte grpSCP :2;
byte :1;
byte :1;
} MergedBits;
} SCBRSTR;
extern volatile SCBRSTR _SCBR @0x00000019;
#define SCBR _SCBR.Byte
#define SCBR_SCR0 _SCBR.Bits.SCR0
#define SCBR_SCR1 _SCBR.Bits.SCR1
#define SCBR_SCR2 _SCBR.Bits.SCR2
#define SCBR_SCP0 _SCBR.Bits.SCP0
#define SCBR_SCP1 _SCBR.Bits.SCP1
#define SCBR_CKS _SCBR.Bits.CKS
#define SCBR_SCR _SCBR.MergedBits.grpSCR
#define SCBR_SCP _SCBR.MergedBits.grpSCP
/*** SCIRCR - SCI Infrared Control Register ***/
typedef union {
byte Byte;
struct {
byte IREN :1; /* Infrared Enable Bit */
byte TNP0 :1; /* Transmitter Narrow Pulse Bit 0 */
byte TNP1 :1; /* Transmitter Narrow Pulse Bit 1 */
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
struct {
byte :1;
byte grpTNP :2;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} SCIRCRSTR;
extern volatile SCIRCRSTR _SCIRCR @0x0000001A;
#define SCIRCR _SCIRCR.Byte
#define SCIRCR_IREN _SCIRCR.Bits.IREN
#define SCIRCR_TNP0 _SCIRCR.Bits.TNP0
#define SCIRCR_TNP1 _SCIRCR.Bits.TNP1
#define SCIRCR_TNP _SCIRCR.MergedBits.grpTNP
/*** KBSCR - Keyboard Status and Control Register ***/
typedef union {
byte Byte;
struct {
byte MODEK :1; /* Keyboard Triggering Sensitivity Bit */
byte IMASKK :1; /* Keyboard Interrupt Mask Bit */
byte ACKK :1; /* Keyboard Acknowledge Bit */
byte KEYF :1; /* Keyboard Flag Bit */
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
} KBSCRSTR;
extern volatile KBSCRSTR _KBSCR @0x0000001B;
#define KBSCR _KBSCR.Byte
#define KBSCR_MODEK _KBSCR.Bits.MODEK
#define KBSCR_IMASKK _KBSCR.Bits.IMASKK
#define KBSCR_ACKK _KBSCR.Bits.ACKK
#define KBSCR_KEYF _KBSCR.Bits.KEYF
/*** KBIER - Keyobard Interrupt Enable Register ***/
typedef union {
byte Byte;
struct {
byte KBIE0 :1; /* Keyboard Interrut Enable Bit */
byte KBIE1 :1; /* Keyboard Interrut Enable Bit */
byte KBIE2 :1; /* Keyboard Interrut Enable Bit */
byte KBIE3 :1; /* Keyboard Interrut Enable Bit */
byte KBIE4 :1; /* Keyboard Interrut Enable Bit */
byte KBIE5 :1; /* Keyboard Interrut Enable Bit */
byte KBIE6 :1; /* Keyboard Interrut Enable Bit */
byte KBIE7 :1; /* Keyboard Interrut Enable Bit */
} Bits;
struct {
byte grpKBIE :8;
} MergedBits;
} KBIERSTR;
extern volatile KBIERSTR _KBIER @0x0000001C;
#define KBIER _KBIER.Byte
#define KBIER_KBIE0 _KBIER.Bits.KBIE0
#define KBIER_KBIE1 _KBIER.Bits.KBIE1
#define KBIER_KBIE2 _KBIER.Bits.KBIE2
#define KBIER_KBIE3 _KBIER.Bits.KBIE3
#define KBIER_KBIE4 _KBIER.Bits.KBIE4
#define KBIER_KBIE5 _KBIER.Bits.KBIE5
#define KBIER_KBIE6 _KBIER.Bits.KBIE6
#define KBIER_KBIE7 _KBIER.Bits.KBIE7
#define KBIER_KBIE _KBIER.MergedBits.grpKBIE
/*** CONFIG2 - Configuration Register 2 ***/
typedef union {
byte Byte;
struct {
byte LVISEL0 :1; /* LVI Operating Mode Selection 0 */
byte LVISEL1 :1; /* LVI Operating Mode Selection 1 */
byte PCEL :1; /* Port C Enable Low Nibble */
byte PCEH :1; /* Port C Enable High Nibble */
byte DIV2CLK :1; /* Divide-by-2 Clock Bypass */
byte STOP_XCLKEN :1; /* Crystal Oscillator Stop Mode Enable */
byte STOP_IRCDIS :1; /* Internal RC Oscillator Stop Mode Disable */
byte PEE :1; /* Port E Enable */
} Bits;
struct {
byte grpLVISEL :2;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} CONFIG2STR;
extern volatile CONFIG2STR _CONFIG2 @0x0000001D;
#define CONFIG2 _CONFIG2.Byte
#define CONFIG2_LVISEL0 _CONFIG2.Bits.LVISEL0
#define CONFIG2_LVISEL1 _CONFIG2.Bits.LVISEL1
#define CONFIG2_PCEL _CONFIG2.Bits.PCEL
#define CONFIG2_PCEH _CONFIG2.Bits.PCEH
#define CONFIG2_DIV2CLK _CONFIG2.Bits.DIV2CLK
#define CONFIG2_STOP_XCLKEN _CONFIG2.Bits.STOP_XCLKEN
#define CONFIG2_STOP_IRCDIS _CONFIG2.Bits.STOP_IRCDIS
#define CONFIG2_PEE _CONFIG2.Bits.PEE
#define CONFIG2_LVISEL _CONFIG2.MergedBits.grpLVISEL
/*** INTSCR1 - IRQ Status and Control Register ***/
typedef union {
byte Byte;
struct {
byte MODE :1; /* IRQ Edge/Level Select Bit */
byte IMASK :1; /* IRQ Interrupt Mask Bit */
byte ACK :1; /* IRQ Interrupt Request Acknowledge Bit */
byte IRQF :1; /* IRQ Flag Bit */
byte :1;
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