pcdutils.c

51单片机读写飞利浦RC500的源码,还是KEIL工程.

///////////////////////////////////////////////////////////////////////////////
//    Copyright (c), Philips Semiconductors Gratkorn
//
//                  (C)PHILIPS Electronics N.V.2000
//                     All rights are reserved. 
//  Philips reserves the right to make changes without notice at any time.
// Philips makes no warranty, expressed, implied or statutory, including but
// not limited to any implied warranty of merchantibility or fitness for any
//particular purpose, or that the use will not infringe any third party patent,
// copyright or trademark. Philips must not be liable for any loss or damage
//                          arising from its use.
///////////////////////////////////////////////////////////////////////////////
#define DLL_EXPORT      // library source module definition

#include <string.h>
#include <stdio.h>

#include <RICReg.h>

#include <PcdUtils.h>
#include <MfRc500.h>
#include <RcCommunication.h>
#include <MfErrNo.h>
#include <CPURegs.h>
#include <uCInit.h>

volatile unsigned char RxTxBuffer[MAX_RF_BUF_SIZE];

// communication info stucture
static   volatile MfCmdInfo     *MpIsrInfo = 0; 
// ISR send buffer
static   volatile unsigned char *MpIsrOut = 0; 
// ISR receive buffer
static   volatile unsigned char *MpIsrIn = 0;   

///////////////////////////////////////////////////////////////////////
//         S e t   T i m e o u t   L E N G T H
///////////////////////////////////////////////////////////////////////
void PcdSetTmo(unsigned char tmoLength)
{
   switch(tmoLength)
   {  // timer clock frequency 13,56 MHz
      case 1:                         // short timeout (1,0 ms)
         WriteRC(RegTimerClock,0x07); // TAutoRestart=0,TPrescale=128
         WriteRC(RegTimerReload,0x6a);// TReloadVal = 'h6a =106(dec) 
         break;
      case 2:                       // medium timeout (1,5 ms)
         WriteRC(RegTimerClock,0x07); // TAutoRestart=0,TPrescale=128
         WriteRC(RegTimerReload,0xa0);// TReloadVal = 'ha0 =160(dec) 
         break;
      case 3:                       // long timeout (6 ms)
         WriteRC(RegTimerClock,0x09); // TAutoRestart=0,TPrescale=4*128
         WriteRC(RegTimerReload,0xa0);// TReloadVal = 'ha0 =160(dec) 
         break;
      case 4:                       // long timeout (9.6 ms)
         WriteRC(RegTimerClock,0x09); // TAutoRestart=0,TPrescale=4*128
         WriteRC(RegTimerReload,0xff);// TReloadVal = 'ff =255(dec) 
         break;
      default:                       // short timeout (1,0 ms)
         WriteRC(RegTimerClock,0x07); // TAutoRestart=0,TPrescale=128
         WriteRC(RegTimerReload,tmoLength);// TReloadVal = tmoLength
         break;
   }     
}

//////////////////////////////////////////////////////////////////////
//   S E T   A   B I T   M A S K 
///////////////////////////////////////////////////////////////////////
void SetBitMask(unsigned char reg,unsigned char mask) // 
{
   char   tmp    = 0x0;

   tmp = ReadRC(reg);
   WriteRC(reg,tmp | mask);  // set bit mask
}

//////////////////////////////////////////////////////////////////////
//   C L E A R   A   B I T   M A S K 
///////////////////////////////////////////////////////////////////////
void ClearBitMask(unsigned char reg,unsigned char mask) // 
{
   char   tmp    = 0x0;

   tmp = ReadRC(reg);
   WriteRC(reg,tmp & ~mask);  // clear bit mask
}

///////////////////////////////////////////////////////////////////////
//                  F L U S H    F I F O
///////////////////////////////////////////////////////////////////////
void FlushFIFO(void)
{  
   SetBitMask(RegControl,0x01);
}

///////////////////////////////////////////////////////////////////////////////
//                       Interrupt Handler RIC
///////////////////////////////////////////////////////////////////////////////
void SingleResponseIsr(void)
{
   static unsigned char  irqBits;
   static unsigned char  irqMask;            
   static unsigned char  oldPageSelect;
   static unsigned char  nbytes;
   static unsigned char  cnt;

   if (MpIsrInfo && MpIsrOut && MpIsrIn)  // transfer pointers have to be set
                                          // correctly
   {
      oldPageSelect = ReadRawRC(RegPage); // save old page select 
                                          // Attention: ReadRC cannnot be
                                          // used because of the internal
                                          // write sequence to the page 
                                          // reg
      WriteRawRC(RegPage,0x80);                   // select page 0 for ISR
      while( (ReadRawRC(RegPrimaryStatus) & 0x08)) // loop while IRQ pending
      {
         irqMask = ReadRawRC(RegInterruptEn); // read enabled interrupts
         // read pending interrupts
         irqBits = ReadRawRC(RegInterruptRq) & irqMask;
         MpIsrInfo->irqSource |= irqBits; // save pending interrupts
         //************ LoAlertIRQ ******************
         if (irqBits & 0x01)    // LoAlert
         {  
            nbytes = MFIFOLength - ReadRawRC(RegFIFOLength);
            // less bytes to send, than space in FIFO
            if ((MpIsrInfo->nBytesToSend - MpIsrInfo->nBytesSent) <= nbytes)
            {
               nbytes = MpIsrInfo->nBytesToSend - MpIsrInfo->nBytesSent;
             WriteRawRC(RegInterruptEn,0x01); // disable LoAlert IRQ
            }
            // write remaining data to the FIFO
            for ( cnt = 0;cnt < nbytes;cnt++)
            {
               WriteRawRC(RegFIFOData,MpIsrOut[MpIsrInfo->nBytesSent]);
               MpIsrInfo->nBytesSent++;
            }
            WriteRawRC(RegInterruptRq,0x01);  // reset IRQ bit
         }
      
         //************* TxIRQ Handling **************
         if (irqBits & 0x10)       // TxIRQ
         {
            WriteRawRC(RegInterruptRq,0x10);    // reset IRQ bit 
            WriteRawRC(RegInterruptEn,0x82);    // enable HiAlert Irq for
                                                // response
            if (MpIsrInfo->cmd == PICC_ANTICOLL1) // if cmd is anticollision
            {                                     // switch off parity generation
               WriteRC(RegChannelRedundancy,0x02); // RxCRC and TxCRC disable, parity disable               
               WriteRawRC(RegPage,0x00);  // reset page address
            }
         }

         //************* HiAlertIRQ or RxIRQ Handling ******************
         if (irqBits & 0x0E) // HiAlert, Idle or RxIRQ
         {
            // read some bytes ( length of FIFO queue)              
            // into the receive buffer
            nbytes = ReadRawRC(RegFIFOLength);
            // read date from the FIFO and store them in the receive buffer
            for ( cnt = 0; cnt < nbytes; cnt++)               
            {
               MpIsrIn[MpIsrInfo->nBytesReceived] = ReadRawRC(RegFIFOData);
               MpIsrInfo->nBytesReceived++;
            }
            WriteRawRC(RegInterruptRq,0x0A & irqBits);  
                                       // reset IRQ bit - idle irq will
                                       // be deleted in a seperate section
         }   
   
         //************** IdleIRQ Handling ***********
         if (irqBits & 0x04)     // Idle IRQ
         {
            WriteRawRC(RegInterruptEn,0x20); // disable Timer IRQ
            WriteRawRC(RegInterruptRq,0x20); // disable Timer IRQ request
            irqBits &= ~0x20;   // clear Timer IRQ in local var
            MpIsrInfo->irqSource &= ~0x20; // clear Timer IRQ in info var
                                        // when idle received, then cancel
                                        // timeout
            WriteRawRC(RegInterruptRq,0x04);  // reset IRQ bit 
            // status should still be MI_OK
            // no error - only used for wake up
         }
       
         //************* TimerIRQ Handling ***********
         if (irqBits & 0x20)       // timer IRQ
         {
            WriteRawRC(RegInterruptRq,0x20); // reset IRQ bit 
            MpIsrInfo->status = MI_NOTAGERR; // timeout error
                                             // otherwise ignore the interrupt
         }
         
      }
      WriteRawRC(RegPage,oldPageSelect | 0x80);
   }
}