hsm.h

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/**********************************************************************
*h*   
*
*   Name:       	hsm.h
* 
*   Description:  	
*		HSM related data structures. 
*  
*   Author:  
*  
*   History:  
*  
*h*   
**********************************************************************/

#ifndef _HSM_H
#define _HSM_H

#include "ga622t.h"

/*** Define Constants ***/

#ifdef _GA622T_

#define 	MAXPRI_ADAPTER		4
#define		PRI_QUOTIENT		100

#elif _FA31X_

#define 	MAXPRI_ADAPTER		1

#endif

#define 	MAC_ADDR_LEN		6
#define 	PROMISCUOUS_ON 					0x1
#define 	ACCEPT_ALL_MULTICAST_ON 		0x2
#define 	ACCEPT_ALL_BROADCAST_ON 		0x4
#define 	MULTICAST_HASH_ENABLE 			0x8
#define 	ACCEPT_PERFECT_MATCH_ON 		0x10
#define 	ACCEPT_ALL_UNICAST_ON 			0x20
#define 	PROMISCUOUS_OFF 				0x40
#define 	ACCEPT_ALL_MULTICAST_OFF 		0x80

/*
 *	Defines for descriptor structure.
 */
#define		OWN			0x80000000   /* 31 bit	*/
#define		MORE		0x40000000   /* 30 bit	*/
#define		INTR		0x20000000   /* 29 bit	*/
#define		DESCOK		0x08000000   /* 27 bit	*/
/*
 * Transmit Status bit definitions.
 */
#define		TXA			0x04000000   /* 26 bit	*/
#define     TFU    		0x02000000   /* 25 bit	*/
#define     CRS    		0x01000000   /* 24 bit	*/
#define     TD    		0x00800000   /* 23 bit	*/
#define     OWC    		0x00200000   /* 21 bit	*/
#define     EC     		0x00100000   /* 20 bit	*/
#define     CCNT   		0x000F0000   /* 19-16 bit	*/

/*
 * Receive Status bit definitions.
 */
#define		RXA			0x04000000   /* 26 bit	*/
#define     RXO    		0x02000000   /* 25 bit	*/
#define     RXE_DEST   	0x01800000   /* 24 and 23 bit	*/
#define     RXE_LONG	0x00400000   /* 22 bit	*/
#define     RUNT    	0x00200000   /* 21 bit	*/
#define     ISE    		0x00100000   /* 20 bit	*/
#define     CRCE   		0x00080000   /* 19 bit	*/
#define     FAE   		0x00040000   /* 18 bit	*/
#define     LBP   		0x00020000   /* 17 bit	*/
#define     COL   		0x00010000   /* 16 bit	*/

#define		SUCCESS		0
#define		FAILURE		1
#define 	OK			SUCCESS
#define 	ERROR		FAILURE


/*
 For Indicating check-sum information to the
 adapter in the extended status
*/

#define 	UDPPKT 			0x00200000		/* bit 21 */
#define 	TCPPKT			0x00080000		/* bit 19 */
#define 	IPPKT			0x00020000		/* bit 17 */
#define 	UDPERR 			0x00400000		/* bit 22 */
#define 	TCPERR 			0x00100000		/* bit 20 */
#define 	IPERR 			0x00040000		/* bit 18 */
#define 	RXUDPON 		0x00200000		/* bit 21 */
#define 	RXTCPON			0x00080000		/* bit 19 */
#define 	RXIPON			0x00020000		/* bit 17 */

/*
 *	Defines for the Adapter Status.
 */
#define		ADAPTER_INITIALIZED			0x01
#define		ADAPTER_OPEN				0x02
#define		ADAPTER_RESETTING			0x04
#define		ADAPTER_OPEN_WAITFOR_RESET	0x08
#define		LINK_UP						0x10
#define		ADAPTER_SLEEPING			0x20
#define		ADAPTER_SUSPENDED			0x40

/*
 *	Defines for RCB.
 */
#define		RCB_FREE	0x00
#define		RCB_INUSE	0x01
#define		RCB_BAD		0x02

#define 	MAX_FRAGS 	20
#define 	MAX_PKTS 	20

#define 	INTR_UNCLAIMED 	0
#define 	INTR_CLAIMED 	1

#define 	MAX_POWER_PTRN	4	/*	Max. number of pattern allowed	*/
#define		MAX_PTRN_SZ		128	/*	Max. Number of bytes for each pattern in 
									Pattern buffer memory.	*/
/*
 *	Defines for physical capabilities 
 */

#define		TX_CHKSUM_OFFLOAD_ON_GEN	0x00000001
#define		TX_CHKSUM_OFFLOAD_OFF_GEN	0x00000002

#define		TX_CHKSUM_OFFLOAD_ON_PP		0x00000004
#define		TX_CHKSUM_OFFLOAD_OFF_PP	0x00000008

#define		SET_RX_CHKSUM_OFFLOAD_ON	0x00000010
#define		SET_RX_CHKSUM_OFFLOAD_OFF	0x00000020

#define		RX_IP_CHKSUM_DISCARD_ON		0x00000040
#define		RX_IP_CHKSUM_DISCARD_OFF	0x00000080

#define		RX_TCP_CHKSUM_DISCARD_ON	0x00000100
#define		RX_TCP_CHKSUM_DISCARD_OFF	0x00000200

#define		RX_UDP_CHKSUM_DISCARD_ON	0x00000400
#define		RX_UDP_CHKSUM_DISCARD_OFF	0x00000800
/*
#define		SET_AUTO_NEG_ON				0x00001000
#define		SET_AUTO_NEG_OFF			0x00002000

 To set the Auto neg. on/off from the registry
*/
/*Ramit : From Registry */
/*#define		SET_AUTO_NEG_ON				AutoNegFlg
#define		SET_AUTO_NEG_OFF			AutoNegFlg*/
#define		AUTO_NEG_ON					0x00001000
#define		AUTO_NEG_OFF				0x00002000


#define		SET_WOL_ON					0x00010000
#define		SET_WOL_OFF					0x00020000

#define		VLAN_TAG_INSERTION_GEN_ON	0x00100000
#define		VLAN_TAG_INSERTION_GEN_OFF	0x00200000

#define		VLAN_TAG_INSERTION_PP_ON	0x00400000
#define		VLAN_TAG_INSERTION_PP_OFF	0x00800000

#define		JUMBO_FRAMES_ON				0x01000000
#define		JUMBO_FRAMES_OFF			0x02000000

#define		BIG_ENDIAN					0x80000000


/*
 * Defines for Send and Receive routines.
 */

#define		RCB_THRESH		((RX_QUEUE_SZ) / 2)
#define 	WOL_FLAG		0x0000021F

#ifdef _GA622T_

#define		RX_QUEUES		(RXDESC0 | RXDESC1 | RXDESC2 | RXDESC3)
#define		TX_QUEUES		(TXDESC0 | TXDESC1 | TXDESC2 | TXDESC3)

#endif

#define		TX_OK			DESCOK
#define		RX_OK			DESCOK
#define		RX_ERR			(ISE | CRCE | FAE | COL | RXA | RXO)
#define		TX_ERR			(TXA | TFU | OWC | EC | TD | CCNT)

#ifdef FWARE_DOWNLOAD

#define F_EAM				0x16
#define F_DR				0x1D
#define F_AR				0x1E
#define F_JAR				0x1F
#define F_START_ADDRESS		(0x8400)
#define F_VERIFY_ADDRESS	(0x8000)
#define DATA_SIZE			14592		

#endif

#ifdef PM_WOL

#define WKPAT0	0x00000020
#define WKPAT1	0x00000040
#define WKPAT2	0x00000080
#define WKPAT3	0x00000100

/* Revisit, reduce this */
#define MAX_PAT_LEN 200

#endif

#ifdef _GA622T_

#define	CMDSTS_SIZE_MASK	0x0000ffff

#elif _FA31X_

#define	CMDSTS_SIZE_MASK	0x00000fff

#endif

#define		RESET_IN_PROGRESS	100
/*Madhu Cache line changes*/
#define		RX_BUF_ALIGNMENT	64

/*** Define Macros ***/

/*Check sum Macros*/

#define		UDP_PKT(Rcb)			((Rcb)->ExtSts & UDPPKT)
#define		TCP_PKT(Rcb)			((Rcb)->ExtSts & TCPPKT)
#define		IP_PKT(Rcb)			((Rcb)->ExtSts & IPPKT)
#define		UDPCHKSUMERR(Rcb)	((Rcb)->ExtSts & UDPERR)
#define		TCPCHKSUMERR(Rcb)	((Rcb)->ExtSts & TCPERR)
#define		IPCHKSUMERR(Rcb)	((Rcb)->ExtSts & IPERR)
#define		UDPCHKSUM(pAdapter)	((pAdapter)->ChksumFlags & RXUDPON)
#define		TCPCHKSUM(pAdapter)	((pAdapter)->ChksumFlags & RXTCPON)
#define		IPCHKSUM(pAdapter)	((pAdapter)->ChksumFlags & RXIPON)

#define 	RX_COMPLETE(pDesc) (pDesc) ? ((pDesc)->CmdSts & OWN) : 0

#define 	TX_DESC_SET_SIZE(pDesc,Size) \
				(pDesc)->CmdSts|=(CMDSTS_SIZE_MASK&(Size))

#define 	TX_DESC_SET_BUF(pDesc,pBuf) \
				(pDesc)->BufPtr=(UINT)(pBuf)

#define 	TX_DESC_SET_OWN(pDesc) \
				(pDesc)->CmdSts|=OWN

#define 	CLEAN_UP_DESC(CurrDesc)	\
				(CurrDesc)->CmdSts = 0;	\
				(CurrDesc)->ExtSts = 0;

/*
#define 	TX_ERRORED(pDesc)		\
				((pDesc) ? ( !((pDesc)->CmdSts & TX_OK) ) : 0)

#define 	TX_ERRORED(pDesc)		\
				((pDesc) ? ( ((pDesc)->CmdSts & TX_ERR) ) : 0) 
Ramit : Both Bits should be checked ERR and !OK */


#define 	TX_ERRORED(pDesc)  ( ((pDesc)->CmdSts & TX_ERR) && (!((pDesc)->CmdSts & TX_OK)) ) 


#define 	RX_ERRORED(pDesc) ( ((pDesc)->CmdSts & (RX_ERR)) && (!((pDesc)->CmdSts & (RX_OK))) )

/*
#define 	RX_ERRORED(pDesc) (!((pDesc)->CmdSts & (RX_OK))) 
*/
#define 	TX_COMPLETE(pDesc) 			\
				((pDesc) ? (!( (pDesc)->CmdSts & (OWN) )) : 0)

#define 	GET_TCB_NEXT(pAdap,Priority) \
				(pAdap)->PriQue[(Priority)].pTcbListNext

#define 	GET_TCB_HEAD(pAdapter,Priority) \
				(pAdapter)->PriQue[Priority].pTcbListHead

#define 	GET_RCB_EXTENDED_STATUS(pAdapter, HsmRcb) \
			((HsmRcb)->pRxDp->ExtSts)

#define 	SET_TCB_HEAD(pAdapter,Priority,NewHead) \
				(pAdapter)->PriQue[Priority].pTcbListHead = (NewHead)

#define 	SET_TCB_NEXT(pAdapter, Priority, NewNext) \
				(pAdapter)->PriQue[Priority].pTcbListNext = (NewNext)

#define 	SET_RCB_HEAD(pAdapter,Priority,NewHead) \
				(pAdapter)->PriQue[Priority].pRcbListHead = (NewHead)

#define 	SET_RCB_TAIL(pAdapter, Priority, NewTail) \
				(pAdapter)->PriQue[Priority].pRcbListTail = (NewTail)

#ifdef _GA622T_

#define 	SET_TCB_CHKSUM(pDesc,ChkSum) \
				(pDesc)->ExtSts |= (ChkSum)  
#elif _FA31X_

#define 	SET_TCB_CHKSUM(pDesc,ChkSum)

#endif

#define	 	TX_DESC_SET_MORE(pDesc,val) \
				( (val) ? ((pDesc)->CmdSts |= MORE) : \
				((pDesc)->CmdSts &= ~(MORE)) ) 

#define	 	TX_DESC_SET_INTR(Desc,Value) \
				( (Value) ? ((Desc)->CmdSts |= INTR) : \
				((Desc)->CmdSts &= ~(INTR)) ) 

#define 	INC_FREE_RX_DESC(pAdapter, Prio)  \
        		(pAdapter)->PriQue[Prio].iFreeRxDesc++

#define 	DEC_FREE_RX_DESC(pAdapter, Prio,count) \
        		(pAdapter)->PriQue[Prio].iFreeRxDesc -= count

#define 	FREE_RX_DESC(pAdapter, Prio)  \
        		(pAdapter)->PriQue[Prio].iFreeRxDesc

#define 	GET_RCB_NEXT(pAdapter, Priority) \
        		(pAdapter)->PriQue[Priority].pRcbListNext

#define 	GET_RCB_TAIL(pAdapter, Priority) \
        		(pAdapter)->PriQue[Priority].pRcbListTail

#define 	GET_RCB_HEAD(pAdapter, Priority) \
        		(pAdapter)->PriQue[Priority].pRcbListHead

#define 	SET_RCB_NEXT(pAdapter, Priority, NewNext) \
        		(pAdapter)->PriQue[Priority].pRcbListNext = (NewNext)

#define 	RCB_SET_MORE(pRcb) \
        	{ \
               	if((pRcb)->pRxDp->CmdSts & MORE) \
                   	(pRcb)->More = 1; \
               	else \
                   	LastFullPacket = (pRcb); \
        	}

#define 	DESC_CLEAR_OWN(pDesc) \
				(pDesc)->CmdSts &= ~(OWN)


#define		RX_DESC_GET_SIZE(pDesc) \
				(pDesc)->CmdSts & CMDSTS_SIZE_MASK

#define		UPDATE_RCB_TAIL(pRcbTail,pRcb) \
			{ \
				(pRcbTail)->pRxDp->link = (UINT) ((pRcb)->pRxDpPa);	\
				(pRcb)->pRxDp->link = 0;	\
				(pRcbTail)->pNext = (pRcb); \
				(pRcbTail) = (pRcb);  \
				(pRcbTail)->pNext = NULL; \
			}

#define 	INC_CURR_TCB(pAdapter, Priority, pTcb,count,base) \
 			((base) + \
 				(((UINT)pTcb - (UINT)base)/sizeof(HsmTCB) + count) % 	\
				pAdapter->PriQue[Priority].iMaxTxDesc)

#define		HsmMulticastDisable(pAdapter)	clear_mca_tbl((pAdapter))

#define 	HsmAttachBuffer(pRCB, Bufptr)  \
				(((pRCB)->pRxDp->BufPtr) = (UINT)(Bufptr))

#define		HsmIsRxPacketErrored(pRCB)	\
				(((pRCB)->pRxDp->CmdSts & RX_ERR)?1:0)

#define 	HsmSetRxdCmdSts(pRCB, Value)	\
				(((pRCB)->pRxDp->CmdSts) |= (UINT)(Value))

#define 	HsmClearRxdCmdSts(pRCB, Value)	\
				(((pRCB)->pRxDp->CmdSts) &= ~(Value))

#define		HsmGetMaxTxDesc(pAdapter, Prio)	\
				pAdapter->PriQue[Prio].iMaxTxDesc

#define		HsmGetMaxRxDesc(pAdapter, Prio)	\
				pAdapter->PriQue[Prio].iMaxRxDesc
/*
 * 	Macros to enable and disable interrupts.
 * 	Disabling the interrupts is done by writing a 0 to the IE flag in IER. 
 * 	Enabling the interrupts is done by writing a 1 to the IE flag in IER. 
 */

#define 	HsmEnableInterrupts(pAdapter)	\
				NsmRegWrite32((pAdapter)->pNsmContext, \
					((pAdapter)->RegAddr + IER), IE)

#define 	HsmDisableInterrupts(pAdapter)	\
				NsmRegWrite32((pAdapter)->pNsmContext, \
					((pAdapter)->RegAddr + IER), 0)

#ifdef PM_WOL
#define WAKE_STATE POWER_STATE_D0

#define WAKE_ON_LAN_MODES (MPR | PATM3 | PATM2 | PATM1 | PATM0 | PHYINT)

#define	OFFSET 		0	
#define	APAT_MASK		1	
#define	WKPAT_MASK		2

#define PAT_OFFSET	0x80

#define WKPAT (WKPAT0 | WKPAT1 | WKPAT2 | WKPAT3)

#define APAT_ALL (APAT0 | APAT1 | APAT2 | APAT3)

#ifdef DEBUG
UCHAR PatternHeadArray[] = {0xff,0xff, 0xff,
							0xff,0xff, 0xff,
							0x08, 0x0, 0x17,
							0x0b, 0x66, 0x16,
							0x08, 0x0};
#endif
#endif /* PM_WOL */
							
/*** Typedef Definitions ***/

typedef UCHAR MacAddr[6];

/*** Global (extern) Data Declarations ***/

/* Ramit : Tunable Parameters
extern	UINT	MinTxDescCnt_0, MaxTxDescCnt_0; 
extern	UINT	MinTxDescCnt_1, MaxTxDescCnt_1; 
extern	UINT	MinTxDescCnt_2, MaxTxDescCnt_2; 
extern	UINT	MinTxDescCnt_3, MaxTxDescCnt_3; 

extern	UINT	MinRxDescCnt_0, MaxRxDescCnt_0; 
extern	UINT	MinRxDescCnt_1, MaxRxDescCnt_1; 
extern	UINT	MinRxDescCnt_2, MaxRxDescCnt_2; 
extern	UINT	MinRxDescCnt_3, MaxRxDescCnt_3; 
*/

/* Ramit: In Adapter Context */
/*extern	UINT	IntrHoldoff;*/	/*	Interrupt hold off value */
/*extern	UINT	TxDrth;	*/		/*	Tx Drain Threshold */
/*extern	UINT	RxDrth;	*/		/*	Rx Drain Threshold */
/*extern	UINT	TxFlth;	*/		/*	Tx Fill Threshold */
/*extern	UINT	PauseCounterVal; */
/*
extern	UINT	RxFFLO;
extern	UINT	RxFFHI;
extern	UINT	RxSTLO;
extern 	UINT	RxSTHI;
*/

/* Ramit: In Adpater Context 
extern	UINT	MediaSpeed;
extern	UINT	DuplexMode;