📄 hsm.c
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/* * If adapter is not opened then return FAILURE. */ if (!(pAdapter->AdapterStatus & ADAPTER_INITIALIZED)) { NsmReleaseLock(pAdapter->pNsmContext, pAdapter->AdapterLock); return FAILURE; } /* Madhu Reset while (pAdapter->AdapterStatus & ADAPTER_RESETTING) */ if (pAdapter->AdapterStatus & ADAPTER_RESETTING) { NsmReleaseLock(pAdapter->pNsmContext, pAdapter->AdapterLock); return RESET_IN_PROGRESS; } pAdapter->AdapterStatus |= ADAPTER_RESETTING; NsmReleaseLock(pAdapter->pNsmContext, pAdapter->AdapterLock); /*Ramit : Wait for pending packets to be sent */ if (aSynch) NsmSleep(pAdapter->pNsmContext, 2000); if (aSynch) { Imr_val = ( PHY | SWI_INTR ); } else Imr_val = PHY; NsmRegWrite32(pAdapter->pNsmContext,(pAdapter->RegAddr+ IMR), Imr_val); NsmRegRead32(pAdapter->pNsmContext, (pAdapter->RegAddr + CR), &Cr_val); Cr_val |= (RXD | TXD ); Cr_val &= ~(RXE | TXE); NsmRegWrite32(pAdapter->pNsmContext,(pAdapter->RegAddr + IHR), 0); NsmRegWrite32(pAdapter->pNsmContext, (pAdapter->RegAddr + CR), Cr_val); pAdapter->CurrHoldOff = 0; NsmSleep(pAdapter->pNsmContext, 10); /* 10 milli seconds *//* * Clear the bitmask ADAPTER_OPEN from AdapterStatus field. */ if (pAdapter->AdapterStatus & ADAPTER_OPEN) { NsmAcquireLock(pAdapter->pNsmContext, pAdapter->AdapterLock); pAdapter->AdapterStatus &= ~(ADAPTER_OPEN); NsmReleaseLock(pAdapter->pNsmContext, pAdapter->AdapterLock); } if (aSynch) { Cr_val |= (SWI ); NsmRegWrite32(pAdapter->pNsmContext, (pAdapter->RegAddr + CR), Cr_val); } else {/* * Reset the Adapter (setting RST bit in CR register) and wait till the reset * is complete. */ NsmRegWrite32(pAdapter->pNsmContext, (pAdapter->RegAddr + CR), RST); i = 0; do { NsmSleep(pAdapter->pNsmContext, 10); /* 10 milli seconds */ NsmRegRead32(pAdapter->pNsmContext, (pAdapter->RegAddr + CR), &Cr_val); }while ( (Cr_val & RST) && ++i<200 );#ifdef NSCDEBUG NsmDbgMsg("HsmReset: resetting the PHY register and waiting for the link to be established. \n");#endif#ifdef NSCDEBUG Physts_val = ReadMiiReg(pAdapter, PHYSUP); NsmDbgMsg1("HsmReset : Physup value 0x%x\n",Physts_val);#endif /* * Reset the PHY register using BMCR */#ifdef _FA31X_ NsmRegWrite16(pAdapter->pNsmContext, (pAdapter->RegAddr + BMCR), BMCR_RESET);#else WriteMiiReg(pAdapter, BMCR, BMCR_RESET);#endif /* * Wait for the BMCR_RESET bit to clear, for reset complete. */ i = 0; do { NsmSleep(pAdapter->pNsmContext, 10 );#ifdef _FA31X_ NsmRegRead16(pAdapter->pNsmContext, (pAdapter->RegAddr + BMCR), &Bmcr_val);#else Bmcr_val = ReadMiiReg(pAdapter, BMCR);#endif } while ( (Bmcr_val & BMCR_RESET) && ++i<400 ); /* Ramit : Clear the statistics MIB counter */ HsmClearStatistics(pAdapter);#ifdef FWARE_DOWNLOADif (pAdapter->FileHandle) { /* Ramit : Wait For the Phy to reset properly */ NsmSleep(pAdapter->pNsmContext, 500 ); HsmDownLoadFirmwareInit(pAdapter); Stat = NsmDownLoadFirmwareFromFileX(pAdapter); if( Stat == FAILURE ) { /* Event log */ NsmDownLoadFailed(pAdapter); /* * Reset the PHY register using BMCR incase of a DownloadFail */#ifdef _FA31X_ NsmRegWrite16(pAdapter->pNsmContext, (pAdapter->RegAddr + BMCR), BMCR_RESET);#else WriteMiiReg(pAdapter, BMCR, BMCR_RESET);#endif /* * Wait for the BMCR_RESET bit to clear, for reset complete. */ i = 0; do { NsmSleep(pAdapter->pNsmContext, 5 );#ifdef _FA31X_ NsmRegRead16(pAdapter->pNsmContext, (pAdapter->RegAddr + BMCR), &Bmcr_val);#else Bmcr_val = ReadMiiReg(pAdapter, BMCR);#endif } while ( (Bmcr_val & BMCR_RESET) && ++i<800 ); } else { /* if the download is successful */ HsmStartFirmWareCode(pAdapter); Stat = HsmVerifyDownLoad(pAdapter); if(Stat == FAILURE) { /* Event log */ NsmDownLoadFailed(pAdapter); /* * Reset the PHY register using BMCR incase of a DownloadFail */#ifdef _FA31X_ NsmRegWrite16(pAdapter->pNsmContext, (pAdapter->RegAddr + BMCR), BMCR_RESET);#else WriteMiiReg(pAdapter, BMCR, BMCR_RESET);#endif /* * Wait for the BMCR_RESET bit to clear, for reset complete. */ i = 0; do { NsmSleep(pAdapter->pNsmContext, 5 );#ifdef _FA31X_ NsmRegRead16(pAdapter->pNsmContext, (pAdapter->RegAddr + BMCR), &Bmcr_val);#else Bmcr_val = ReadMiiReg(pAdapter, BMCR);#endif } while ( (Bmcr_val & BMCR_RESET) && ++i<800 ); } }}#endif /*Ramit: Indicate Link Down */ pAdapter->AdapterStatus &= ~(LINK_UP); /* During the Initialization wait for link to come up */ i = 0; do { Bmsr_val = ReadMiiReg(pAdapter, BMSR); Bmsr_val = ReadMiiReg(pAdapter, BMSR); NsmSleep(pAdapter->pNsmContext, 50 ); } while ( (Bmsr_val & LINK_STATUS_UP) && (++i < 200) ); /* * Set the MAC address stored in pAdapter->CurrMacAddr and load the filter * memory with the multicast addresses stored in the Adapter context. */ refresh_mca_tbl(pAdapter); HsmSetMacAddress(pAdapter, pAdapter->CurrMacAddr); NsmAcquireLock(pAdapter->pNsmContext, pAdapter->AdapterLock); if (!(pAdapter->AdapterStatus & ADAPTER_OPEN)) { NsmRegWrite32(pAdapter->pNsmContext, (pAdapter->RegAddr + IMR), Imr_val); NsmReleaseLock(pAdapter->pNsmContext, pAdapter->AdapterLock); HsmEnableInterrupts(pAdapter); } else NsmReleaseLock(pAdapter->pNsmContext, pAdapter->AdapterLock); pAdapter->AdapterStatus &= ~ADAPTER_RESETTING; } return SUCCESS;} /* End of HsmReset() *//*******************************************************************************f** Name: * HsmInitialize** Description: * Initialize the adapter. * This is called from NSM initialize routine.** Parameters: * pAdapter - Pointer to the adapter context.** Return Value: * SUCCESS - Initialization successful.* FAILURE - * Descriptor pool creation failure.* TCB / RCB array initialization failure.* NSM lock creation failure.* Priority Queue creation failure.**f*******************************************************************************/UCHARHsmInitialize(AdapterContext *pAdapter){ USHORT priIdx, PtrnIdx; UCHAR AdapterPQ ; UINT DescSize = 0; CHAR retval; UINT phyRev, dword = 0;#ifdef NSCDEBUG NsmDbgMsg("HsmInitialize: Initializing the adapter . \n");#endif/* * Create a Adapter lock and TxLock. */ pAdapter->AdapterLock = (PVOID) NsmCreateLock(); if (pAdapter->AdapterLock == NULL) { return FAILURE; } pAdapter->TxLock = (PVOID) NsmCreateLock(); if (pAdapter->TxLock == NULL) { NsmDestroyLock(pAdapter->pNsmContext, pAdapter->AdapterLock); return FAILURE; }/* * Determine the number of priority queues to be created based on Adapter * supported PQ and operating system supported PQ. */ AdapterPQ = MAXPRI_ADAPTER;#ifdef _GA622T_/* * In FA31X priority queues are not supported. */ if (pAdapter->OsPrio < AdapterPQ) AdapterPQ = pAdapter->OsPrio; #endif pAdapter->NumPrio = pAdapter->TxNumPrio = pAdapter->RxNumPrio = AdapterPQ;/* * Create 'NumPrio' number of priority queues. */#ifdef NSCDEBUG NsmDbgMsg("HsmInitialize: Allocating mem for Priority queues. \n");#endif if (pAdapter->NumPrio) pAdapter->PriQue = (PriorityQue *) NsmMalloc(sizeof(PriorityQue) * pAdapter->NumPrio); if (pAdapter->PriQue == NULL) { HsmFreeResources(pAdapter, PRI_QUE_FAILED); #ifdef NSCDEBUG NsmDbgMsg("HsmInitialize: Memory allocation for Priority queues failed.\n");#endif return FAILURE; } #ifdef NSCDEBUG NsmDbgMsg("HsmInitialize: Allocating contiguous memory for descriptors.\n");#endif/* * Allocate Pool of Descriptors */ for(priIdx = 0; priIdx < pAdapter->NumPrio; priIdx++) DescSize += sizeof(DevDesc) * ( pAdapter->TxDp[priIdx][DESCCNT] + pAdapter->RxDp[priIdx][DESCCNT]) ; pAdapter->pDescList.BufSize = DescSize; /*Madhu*/ pAdapter->pDescList.VirtAddr = NULL; /*Madhu. Add cache flag NsmMallocContiguous(pAdapter->pNsmContext, &pAdapter->pDescList , 64);*/ NsmMallocContiguous(pAdapter->pNsmContext, &pAdapter->pDescList , 64, 0);/* * Allocation for Contiguous Memory failed. */ if (pAdapter->pDescList.VirtAddr == NULL) { HsmFreeResources(pAdapter, DP_ALLOC_FAILED);#ifdef NSCDEBUG NsmDbgMsg("HsmInitialize: Contiguous memory allocation for descriptors failed.\n");#endif return FAILURE; } /* * Create the TCB array and Setup the TCB and Txd ring. Create RCB array and * setup the RCB and Rxd ring. */ retval = HsmTxInit(pAdapter); if (retval != SUCCESS) { HsmFreeResources(pAdapter, TCB_ALLOC_FAILED);#ifdef NSCDEBUG NsmDbgMsg("HsmInitialize: HsmTxInit() failed.\n");#endif return FAILURE; } retval = HsmRxInit(pAdapter); if (retval == RCB_ARRAY_ALLOC_FAILURE) { HsmFreeResources(pAdapter, RCB_ALLOC_FAILED);#ifdef NSCDEBUG NsmDbgMsg("HsmInitialize: HsmRxInit() failed.\n");#endif return FAILURE; } /* Madhu Moving it down if (retval < pAdapter->RxNumPrio) pAdapter->RxNumPrio = retval; */ if (!retval) { /*Madhu RCB_ALLOC_FAILED should do HsmFreeResources(pAdapter, RXINIT_FAILED);*/ HsmFreeResources(pAdapter, RCB_ALLOC_FAILED); return FAILURE; } if (retval < pAdapter->RxNumPrio) pAdapter->RxNumPrio = retval; #ifdef _GA622T_/* * Calculate the Adapter Mapping quotient value and set the * ADAPTER_INITIALIZED bitmask in AdapterStatus. */ HsmCreateMapValue(pAdapter);#endif #ifdef POWER_PATTERN/* * Initialize the Power Pattern array to store the Wake on LAN patterns. */ for(PtrnIdx = 0; PtrnIdx < MAX_POWER_PTRN; PtrnIdx++) pAdapter->PowerPattern[PtrnIdx] = (UCHAR *) NsmMalloc(MAX_PTRN_SZ); pAdapter->PatternCnt = 0;#endif/* * Getting the PhyAddress of the DP83891 chip. * Read PHYIDR1 and PHYIDR2 and compare the OUI. */ for(pAdapter->phyAddress=31; pAdapter->phyAddress != 0; pAdapter->phyAddress--) { dword = ReadMiiReg ( pAdapter, PHYIDR1 ); if(dword == 0x2000) { phyRev = ReadMiiReg ( pAdapter, PHYIDR2 );/* * Break, if this is a DP83891 / DP83861 */ if ( (phyRev & ~(0x000f)) == 0x00005c50 || (phyRev & ~(0x000f)) == 0x00005c60 ) { break; } } } pAdapter->AdapterStatus |= ADAPTER_INITIALIZED;#ifdef NSCDEBUG NsmDbgMsg("HsmInitialize: Adapter initialization completed.\n");#endif return SUCCESS;} /* End of HsmInitialize() *//*******************************************************************************f** Name: * HsmTxInit** Description: * Create TCB ring and setup Txd ring. * This is called from HsmInitialize()** Parameters: * pAdapter - Pointer to the adapter context.** Return Value: * SUCCESS - TxInit Succeded.* FAILURE - TCB pool allocation failed. **f*******************************************************************************/UCHARHsmTxInit(AdapterContext *pAdapter){ USHORT priIdx, TxdIdx, TCBidx, idx; UINT TotTCBsz = 0; UCHAR *Start_TCBarray; /* Start of the TCB array for the current pri. */ UCHAR *Start_DescArray; /* Start of the physical address for Txd. */ UCHAR *Start_DescArrayPa; /* Start of the physical address for Txd. */#ifdef NSCDEBUG NsmDbgMsg("HsmTxInit: Allocating and setting up TCB and Txd Ring.\n");#endif/* * Allocate Pool of TCBs. */ for(priIdx = 0; priIdx < pAdapter->TxNumPrio; priIdx++) TotTCBsz += sizeof(HsmTCB) * pAdapter->TxDp[priIdx][DESCCNT]; pAdapter->pTcbArray = (PVOID) NsmMalloc(TotTCBsz); if (pAdapter->pTcbArray == NULL) return FAILURE; Start_TCBarray = (UCHAR *)pAdapter->pTcbArray; Start_DescArray = pAdapter->pDescList.VirtAddr; Start_DescArrayPa = pAdapter->pDescList.PhysAddr;/* * Assign Head , Tail pointers Max number and number of free descriptors * for each priority queue allocated.
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