tmhal.c

PNX系列设备驱动 PNX系列设备驱动

	{
		return FALSE;
	}

	/*
	DPF(0,("tmman:halHardwareInterruptHandler:Interrupt[%x]:ServiceContext[%x]\n",
		Interrupt, ServiceContext ));	
	*/
	halAcknowledgeInterrupt ( (UInt32)Hal ); 

	//Hal->DPCRequested = KeQueryInterruptTime();

    IoRequestDpc ( Hal->FunctionalDeviceObject, Hal->FunctionalDeviceObject->CurrentIrp, Hal );

    return TRUE;
}

VOID	halDeferredInterruptHandler (
	PKDPC Dpc,
	PDEVICE_OBJECT DeviceObject,
	PIRP Irp,
	PVOID Context )
{

	HalObject*	Hal = (HalObject*)Context;

	/*
	ULONGLONG	Temp1, Temp2;
	Temp1 = KeQueryInterruptTime();
	Hal->DPCLatency = (ULONG)(Temp1 - Hal->DPCRequested);
	*/

/*	DPF(0,("HL{")); */
	/*
	DPF(0,("tmman:halDeferredInterruptHandler:DPC[%x]:DeviceObject[%x]:Irp[%x]:Context[%x]\n",
		Dpc, DeviceObject, Irp, Context ));	
	*/

	Hal->Handler(Hal->Context);

/*	DPF(0,("}HL" )); */
/*
	Temp2 = KeQueryInterruptTime();
	Hal->DPCDuration = (ULONG)(Temp2 - Temp1);

	DPF(0,("tmman:Counters:DPCLatency[%u]:DPCDuration[%u]:InterruptInterval[%u]\n",
		Hal->DPCLatency, Hal->DPCDuration, Hal->InterruptInterval ));	
*/

}


UInt32	halAccess32( 
	UInt32	HalHandle,
	UInt32 volatile Value )
{
	UInt32	SwappedValue,TempValue;
	TempValue = Value;

	/* we don't validate the object for efficiency reasons */
	if ( ((HalObject*)HalHandle)->Swapping )
	{
		((UInt8*)&SwappedValue)[3] = ((UInt8*)&TempValue)[0];
		((UInt8*)&SwappedValue)[2] = ((UInt8*)&TempValue)[1];
		((UInt8*)&SwappedValue)[1] = ((UInt8*)&TempValue)[2];
		((UInt8*)&SwappedValue)[0] = ((UInt8*)&TempValue)[3];
/*		DPF(0,("[%x->%x]",TempValue, SwappedValue )); */
		return ( SwappedValue );
	}
	else
	{
		return Value;
	}
	
}

UInt16	halAccess16 ( 
	UInt32	HalHandle,
	UInt16 volatile Value )
{
	/* we don't validate the object for efficiency reasons */
	UInt16	SwappedValue,TempValue;
	TempValue = Value;

	if ( ((HalObject*)HalHandle)->Swapping )
	{
		((UInt8*)&SwappedValue)[1] = ((UInt8*)&TempValue)[0];
		((UInt8*)&SwappedValue)[0] = ((UInt8*)&TempValue)[1];
		/* DPF(0,("[%x->%x]",TempValue, SwappedValue )); */
		return ( SwappedValue );
	}
	else
	{
		return Value;
	}
	return Value;
}

void	halCopyback( Pointer CacheBlock, UInt32 BlockCount  )
{
	/*	no implementation for this platform */
}

void	halAccessEnable ( 
	UInt32	HalHandle )
{
	/*	no implementation for this platform */
}

void	halAccessDisable ( 
	UInt32	HalHandle )
{
	/*	no implementation for this platform */
}


void	halDumpObject (
 	UInt32	HalHandle )
{
	HalObject*	Hal = (HalObject*)HalHandle;

    DPF(1,("\ntmman:halDumpObject\n"));

    DPF(1,("[TMDeviceVendorID:%x]\n", Hal->TMDeviceVendorID));
    DPF(1,("[TMSubsystemID:%x]\n", Hal->TMSubsystemID));
	DPF(1,("[TMClassRevisionID:%x]\n", Hal->TMClassRevisionID));

	DPF(1,("[BridgeDeviceVendorID:%x]\n", Hal->BridgeDeviceVendorID));
	DPF(1,("[BridgeSubsystemID:%x]\n", Hal->BridgeSubsystemID));
	DPF(1,("[BridgeClassRevisionID:%x]\n", Hal->BridgeClassRevisionID));
	
    DPF(1,("[SelfInterrupt:%x]\n", Hal->SelfInterrupt));
	DPF(1,("[PeerInterrupt:%x]\n", Hal->PeerInterrupt));
	DPF(1,("[Handler:%x]\n", Hal->Handler));
	DPF(1,("[Context:%x]\n", Hal->Context));
	DPF(1,("[BusNumber:%x]\n", Hal->BusNumber));
	DPF(1,("[SlotNumber|DeviceNumber:%x|FunctionNumber:%x]\n",
		Hal->SlotNumber.u.bits.DeviceNumber, Hal->SlotNumber.u.bits.FunctionNumber));

	DPF(1,("[MMIOAddrPhysical|HighPart:%x|LowPart:%x]\n", 
		Hal->MMIOAddrPhysical.u.HighPart, Hal->MMIOAddrPhysical.u.LowPart));
	DPF(1,("[MMIOLength:%x]\n", Hal->MMIOLength));
	DPF(1,("[MMIOAddrKernel:%x]\n", Hal->MMIOAddrKernel));


	DPF(1,("[SDRAMAddrPhysical|HighPart:%x|LowPart:%x]\n", 
		Hal->SDRAMAddrPhysical.u.HighPart, Hal->SDRAMAddrPhysical.u.LowPart));
	DPF(1,("[SDRAMLength:%x]\n", Hal->SDRAMLength));
	DPF(1,("[SDRAMAddrKernel:%x]\n", Hal->SDRAMAddrKernel));

	DPF(1,("[InterruptObject:%x]\n", Hal->InterruptObject));
	DPF(1,("[DeviceObject:%x]\n", Hal->DeviceObject));
	DPF(1,("[DriverObject:%x]\n", Hal->DriverObject));

	DPF(1,("[FunctionalDeviceObject:%x]\n", Hal->FunctionalDeviceObject));
	DPF(1,("[PhysicalDeviceObject:%x]\n", Hal->PhysicalDeviceObject));
	DPF(1,("[StackDeviceObject:%x]\n", Hal->StackDeviceObject));

	DPF(1,("\n"));

}    



///////////////////////////////////////////////////////////////////////////
/////				These Headers should be moved to platform.h 
///////////////////////////////////////////////////////////////////////////
/* Helper functions */
PVOID	halMapKernelAddressToUserAddress ( 
	HANDLE PhysicalMemoryHandle, 
	PVOID KernelModeVirtualAddress, 
	ULONG Length,
	PVOID	*MdlPointer )
{
	PMDL	Mdl;
	PVOID	UserModeVirtualAddress;

	if ( ( Mdl = IoAllocateMdl (
		KernelModeVirtualAddress,
		Length,
		FALSE,
		FALSE,
		NULL ) ) == NULL )
	{
        DPF(0,("tmman:halMapKernelAddressToUserAddress:IoAllocateMdl:FAIL\n"));
		goto halMapKernelAddressToUserAddressExit1;
	}

	//MmInitializeMdl(
	//	   Mdl,
	//	   KernelModeVirtualAddress,
	//	   Length );		

	MmBuildMdlForNonPagedPool ( Mdl );

	MmProbeAndLockPages (
		Mdl,
		UserMode,
		IoModifyAccess );

	if ( ( UserModeVirtualAddress = MmMapLockedPages (
		Mdl,
		UserMode ) ) == NULL )
	{
		DPF(0,("tmman:halMapKernelAddressToUserAddress:MmMapLockedPages:FAIL\n"));
		goto halMapKernelAddressToUserAddressExit2;
	}

	*MdlPointer = Mdl;
	return UserModeVirtualAddress;


halMapKernelAddressToUserAddressExit2:
	IoFreeMdl ( Mdl );

halMapKernelAddressToUserAddressExit1:
	return NULL;
	//return KernelModeVirtualAddress;
}

VOID	halUnmapUserAddress ( PVOID Mdl )
{

	MmUnlockPages ( Mdl );

	IoFreeMdl ( Mdl );
}

// these functions go into hal.c
BOOLEAN	halAllocateBusMasterChannel ( 
	UInt32 HalHandle,
	Pointer Context,
	PDRIVER_CONTROL ExecutionRoutine )
{	
	HalObject*	Hal = (HalObject*)HalHandle;
	NTSTATUS NTStatus;
    KIRQL	OldIrql;

    KeRaiseIrql( DISPATCH_LEVEL, &OldIrql );

	NTStatus = IoAllocateAdapterChannel (
		Hal->AdapterObject,
		Hal->FunctionalDeviceObject,
		Hal->NumberOfMapRegisters,
		ExecutionRoutine,
		Context );

    if ( ! NT_SUCCESS(NTStatus) )
    {
        DPF(0,("tmman:halAllocateBusMasterChannel:IoAllocateAdapterChannel:FAIL[%x]\n", NTStatus ));
		KeLowerIrql( OldIrql );

		return False;
			
	}


    KeLowerIrql( OldIrql );

	return True;
}

BOOLEAN	halFreeBusMasterChannel ( 
	UInt32 HalHandle, 
	Pointer MapRegisterBase, 
	UInt32 MapRegisterCount )
{
	HalObject*	Hal = (HalObject*)HalHandle;
	IoFreeMapRegisters ( Hal->AdapterObject,
		MapRegisterBase,
		MapRegisterCount );

	return TRUE;
}

TMStatus	halSwapEndianess ( 
	UInt32	HalHandle,
	Bool	SwapEnable )
{
	HalObject*	Hal = (HalObject*)HalHandle;
	Hal->Swapping = SwapEnable;
	DPF(0,("tmman:halSwapEndianess:Swapping[%x]\n", SwapEnable )); 

	return statusSuccess;
}

TMStatus	halGetEndianess ( 
	UInt32	HalHandle,
	Bool*	SwapEnablePtr )
{
	HalObject*	Hal = (HalObject*)HalHandle;
	*SwapEnablePtr = Hal->Swapping;

	return statusSuccess;
}

BOOLEAN	halMapSDRAM ( UInt32 HalHandle )
{
	HalObject*	Hal = (HalObject*)HalHandle;

	if ( TMManGlobal->MapSDRAM )
	{
		return TRUE;
	}

	if ( InterlockedIncrement ( &Hal->SDRAMMapCount ) != 1 )
	{
		return TRUE;
	}

	if ( ( Hal->SDRAMAddrKernel = MmMapIoSpace ( 
		Hal->SDRAMAddrPhysical,
		Hal->SDRAMLength,
		FALSE ) ) == NULL )
	{
		DPF(0,("tmman:halMapSDRAM:halMapAdapterMemory:SDRAM:FAIL\n" ));
		return  FALSE;
	}

	return TRUE;

}

BOOLEAN	halUnmapSDRAM ( UInt32 HalHandle )
{
	HalObject*	Hal = (HalObject*)HalHandle;

	if ( TMManGlobal->MapSDRAM )
	{
		return TRUE;
	}

	if ( Hal->SDRAMMapCount == 0 )
	{
		return FALSE;
	}

	if ( InterlockedDecrement  ( &Hal->SDRAMMapCount ) != 0 )
	{
		return TRUE;
	}

	MmUnmapIoSpace ( Hal->SDRAMAddrKernel, Hal->SDRAMLength );

 	return TRUE;
}

UInt32	halTranslateTargetPhysicalAddress ( 
	UInt32 HalHandle, 
	UInt32 PhysicalAddress )
{
	HalObject*	Hal = (HalObject*)HalHandle;

	return ( PhysicalAddress + Hal->Offset );
}

ULONG
HalSetBusDataByOffset(
	IN BUS_DATA_TYPE BusDataType,
	IN ULONG BusNumber,
	IN ULONG SlotNumber,
	IN PVOID Buffer,
	IN ULONG  Offset,
	IN ULONG Length )
{
	PCI_CONFIG_ADDRESS PCIConfigAddress;
	PCI_SLOT_NUMBER	PCISlotNumber;
	PCI_COMMON_CONFIG	PCIConfig;
	ULONG	DWORDOffset, DWORDLength;
	ULONG	Idx;

	DWORDOffset = Offset / 4;
	DWORDLength = ( ( ( 3 + Length - (Offset % 4) ) / 4 ) + 1 );

	// we are breaking all NT rules by bypassing the HAL and the BIOS here
	// so don't bother doing a HalTranalateBusAddress & MmMapMmioSpace
	PCISlotNumber.u.AsULONG =  SlotNumber;

	PCIConfigAddress.u.Bits.Zeros			= 0;
	PCIConfigAddress.u.Bits.FunctionNumber	= PCISlotNumber.u.bits.FunctionNumber;
	PCIConfigAddress.u.Bits.DeviceNumber	= PCISlotNumber.u.bits.DeviceNumber;
	PCIConfigAddress.u.Bits.BusNumber		= BusNumber;		
	PCIConfigAddress.u.Bits.Enable			= 1;

	PCIConfigAddress.u.Bits.RegisterNumber	= DWORDOffset;

	WRITE_PORT_ULONG ( (PULONG)PCI_CONFIG_ADDR_PORT, PCIConfigAddress.u.Long );
	WRITE_PORT_ULONG ( (PULONG)PCI_CONFIG_DATA_PORT, ((PULONG)Buffer)[0] );

/*
	for ( Idx = DWORDOffset ; Idx < ( DWORDOffset + DWORDLength ) ; Idx ++ )
	{
		PCIConfigAddress.u.Bits.RegisterNumber	= Idx;
		
		WRITE_PORT_ULONG ( (PULONG)PCI_CONFIG_ADDR_PORT, PCIConfigAddress.u.Long );
		((PULONG)&PCIConfig)[Idx] = READ_PORT_ULONG ( (PULONG)PCI_CONFIG_DATA_PORT );
	}

	for ( Idx = 0 ; Idx < Length ; Idx ++ )
	{
		((PUCHAR)&PCIConfig)[Idx + Offset] = ((PUCHAR)Buffer)[Idx];
	}


	for ( Idx = DWORDOffset ; Idx < ( DWORDOffset + DWORDLength ) ; Idx ++ )
	{
		PCIConfigAddress.u.Bits.RegisterNumber	= Idx;
		
		WRITE_PORT_ULONG ( (PULONG)PCI_CONFIG_ADDR_PORT, PCIConfigAddress.u.Long );
		WRITE_PORT_ULONG ( (PULONG)PCI_CONFIG_DATA_PORT, ((PULONG)&PCIConfig)[Idx] );
	}
*/

	return Length;
}

ULONG
HalGetBusDataByOffset(
	IN BUS_DATA_TYPE BusDataType,
	IN ULONG BusNumber,
	IN ULONG SlotNumber,
	IN PVOID Buffer,
	IN ULONG  Offset,
	IN ULONG Length )
{
	PCI_CONFIG_ADDRESS PCIConfigAddress;
	PCI_SLOT_NUMBER	PCISlotNumber;
	PCI_COMMON_CONFIG	PCIConfig;
	ULONG	DWORDOffset, DWORDLength;
	ULONG	Idx;

    UNREFERENCED_PARAMETER( BusDataType );

	DWORDOffset = Offset / 4;
	DWORDLength = ( ( ( 3 + Length - (Offset % 4) ) / 4 ) + 1 );

	// we are breaking all NT rules by bypassing the HAL and the BIOS here
	// so don't bother doing a HalTranalateBusAddress & MmMapMmioSpace
	PCISlotNumber.u.AsULONG =  SlotNumber;

	PCIConfigAddress.u.Bits.Zeros			= 0;
	PCIConfigAddress.u.Bits.FunctionNumber	= PCISlotNumber.u.bits.FunctionNumber;
	PCIConfigAddress.u.Bits.DeviceNumber	= PCISlotNumber.u.bits.DeviceNumber;
	PCIConfigAddress.u.Bits.BusNumber		= BusNumber;		
	PCIConfigAddress.u.Bits.Enable			= 1;

	PCIConfigAddress.u.Bits.RegisterNumber	= DWORDOffset;

	WRITE_PORT_ULONG ( (PULONG)PCI_CONFIG_ADDR_PORT, PCIConfigAddress.u.Long );
	((PULONG)Buffer)[0] = READ_PORT_ULONG ( (PULONG)PCI_CONFIG_DATA_PORT );


/*
	for ( Idx = DWORDOffset ; Idx < ( DWORDOffset + DWORDLength ) ; Idx ++ )
	{
		PCIConfigAddress.u.Bits.RegisterNumber	= Idx;
		
		WRITE_PORT_ULONG ( (PULONG)PCI_CONFIG_ADDR_PORT, PCIConfigAddress.u.Long );
		((PULONG)&PCIConfig)[Idx] = READ_PORT_ULONG ( (PULONG)PCI_CONFIG_DATA_PORT );
	}

	for ( Idx = 0 ; Idx < Length ; Idx ++ )
	{
		((PUCHAR)Buffer)[Idx] = ((PUCHAR)&PCIConfig)[Idx + Offset];
	}
*/

	return Length;
}