dtt6c03b_zsp0_h.lex

来自「此源码是基于大唐微电子的DSP芯片ZSP的串口程序」· LEX 代码 · 共 983 行 · 第 1/5 页

DMAS1_CH10_CTL1|dg|#define DMAS1_CH10_CTL1((DMAS1_BASE + 0x66)||748|
DMAS1_CH10_DAR|dg|#define DMAS1_CH10_DAR((DMAS1_BASE + 0x62)||744|
DMAS1_CH10_SAR|dg|#define DMAS1_CH10_SAR((DMAS1_BASE + 0x60)||743|
DMAS1_CH11_CTL0_H|dg|#define DMAS1_CH11_CTL0_H((DMAS1_BASE + 0x6D)||756|
DMAS1_CH11_CTL0_L|dg|#define DMAS1_CH11_CTL0_L((DMAS1_BASE + 0x6C)||755|
DMAS1_CH11_CTL0|dg|#define DMAS1_CH11_CTL0((DMAS1_BASE + 0x6C)||754|
DMAS1_CH11_CTL1_H|dg|#define DMAS1_CH11_CTL1_H((DMAS1_BASE + 0x6F)||759|
DMAS1_CH11_CTL1_L|dg|#define DMAS1_CH11_CTL1_L((DMAS1_BASE + 0x6E)||758|
DMAS1_CH11_CTL1|dg|#define DMAS1_CH11_CTL1((DMAS1_BASE + 0x6E)||757|
DMAS1_CH11_DAR|dg|#define DMAS1_CH11_DAR((DMAS1_BASE + 0x6A)||753|
DMAS1_CH11_SAR|dg|#define DMAS1_CH11_SAR((DMAS1_BASE + 0x68)||752|
DMAS1_CH12_CTL0_H|dg|#define DMAS1_CH12_CTL0_H((DMAS1_BASE + 0x75)||765|
DMAS1_CH12_CTL0_L|dg|#define DMAS1_CH12_CTL0_L((DMAS1_BASE + 0x74)||764|
DMAS1_CH12_CTL0|dg|#define DMAS1_CH12_CTL0((DMAS1_BASE + 0x74)||763|
DMAS1_CH12_CTL1_H|dg|#define DMAS1_CH12_CTL1_H((DMAS1_BASE + 0x77)||768|
DMAS1_CH12_CTL1_L|dg|#define DMAS1_CH12_CTL1_L((DMAS1_BASE + 0x76)||767|
DMAS1_CH12_CTL1|dg|#define DMAS1_CH12_CTL1((DMAS1_BASE + 0x76)||766|
DMAS1_CH12_DAR|dg|#define DMAS1_CH12_DAR((DMAS1_BASE + 0x72)||762|
DMAS1_CH12_SAR|dg|#define DMAS1_CH12_SAR((DMAS1_BASE + 0x70)||761|
DMAS1_CH13_CTL0_H|dg|#define DMAS1_CH13_CTL0_H((DMAS1_BASE + 0x7D)||774|
DMAS1_CH13_CTL0_L|dg|#define DMAS1_CH13_CTL0_L((DMAS1_BASE + 0x7C)||773|
DMAS1_CH13_CTL0|dg|#define DMAS1_CH13_CTL0((DMAS1_BASE + 0x7C)||772|
DMAS1_CH13_CTL1_H|dg|#define DMAS1_CH13_CTL1_H((DMAS1_BASE + 0x7F)||777|
DMAS1_CH13_CTL1_L|dg|#define DMAS1_CH13_CTL1_L((DMAS1_BASE + 0x7E)||776|
DMAS1_CH13_CTL1|dg|#define DMAS1_CH13_CTL1((DMAS1_BASE + 0x7E)||775|
DMAS1_CH13_DAR|dg|#define DMAS1_CH13_DAR((DMAS1_BASE + 0x7A)||771|
DMAS1_CH13_SAR|dg|#define DMAS1_CH13_SAR((DMAS1_BASE + 0x78)||770|
DMAS1_CH14_CTL0_H|dg|#define DMAS1_CH14_CTL0_H((DMAS1_BASE + 0x85)||783|
DMAS1_CH14_CTL0_L|dg|#define DMAS1_CH14_CTL0_L((DMAS1_BASE + 0x84)||782|
DMAS1_CH14_CTL0|dg|#define DMAS1_CH14_CTL0((DMAS1_BASE + 0x84)||781|
DMAS1_CH14_CTL1_H|dg|#define DMAS1_CH14_CTL1_H((DMAS1_BASE + 0x87)||786|
DMAS1_CH14_CTL1_L|dg|#define DMAS1_CH14_CTL1_L((DMAS1_BASE + 0x86)||785|
DMAS1_CH14_CTL1|dg|#define DMAS1_CH14_CTL1((DMAS1_BASE + 0x86)||784|
DMAS1_CH14_DAR|dg|#define DMAS1_CH14_DAR((DMAS1_BASE + 0x82)||780|
DMAS1_CH14_SAR|dg|#define DMAS1_CH14_SAR((DMAS1_BASE + 0x80)||779|
DMAS1_CH15_CTL0_H|dg|#define DMAS1_CH15_CTL0_H((DMAS1_BASE + 0x8D)||792|
DMAS1_CH15_CTL0_L|dg|#define DMAS1_CH15_CTL0_L((DMAS1_BASE + 0x8C)||791|
DMAS1_CH15_CTL0|dg|#define DMAS1_CH15_CTL0((DMAS1_BASE + 0x8C)||790|
DMAS1_CH15_CTL1_H|dg|#define DMAS1_CH15_CTL1_H((DMAS1_BASE + 0x8F)||795|
DMAS1_CH15_CTL1_L|dg|#define DMAS1_CH15_CTL1_L((DMAS1_BASE + 0x8E)||794|
DMAS1_CH15_CTL1|dg|#define DMAS1_CH15_CTL1((DMAS1_BASE + 0x8E)||793|
DMAS1_CH15_DAR|dg|#define DMAS1_CH15_DAR((DMAS1_BASE + 0x8A)||789|
DMAS1_CH15_SAR|dg|#define DMAS1_CH15_SAR((DMAS1_BASE + 0x88)||788|
DMAS1_CH1_CTL0_H|dg|#define DMAS1_CH1_CTL0_H((DMAS1_BASE + 0x1D)||666|
DMAS1_CH1_CTL0_L|dg|#define DMAS1_CH1_CTL0_L((DMAS1_BASE + 0x1C)||665|
DMAS1_CH1_CTL0|dg|#define DMAS1_CH1_CTL0((DMAS1_BASE + 0x1C)||664|
DMAS1_CH1_CTL1_H|dg|#define DMAS1_CH1_CTL1_H((DMAS1_BASE + 0x1F)||669|
DMAS1_CH1_CTL1_L|dg|#define DMAS1_CH1_CTL1_L((DMAS1_BASE + 0x1E)||668|
DMAS1_CH1_CTL1|dg|#define DMAS1_CH1_CTL1((DMAS1_BASE + 0x1E)||667|
DMAS1_CH1_DAR|dg|#define DMAS1_CH1_DAR((DMAS1_BASE + 0x1A)||663|
DMAS1_CH1_SAR|dg|#define DMAS1_CH1_SAR((DMAS1_BASE + 0x18)||662|
DMAS1_CH2_CTL0_H|dg|#define DMAS1_CH2_CTL0_H((DMAS1_BASE + 0x25)||675|
DMAS1_CH2_CTL0_L|dg|#define DMAS1_CH2_CTL0_L((DMAS1_BASE + 0x24)||674|
DMAS1_CH2_CTL0|dg|#define DMAS1_CH2_CTL0((DMAS1_BASE + 0x24)||673|
DMAS1_CH2_CTL1_H|dg|#define DMAS1_CH2_CTL1_H((DMAS1_BASE + 0x27)||678|
DMAS1_CH2_CTL1_L|dg|#define DMAS1_CH2_CTL1_L((DMAS1_BASE + 0x26)||677|
DMAS1_CH2_CTL1|dg|#define DMAS1_CH2_CTL1((DMAS1_BASE + 0x26)||676|
DMAS1_CH2_DAR|dg|#define DMAS1_CH2_DAR((DMAS1_BASE + 0x22)||672|
DMAS1_CH2_SAR|dg|#define DMAS1_CH2_SAR((DMAS1_BASE + 0x20)||671|
DMAS1_CH3_CTL0_H|dg|#define DMAS1_CH3_CTL0_H((DMAS1_BASE + 0x2D)||684|
DMAS1_CH3_CTL0_L|dg|#define DMAS1_CH3_CTL0_L((DMAS1_BASE + 0x2C)||683|
DMAS1_CH3_CTL0|dg|#define DMAS1_CH3_CTL0((DMAS1_BASE + 0x2C)||682|
DMAS1_CH3_CTL1_H|dg|#define DMAS1_CH3_CTL1_H((DMAS1_BASE + 0x2F)||687|
DMAS1_CH3_CTL1_L|dg|#define DMAS1_CH3_CTL1_L((DMAS1_BASE + 0x2E)||686|
DMAS1_CH3_CTL1|dg|#define DMAS1_CH3_CTL1((DMAS1_BASE + 0x2E)||685|
DMAS1_CH3_DAR|dg|#define DMAS1_CH3_DAR((DMAS1_BASE + 0x2A)||681|
DMAS1_CH3_SAR|dg|#define DMAS1_CH3_SAR((DMAS1_BASE + 0x28)||680|
DMAS1_CH4_CTL0_H|dg|#define DMAS1_CH4_CTL0_H((DMAS1_BASE + 0x35)||693|
DMAS1_CH4_CTL0_L|dg|#define DMAS1_CH4_CTL0_L((DMAS1_BASE + 0x34)||692|
DMAS1_CH4_CTL0|dg|#define DMAS1_CH4_CTL0((DMAS1_BASE + 0x34)||691|
DMAS1_CH4_CTL1_H|dg|#define DMAS1_CH4_CTL1_H((DMAS1_BASE + 0x37)||696|
DMAS1_CH4_CTL1_L|dg|#define DMAS1_CH4_CTL1_L((DMAS1_BASE + 0x36)||695|
DMAS1_CH4_CTL1|dg|#define DMAS1_CH4_CTL1((DMAS1_BASE + 0x36)||694|
DMAS1_CH4_DAR|dg|#define DMAS1_CH4_DAR((DMAS1_BASE + 0x32)||690|
DMAS1_CH4_SAR|dg|#define DMAS1_CH4_SAR((DMAS1_BASE + 0x30)||689|
DMAS1_CH5_CTL0_H|dg|#define DMAS1_CH5_CTL0_H((DMAS1_BASE + 0x3D)||702|
DMAS1_CH5_CTL0_L|dg|#define DMAS1_CH5_CTL0_L((DMAS1_BASE + 0x3C)||701|
DMAS1_CH5_CTL0|dg|#define DMAS1_CH5_CTL0((DMAS1_BASE + 0x3C)||700|
DMAS1_CH5_CTL1_H|dg|#define DMAS1_CH5_CTL1_H((DMAS1_BASE + 0x3F)||705|
DMAS1_CH5_CTL1_L|dg|#define DMAS1_CH5_CTL1_L((DMAS1_BASE + 0x3E)||704|
DMAS1_CH5_CTL1|dg|#define DMAS1_CH5_CTL1((DMAS1_BASE + 0x3E)||703|
DMAS1_CH5_DAR|dg|#define DMAS1_CH5_DAR((DMAS1_BASE + 0x3A)||699|
DMAS1_CH5_SAR|dg|#define DMAS1_CH5_SAR((DMAS1_BASE + 0x38)||698|
DMAS1_CH6_CTL0_H|dg|#define DMAS1_CH6_CTL0_H((DMAS1_BASE + 0x45)||711|
DMAS1_CH6_CTL0_L|dg|#define DMAS1_CH6_CTL0_L((DMAS1_BASE + 0x44)||710|
DMAS1_CH6_CTL0|dg|#define DMAS1_CH6_CTL0((DMAS1_BASE + 0x44)||709|
DMAS1_CH6_CTL1_H|dg|#define DMAS1_CH6_CTL1_H((DMAS1_BASE + 0x47)||714|
DMAS1_CH6_CTL1_L|dg|#define DMAS1_CH6_CTL1_L((DMAS1_BASE + 0x46)||713|
DMAS1_CH6_CTL1|dg|#define DMAS1_CH6_CTL1((DMAS1_BASE + 0x46)||712|
DMAS1_CH6_DAR|dg|#define DMAS1_CH6_DAR((DMAS1_BASE + 0x42)||708|
DMAS1_CH6_SAR|dg|#define DMAS1_CH6_SAR((DMAS1_BASE + 0x40)||707|
DMAS1_CH7_CTL0_H|dg|#define DMAS1_CH7_CTL0_H((DMAS1_BASE + 0x4D)||720|
DMAS1_CH7_CTL0_L|dg|#define DMAS1_CH7_CTL0_L((DMAS1_BASE + 0x4C)||719|
DMAS1_CH7_CTL0|dg|#define DMAS1_CH7_CTL0((DMAS1_BASE + 0x4C)||718|
DMAS1_CH7_CTL1_H|dg|#define DMAS1_CH7_CTL1_H((DMAS1_BASE + 0x4F)||723|
DMAS1_CH7_CTL1_L|dg|#define DMAS1_CH7_CTL1_L((DMAS1_BASE + 0x4E)||722|
DMAS1_CH7_CTL1|dg|#define DMAS1_CH7_CTL1((DMAS1_BASE + 0x4E)||721|
DMAS1_CH7_DAR|dg|#define DMAS1_CH7_DAR((DMAS1_BASE + 0x4A)||717|
DMAS1_CH7_SAR|dg|#define DMAS1_CH7_SAR((DMAS1_BASE + 0x48)||716|
DMAS1_CH8_CTL0_H|dg|#define DMAS1_CH8_CTL0_H((DMAS1_BASE + 0x55)||729|
DMAS1_CH8_CTL0_L|dg|#define DMAS1_CH8_CTL0_L((DMAS1_BASE + 0x54)||728|
DMAS1_CH8_CTL0|dg|#define DMAS1_CH8_CTL0((DMAS1_BASE + 0x54)||727|
DMAS1_CH8_CTL1_H|dg|#define DMAS1_CH8_CTL1_H((DMAS1_BASE + 0x57)||732|
DMAS1_CH8_CTL1_L|dg|#define DMAS1_CH8_CTL1_L((DMAS1_BASE + 0x56)||731|
DMAS1_CH8_CTL1|dg|#define DMAS1_CH8_CTL1((DMAS1_BASE + 0x56)||730|
DMAS1_CH8_DAR|dg|#define DMAS1_CH8_DAR((DMAS1_BASE + 0x52)||726|
DMAS1_CH8_SAR|dg|#define DMAS1_CH8_SAR((DMAS1_BASE + 0x50)||725|
DMAS1_CH9_CTL0_H|dg|#define DMAS1_CH9_CTL0_H((DMAS1_BASE + 0x5D)||738|
DMAS1_CH9_CTL0_L|dg|#define DMAS1_CH9_CTL0_L((DMAS1_BASE + 0x5C)||737|
DMAS1_CH9_CTL0|dg|#define DMAS1_CH9_CTL0((DMAS1_BASE + 0x5C)||736|
DMAS1_CH9_CTL1_H|dg|#define DMAS1_CH9_CTL1_H((DMAS1_BASE + 0x5F)||741|
DMAS1_CH9_CTL1_L|dg|#define DMAS1_CH9_CTL1_L((DMAS1_BASE + 0x5E)||740|
DMAS1_CH9_CTL1|dg|#define DMAS1_CH9_CTL1((DMAS1_BASE + 0x5E)||739|
DMAS1_CH9_DAR|dg|#define DMAS1_CH9_DAR((DMAS1_BASE + 0x5A)||735|
DMAS1_CH9_SAR|dg|#define DMAS1_CH9_SAR((DMAS1_BASE + 0x58)||734|
DMAS1_EN|dg|#define DMAS1_EN((DMAS1_BASE + 0x00)||798|
DMAS1_INT0|dg|#define DMAS1_INT0((DMAS1_BASE + 0x0A)||804|
DMAS1_INT1|dg|#define DMAS1_INT1((DMAS1_BASE + 0x0C)||805|
DMAS1_INT2|dg|#define DMAS1_INT2((DMAS1_BASE + 0x0E)||806|
DMAS1_INT_EN0|dg|#define DMAS1_INT_EN0((DMAS1_BASE + 0x04)||801|
DMAS1_INT_EN1|dg|#define DMAS1_INT_EN1((DMAS1_BASE + 0x06)||802|
DMAS1_INT_EN2|dg|#define DMAS1_INT_EN2((DMAS1_BASE + 0x08)||803|
DMAS1_INT_RAW|dg|#define DMAS1_INT_RAW((DMAS1_BASE + 0x02)||800|
DMAS_CTL0_BLK_SIZEBF|dg|#define DMAS_CTL0_BLK_SIZEBF||839|
DMAS_CTL0_BLK_STARTB|dg|#define DMAS_CTL0_BLK_STARTB||834|
DMAS_CTL0_MUL_BLKB|dg|#define DMAS_CTL0_MUL_BLKB||835|
DMAS_CTL0_MUL_BLK_SEL|dg|#define DMAS_CTL0_MUL_BLK_SEL||836|
DMAS_CTL0_SINGLE_BLK_SEL|dg|#define DMAS_CTL0_SINGLE_BLK_SEL||837|
DMAS_CTL1_AMODE_DECREASE|dg|#define DMAS_CTL1_AMODE_DECREASE||870|
DMAS_CTL1_AMODE_INCREASE|dg|#define DMAS_CTL1_AMODE_INCREASE||869|
DMAS_CTL1_AMODE_NOCHANGE|dg|#define DMAS_CTL1_AMODE_NOCHANGE||868|
DMAS_CTL1_BUS_SIZE_16BITS|dg|#define DMAS_CTL1_BUS_SIZE_16BITS||875|
DMAS_CTL1_BUS_SIZE_32BITS|dg|#define DMAS_CTL1_BUS_SIZE_32BITS||874|
DMAS_CTL1_BUS_SIZE_8BITS|dg|#define DMAS_CTL1_BUS_SIZE_8BITS||876|
DMAS_CTL1_DST_AMODEBF|dg|#define DMAS_CTL1_DST_AMODEBF||866|
DMAS_CTL1_DST_HANDBF|dg|#define DMAS_CTL1_DST_HANDBF||858|
DMAS_CTL1_DST_MODEB|dg|#define DMAS_CTL1_DST_MODEB||861|
DMAS_CTL1_DST_SIZEBF|dg|#define DMAS_CTL1_DST_SIZEBF||872|
DMAS_CTL1_PORBF|dg|#define DMAS_CTL1_PORBF||842|
DMAS_CTL1_POR_10|dg|#define DMAS_CTL1_POR_10||851|
DMAS_CTL1_POR_11|dg|#define DMAS_CTL1_POR_11||852|
DMAS_CTL1_POR_12|dg|#define DMAS_CTL1_POR_12||853|
DMAS_CTL1_POR_13|dg|#define DMAS_CTL1_POR_13||854|
DMAS_CTL1_POR_14|dg|#define DMAS_CTL1_POR_14||855|
DMAS_CTL1_POR_15|dg|#define DMAS_CTL1_POR_15||856|
DMAS_CTL1_POR_2|dg|#define DMAS_CTL1_POR_2||843|
DMAS_CTL1_POR_3|dg|#define DMAS_CTL1_POR_3||844|
DMAS_CTL1_POR_4|dg|#define DMAS_CTL1_POR_4||845|
DMAS_CTL1_POR_5|dg|#define DMAS_CTL1_POR_5||846|
DMAS_CTL1_POR_6|dg|#define DMAS_CTL1_POR_6||847|
DMAS_CTL1_POR_7|dg|#define DMAS_CTL1_POR_7||848|
DMAS_CTL1_POR_8|dg|#define DMAS_CTL1_POR_8||849|
DMAS_CTL1_POR_9|dg|#define DMAS_CTL1_POR_9||850|
DMAS_CTL1_SRC_AMODEBF|dg|#define DMAS_CTL1_SRC_AMODEBF||867|
DMAS_CTL1_SRC_HANDBF|dg|#define DMAS_CTL1_SRC_HANDBF||859|
DMAS_CTL1_SRC_MODEB|dg|#define DMAS_CTL1_SRC_MODEB||862|
DMAS_CTL1_SRC_SIZEBF|dg|#define DMAS_CTL1_SRC_SIZEBF||873|
DMAS_CTL1_TRANS_MODE_PERI|dg|#define DMAS_CTL1_TRANS_MODE_PERI||863|
DMAS_CTL1_TRANS_MODE_RAM|dg|#define DMAS_CTL1_TRANS_MODE_RAM||864|
DMAS_MAXCHANNEL|dg|#define DMAS_MAXCHANNEL||815|
DMA_DST|dg|#define DMA_DST||813|
DMA_SRC|dg|#define DMA_SRC||812|
GPIO0_BASE|dg|#define GPIO0_BASE||50|
GPIO1_BASE|dg|#define GPIO1_BASE||35|
GSCALE_BASE|dg|#define GSCALE_BASE||52|
GSMIF_BASE|dg|#define GSMIF_BASE||19|
GSMIF_EVENT0_ITEM0|dg|#define GSMIF_EVENT0_ITEM0((GSMIF_BASE + 0x80)||1089|
GSMIF_EVENT0_ITEM1|dg|#define GSMIF_EVENT0_ITEM1((GSMIF_BASE + 0x82)||1090|
GSMIF_EVENT0_ITEM2|dg|#define GSMIF_EVENT0_ITEM2((GSMIF_BASE + 0x84)||1091|
GSMIF_EVENT0_ITEM3|dg|#define GSMIF_EVENT0_ITEM3((GSMIF_BASE + 0x86)||1092|
GSMIF_EVENT0_ITEM4|dg|#define GSMIF_EVENT0_ITEM4((GSMIF_BASE + 0x88)||1093|
GSMIF_EVENT0_ITEM5|dg|#define GSMIF_EVENT0_ITEM5((GSMIF_BASE + 0x8A)||1094|
GSMIF_EVENT0_ITEM6|dg|#define GSMIF_EVENT0_ITEM6((GSMIF_BASE + 0x8C)||1095|
GSMIF_EVENT1_ITEM0|dg|#define GSMIF_EVENT1_ITEM0((GSMIF_BASE + 0xC0)||1096|
GSMIF_EVENT1_ITEM1|dg|#define GSMIF_EVENT1_ITEM1((GSMIF_BASE + 0xC2)||1097|
GSMIF_EVENT1_ITEM2|dg|#define GSMIF_EVENT1_ITEM2((GSMIF_BASE + 0xC4)||1098|
GSMIF_EVENT1_ITEM3|dg|#define GSMIF_EVENT1_ITEM3((GSMIF_BASE + 0xC6)||1099|
GSMIF_EVENT1_ITEM4|dg|#define GSMIF_EVENT1_ITEM4((GSMIF_BASE + 0xC8)||1100|
GSMIF_EVENT1_ITEM5|dg|#define GSMIF_EVENT1_ITEM5((GSMIF_BASE + 0xCA)||1101|
GSMIF_EVENT1_ITEM62|dg|#define GSMIF_EVENT1_ITEM62((GSMIF_BASE + 0xFC)||1103|
GSMIF_EVENT1_ITEM63|dg|#define GSMIF_EVENT1_ITEM63((GSMIF_BASE + 0xFE)||1104|
GSMIF_EVENT1_ITEM6|dg|#define GSMIF_EVENT1_ITEM6((GSMIF_BASE + 0xCC)||1102|
GSMIF_EVENT_CTRL_REG_EVT_ENB|dg|#define GSMIF_EVENT_CTRL_REG_EVT_ENB||1146|
GSMIF_EVENT_CTRL_REG_H|dg|#define GSMIF_EVENT_CTRL_REG_H((GSMIF_BASE + 0x11)||1075|
GSMIF_EVENT_CTRL_REG_L|dg|#define GSMIF_EVENT_CTRL_REG_L((GSMIF_BASE + 0x10)||1074|
GSMIF_EVENT_INT_INDEX|dg|#define GSMIF_EVENT_INT_INDEX((GSMIF_BASE + 0x14)||1077|
GSMIF_EVENT_RD|dg|#define GSMIF_EVENT_RD((GSMIF_BASE + 0x16)||1078|
GSMIF_EVENT_STATUS_REG_EVENT0_STATUSB|dg|#define GSMIF_EVENT_STATUS_REG_EVENT0_STATUSB||1150|
GSMIF_EVENT_STATUS_REG_EVENT1_STATUSB|dg|#define GSMIF_EVENT_STATUS_REG_EVENT1_STATUSB||1151|
GSMIF_EVENT_STATUS_REG_EVENT_STATUS_ACTIVE|dg|#define GSMIF_EVENT_STATUS_REG_EVENT_STATUS_ACTIVE||1152|
GSMIF_EVENT_STATUS_REG_EVENT_STATUS_UPDATE|dg|#define GSMIF_EVENT_STATUS_REG_EVENT_STATUS_UPDATE||1153|
GSMIF_EVENT_STATUS_REG_EVT_RDB|dg|#define GSMIF_EVENT_STATUS_REG_EVT_RDB||1149|
GSMIF_EVENT_STATUS_REG_INDEXBF|dg|#define GSMIF_EVENT_STATUS_REG_INDEXBF||1155|
GSMIF_EVENT_STATUS_REG|dg|#define GSMIF_EVENT_STATUS_REG((GSMIF_BASE + 0x12)||1076|
GSMIF_EVT_CFGE_INT|dg|#define GSMIF_EVT_CFGE_INT||1120|
GSMIF_EVT_EXE_INT|dg|#define GSMIF_EVT_EXE_INT||1122|
GSMIF_EVT_SW_INT|dg|#define GSMIF_EVT_SW_INT||1121|