📄 conf_tny.lst
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197
198 ?RTX?TASKENT?S SEGMENT CODE
---- 199 RSEG ?RTX?TASKENT?S
0000 200 ?RTX_TASKENTRY: DS 2
201
202 ;------------------------------------------------
203 ; Table of Stack Pointers for each task
204 ;------------------------------------------------
205 PUBLIC ?RTX_TASKSP
206
207 ?RTX?TASKSP?S SEGMENT IDATA
---- 208 RSEG ?RTX?TASKSP?S
0000 209 ?RTX_TASKSP: DS 1
210
211 ;------------------------------------------------
212 ; Table of Task Timer/State Pointers
213 ;------------------------------------------------
214 PUBLIC ?RTX_TASKSTATUS
215
216 ?RTX?TASKSTATE?S SEGMENT IDATA
---- 217 RSEG ?RTX?TASKSTATE?S
0000 218 ?RTX_TASKSTATUS:
0000 219 TimerVal: DS 1 ; Task Timer (Software Timer for each task)
0001 220 TaskState: DS 1 ; Task Status (state of each Task)
221
222 ; Definitions for Bits in Task State
223 ; TaskState.0 = Wait for Signal
224 ; TaskState.1 = Wait for TimeOut
225 ; TaskState.2 = Signal Flag
226 ; TaskState.3 = TimeOut Flag
227 ; TaskState.4 = Task Ready (Wait for Running)
228 ; TaskState.5 = Task Active (enabled with os_create)
229 ; TaskState.6 = Round Robin Time Out
230 ; TaskState.7 = Run Flag
231
232 ; byte mask definitions
0001 233 K_SIG EQU 1
0002 234 K_TMO EQU 2
0004 235 SIG_EVENT EQU 4
0008 236 TMO_EVENT EQU 8
0010 237 K_READY EQU 16
0020 238 K_ACTIVE EQU 32
0040 239 K_ROBIN EQU 64
0080 240 K_IVL EQU 128 ; not a task state bit; only used in os_wait
0080 241 RDY_EVENT EQU 128 ; READY status flag
0080 242 K_RDY EQU 128 ; READY status flag
243
244 ; bit position definitions
0000 245 B_WAITSIG EQU 0
0001 246 B_WAITTIM EQU 1
0002 247 B_SIGNAL EQU 2
0003 248 B_TIMEOUT EQU 3
0004 249 B_READY EQU 4
0005 250 B_ACTIVE EQU 5
0006 251 B_ROBIN EQU 6
0007 252 B_IVL EQU 7 ; not a task state bit; only used in os_wait
0007 253 B_RDY EQU 7
254
255
256 IF (TIMESHARING OR CPU_IDLE_CODE)
A51 MACRO ASSEMBLER CONF_TNY 07/24/2006 09:15:26 PAGE 5
257 ?RTX?BITS SEGMENT BIT
---- 258 RSEG ?RTX?BITS
259 ENDIF
260
261 IF (TIMESHARING)
?RTX_TS_DELAY: DBIT 1 ; Status bit set when task switch in progress
ENDIF
264
265 IF (CPU_IDLE_CODE)
0000 266 ?RTX_ISR_SIG: DBIT 1 ; Status bit set when interrupt or os_set_signal
267 ENDIF
268
269
---- 270 CSEG AT 0BH
000B 020000 F 271 JMP TIMERINT
272
273 ?RTX?CODE SEGMENT CODE
---- 274 RSEG ?RTX?CODE
275 USING 0 ; Registerbank 0 for following code
276
277 IF (FREE_STACK <> 0)
0000 278 ?RTX_STACKERROR:
279 STACK_ERROR ; User defined Stack Error Code
282 ENDIF
283
0004 284 HW_TIMER: HW_TIMER_CODE
287
0005 288 TIMERINT:
289
290 IF (LONG_USR_INTR)
PUSH ACC
MOV A,PSW
ANL A,#018H
XRL A,#?RTX_REGISTERBANK
JNZ CONT_TIMINT
; avoid recursive timer interrupt
POP ACC
RETI ; Return from Recursive Timer Interrupt
CONT_TIMINT: POP ACC
ENDIF
302
0005 120000 F 303 CALL HW_TIMER ; Enable Interrupts again.
304
0008 85D00B 305 MOV ?RTX_SAVEPSW,PSW
000B 75D008 306 MOV PSW,#?RTX_REGISTERBANK
000E FA 307 MOV saveacc,A
308 ; Update 8051 Interrupt Timer
000F C28C 309 CLR TR0
0011 E58A 310 MOV A,TL0
0013 24F7 311 ADD A,#LOW (?RTX_CLOCK + 7)
0015 F58A 312 MOV TL0,A
0017 E58C 313 MOV A,TH0
0019 34D8 314 ADDC A,#HIGH (?RTX_CLOCK + 7)
001B F58C 315 MOV TH0,A
001D D28C 316 SETB TR0
317
318 IF (FREE_STACK <> 0)
319 ; Check if enough free stack is available
001F EC 320 MOV A,currenttask
0020 2400 F 321 ADD A,#?RTX?TASKSP?S+1
0022 F8 322 MOV R0,A
0023 E6 323 MOV A,@R0
0024 BC0002 F 324 CJNE currenttask,#?RTX_MAXTASKN,checkstack
0027 74FF 325 MOV A,#RAMTOP
0029 C3 326 checkstack: CLR C
A51 MACRO ASSEMBLER CONF_TNY 07/24/2006 09:15:26 PAGE 6
002A 9581 327 SUBB A,SP
002C B41400 328 CJNE A,#FREE_STACK,$+3
002F 40CF 329 JC ?RTX_STACKERROR
330 ENDIF
331
332 ; Update & Check Task Timers
0031 7900 F 333 MOV R1,#?RTX_MAXTASKN+1
0033 7800 F 334 MOV R0,#?RTX?TASKSTATE?S
0035 16 335 TIMERLOOP: DEC @R0 ; Decrement timer
0036 E6 336 MOV A,@R0
0037 08 337 INC R0 ; advance to TaskState
0038 700B 338 JNZ NoTimeout
003A C2AF 339 CLR EA
003C E6 340 MOV A,@R0
003D 30E103 341 JNB ACC.B_WAITTIM,NoWaitTimeout
0040 4418 342 ORL A,#(K_READY+TMO_EVENT)
0042 F6 343 MOV @R0,A
0043 D2AF 344 NoWaitTimeout: SETB EA
0045 08 345 NoTimeout: INC R0 ; advance to TaskTimer
0046 D9ED 346 DJNZ R1,TIMERLOOP
347
0048 EA 348 MOV A,saveacc
0049 8BD0 349 MOV PSW,savepsw
350 USING 0 ; Registerbank 0 for following code
351
352 IF (TIMESHARING == 0)
353 ; Round Robin Task Switching not required. System Interrupt ends here
004B 354 ?RTX?SET_ISR:
355 IF (CPU_IDLE_CODE)
004B D200 F 356 SETB ?RTX_ISR_SIG
357 ENDIF
004D 22 358 RET
359 ENDIF
360
361 IF (TIMESHARING)
; Round Robin Task Switching required. Check if task generates timeout
; Check for Round Robin Timeout on the current task
JNB ?RTX_TS_DELAY,CheckRobinTime
NoRobinTimeout:
?RTX?SET_ISR:
IF (CPU_IDLE_CODE)
SETB ?RTX_ISR_SIG
ENDIF
RET
CheckRobinTime: DJNZ ?RTX_ROBINTIME,NoRobinTimeout
?RTX_TASKSWITCHING:
PUSH ACC
PUSH PSW
PUSH B
PUSH DPH
PUSH DPL
PUSH AR0
PUSH AR1
PUSH AR2
PUSH AR3
PUSH AR4
PUSH AR5
PUSH AR6
PUSH AR7
IF (CODE_BANKING <> 0)
PUSH ?B_CURRENTBANK
ENDIF
MOV A,?RTX_CURRENTTASK
RL A
A51 MACRO ASSEMBLER CONF_TNY 07/24/2006 09:15:26 PAGE 7
ADD A,#?RTX?TASKSTATE?S+1
MOV R0,A
MOV A,#K_ROBIN
CLR EA
ORL A,@R0
MOV @R0,A
SETB EA
IF (CODE_BANKING <> 0)
SJMP os_switch_task1
ENDIF
ENDIF
404
405 ;------------------------------------------------
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