test_counter.n

ze5开发板学习实验程序

// Netlist written August 18, 2004 1:25:30 AM CST
// By FastChip Version 3.0_Beta Build 040202-1214
// Netlist last modified August 18, 2004 1:25:30 AM CST
netlist
module TEST_COUNTER {
    net _Q [12:11];
    net _READ;
    input CLK;
    output CLkout;
    input CLR;
    input En_in_clr;
    output En_port;
    input IN_over;
    output int;
    net N02496;
    net N02513;
    net N02523;
    net N02537;
    net N02544;
    net N02554;
    net N02569;
    net N02572;
    net N02578;
    net N02581;
    net N02587;
    net N02590;
    net N02596;
    net N02615;
    net N02764;
    net N02910;
    net N02963;
    net N03451;
    net N03625;
    net N056650;
    net N056651;
    net N10012;
    net N10451;
    net N10718;
    net N12321;
    net N12342;
    net N13767;
    net N13770;
    net N15340;
    net N15346;
    net N15349;
    net N15352;
    net N15358;
    net N15361;
    net N15370;
    net N15470;
    net N16499;
    net N16600;
    net N16901;
    net N18410;
    net N18436;
    net N18445;
    net N20030;
    net N22074;
    net N22430;
    net N24589;
    net N24922;
    net N24925;
    net N249321;
    net N24953;
    net N25053;
    net N25063;
    output out;
    net Q1;
    net Q11;
    net Q2;
    net Q3;
    net Q4;
    net Q5;
    net Q6;
    net READ;
    input S_data;
    output synch;
    net WR_CH;
    and2 AND2_1 (.i0=N13767, .i1=N02615, .o=out);
    and2 AND2_2 (.i0=_Q[11], .i1=N02590, .o=N056650);
    and2 AND2_3 (.i0=N12342, .i1=_Q[12], .o=READ);
    and2 AND2_4 (.i0=N16901, .i1=_Q[12], .o=En_port);
    and2 AND2_5 (.i0=CLK, .i1=_Q[12], .o=N02910);
    and2 AND2_6 (.i0=N249321, .i1=En_in_clr, .o=N24953);
    and2 AND2_7 (.i0=N24925, .i1=_Q[11], .o=N25063);
    and2 AND2_9 (.i0=N03451, .i1=N10718, .o=N16499);
    and3 AND3_1 (.i0=CLkout, .i1=Q11, .i2=_READ, .o=N15470);
    and3 AND3_2 (.i0=N24589, .i1=N056651, .i2=N10451, .o=N18445);
    and3 AND3_3 (.i0=N02615, .i1=En_in_clr, .i2=N22430, .o=WR_CH);
    and5 AND5_1 (.i0=Q11, .i1=N02554, .i2=N02544, .i3=N02537, .i4=N02523, .o=N10012);
    and9 AND9_1 (.i0=N02554, .i1=N02544, .i2=Q4, .i3=Q3, .i4=Q2, .i5=vcc, .i6=Q11, .i7=vcc, .i8=vcc, .o=N03625);
    and9 AND9_2 (.i0=Q6, .i1=Q5, .i2=Q4, .i3=Q3, .i4=vcc, .i5=vcc, .i6=READ, .i7=Q11, .i8=vcc, .o=N18410);
    dff DFF_1 (.ck=N02910, .d=N02496, .en=vcc, .q=Q1, .reset=N02764, :initv="0");
    dff DFF_10 (.ck=N02581, .d=N02590, .en=vcc, .q=N02596, .reset=N02764, :initv="0");
    dff DFF_11 (.ck=N02590, .d=_Q[11], .en=vcc, .q=Q11, .reset=N02764, :initv="0");
    dff DFF_12 (.ck=_Q[11], .d=_Q[12], .en=vcc, .q=N02615, .reset=N02764, :initv="0");
    dff DFF_13 (.ck=WR_CH, .d=N12342, .en=vcc, .q=N12321, .reset=CLR, :initv="0");
    dff DFF_14 (.ck=N20030, .d=N13770, .en=vcc, .q=N13767, .reset=N02764, :initv="0");
    dff DFF_15 (.ck=N15470, .d=N15340, .en=vcc, .q=N15346, .reset=CLR, :initv="0");
    dff DFF_16 (.ck=N15340, .d=N15349, .en=vcc, .q=N15352, .reset=CLR, :initv="0");
    dff DFF_17 (.ck=N15349, .d=N15358, .en=vcc, .q=N15361, .reset=CLR, :initv="0");
    dff DFF_18 (.ck=N15358, .d=int, .en=vcc, .q=N15370, .reset=CLR, :initv="0");
    dff DFF_19 (.ck=CLK, .d=N16499, .en=vcc, .q=CLkout, .reset=gnd, :initv="0");
    dff DFF_2 (.ck=N02496, .d=N02513, .en=vcc, .q=Q2, .reset=N02764, :initv="0");
    dff DFF_20 (.ck=CLK, .d=N16600, .en=vcc, .q=N16901, .reset=gnd, :initv="0");
    dff DFF_21 (.ck=CLK, .d=N18410, .en=vcc, .q=N18436, .reset=gnd, :initv="0");
    dff DFF_22 (.ck=CLK, .d=N18445, .en=vcc, .q=N25053, .reset=gnd, :initv="0");
    dff DFF_23 (.ck=int, .d=N22430, .en=vcc, .q=N22074, .reset=CLR, :initv="0");
    dff DFF_24 (.ck=N24953, .d=N24922, .en=vcc, .q=N24925, .reset=CLR, :initv="0");
    dff DFF_3 (.ck=N02513, .d=N02523, .en=vcc, .q=Q3, .reset=N02764, :initv="0");
    dff DFF_4 (.ck=N02523, .d=N02537, .en=vcc, .q=Q4, .reset=N02764, :initv="0");
    dff DFF_5 (.ck=N02537, .d=N02544, .en=vcc, .q=Q5, .reset=N02764, :initv="0");
    dff DFF_6 (.ck=N02544, .d=N02554, .en=vcc, .q=Q6, .reset=N02764, :initv="0");
    dff DFF_7 (.ck=N02554, .d=N02963, .en=vcc, .q=N02569, .reset=N02764, :initv="0");
    dff DFF_8 (.ck=N02963, .d=N02572, .en=vcc, .q=N02578, .reset=N02764, :initv="0");
    dff DFF_9 (.ck=N02572, .d=N02581, .en=vcc, .q=N02587, .reset=N02764, :initv="0");
    inv INV_1 (.i=Q1, .o=N02496);
    inv INV_10 (.i=N02596, .o=N02590);
    inv INV_11 (.i=Q11, .o=_Q[11]);
    inv INV_12 (.i=N02615, .o=_Q[12]);
    inv INV_13 (.i=N10012, .o=N10451);
    inv INV_14 (.i=N056650, .o=N056651);
    inv INV_15 (.i=READ, .o=_READ);
    inv INV_16 (.i=N12321, .o=N12342);
    inv INV_17 (.i=N13767, .o=N13770);
    inv INV_18 (.i=_Q[12], .o=N249321);
    inv INV_19 (.i=N15346, .o=N15340);
    inv INV_2 (.i=Q2, .o=N02513);
    inv INV_20 (.i=N15352, .o=N15349);
    inv INV_21 (.i=N15361, .o=N15358);
    inv INV_22 (.i=N15370, .o=int);
    inv INV_23 (.i=N22074, .o=N22430);
    inv INV_24 (.i=N24925, .o=N24922);
    inv INV_3 (.i=Q3, .o=N02523);
    inv INV_4 (.i=Q4, .o=N02537);
    inv INV_5 (.i=Q5, .o=N02544);
    inv INV_6 (.i=Q6, .o=N02554);
    inv INV_7 (.i=N02569, .o=N02963);
    inv INV_8 (.i=N02578, .o=N02572);
    inv INV_9 (.i=N02587, .o=N02581);
    or2 OR2_1 (.i0=N03625, .i1=READ, .o=N03451);
    or2 OR2_2 (.i0=_READ, .i1=N10012, .o=N10718);
    or2 OR2_3 (.i0=WR_CH, .i1=CLR, .o=N02764);
    or2 OR2_5 (.i0=_Q[12], .i1=IN_over, .o=N20030);
    or2 OR2_6 (.i0=S_data, .i1=_Q[11], .o=N24589);
    or3 OR3_1 (.i0=_Q[11], .i1=N10012, .i2=READ, .o=N16600);
    or3 OR3_2 (.i0=N25063, .i1=N25053, .i2=N18436, .o=synch);
}