top.vif

这是用pci-wishbone核和16450串口核在xilinx的fpga上实现的串口程序

vif_set_merge -original bridge/pci_io_mux/ad_iob13/dat_out_Z bridge/output_backup/ad_out_Z[13]
vif_set_merge -original bridge/pci_io_mux/ad_iob14/dat_out_Z bridge/output_backup/ad_out_Z[14]
vif_set_merge -original bridge/pci_io_mux/ad_iob15/dat_out_Z bridge/output_backup/ad_out_Z[15]
vif_set_merge -original bridge/pci_io_mux/ad_iob16/dat_out_Z bridge/output_backup/ad_out_Z[16]
vif_set_merge -original bridge/pci_io_mux/ad_iob17/dat_out_Z bridge/output_backup/ad_out_Z[17]
vif_set_merge -original bridge/pci_io_mux/ad_iob18/dat_out_Z bridge/output_backup/ad_out_Z[18]
vif_set_merge -original bridge/pci_io_mux/ad_iob19/dat_out_Z bridge/output_backup/ad_out_Z[19]
vif_set_merge -original bridge/pci_io_mux/ad_iob20/dat_out_Z bridge/output_backup/ad_out_Z[20]
vif_set_merge -original bridge/pci_io_mux/ad_iob21/dat_out_Z bridge/output_backup/ad_out_Z[21]
vif_set_merge -original bridge/pci_io_mux/ad_iob22/dat_out_Z bridge/output_backup/ad_out_Z[22]
vif_set_merge -original bridge/pci_io_mux/ad_iob23/dat_out_Z bridge/output_backup/ad_out_Z[23]
vif_set_merge -original bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob0/en_out_Z
vif_set_merge -original bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob7/en_out_Z
vif_set_merge -original bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob6/en_out_Z
vif_set_merge -original bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob5/en_out_Z
vif_set_merge -original bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob4/en_out_Z
vif_set_merge -original bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob3/en_out_Z
vif_set_merge -original bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob2/en_out_Z
vif_set_merge -original bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob1/en_out_Z
vif_set_merge -original bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob8/en_out_Z
vif_set_merge -original bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob15/en_out_Z
vif_set_merge -original bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob14/en_out_Z
vif_set_merge -original bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob13/en_out_Z
vif_set_merge -original bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob12/en_out_Z
vif_set_merge -original bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob11/en_out_Z
vif_set_merge -original bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob10/en_out_Z
vif_set_merge -original bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob9/en_out_Z
vif_set_merge -original bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob16/en_out_Z
vif_set_merge -original bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob23/en_out_Z
vif_set_merge -original bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob22/en_out_Z
vif_set_merge -original bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob21/en_out_Z
vif_set_merge -original bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob20/en_out_Z
vif_set_merge -original bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob19/en_out_Z
vif_set_merge -original bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob18/en_out_Z
vif_set_merge -original bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob17/en_out_Z
vif_set_merge -original bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob31/en_out_Z
vif_set_merge -original bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob30/en_out_Z
vif_set_merge -original bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob29/en_out_Z
vif_set_merge -original bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob28/en_out_Z
vif_set_merge -original bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob27/en_out_Z
vif_set_merge -original bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob26/en_out_Z
vif_set_merge -original bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob25/en_out_Z
vif_set_merge -original bridge/pci_io_mux/ad_iob24/dat_out_Z bridge/output_backup/ad_out_Z[24]
vif_set_merge -original bridge/pci_io_mux/ad_iob25/dat_out_Z bridge/output_backup/ad_out_Z[25]
vif_set_merge -original bridge/pci_io_mux/ad_iob26/dat_out_Z bridge/output_backup/ad_out_Z[26]
vif_set_merge -original bridge/pci_io_mux/ad_iob27/dat_out_Z bridge/output_backup/ad_out_Z[27]
vif_set_merge -original bridge/pci_io_mux/ad_iob28/dat_out_Z bridge/output_backup/ad_out_Z[28]
vif_set_merge -original bridge/pci_io_mux/ad_iob29/dat_out_Z bridge/output_backup/ad_out_Z[29]
vif_set_merge -original bridge/pci_io_mux/ad_iob30/dat_out_Z bridge/output_backup/ad_out_Z[30]
vif_set_merge -original bridge/pci_io_mux/ad_iob31/dat_out_Z bridge/output_backup/ad_out_Z[31]
vif_set_merge -original bridge/pci_io_mux/cbe_iob0/en_out_Z bridge/pci_io_mux/cbe_iob3/en_out_Z
vif_set_merge -original bridge/pci_io_mux/cbe_iob0/en_out_Z bridge/pci_io_mux/cbe_iob2/en_out_Z
vif_set_merge -original bridge/pci_io_mux/cbe_iob0/en_out_Z bridge/pci_io_mux/cbe_iob1/en_out_Z
vif_set_merge -original bridge/pci_io_mux/devsel_iob/en_out_Z bridge/pci_io_mux/trdy_iob/en_out_Z
vif_set_merge -original bridge/pci_io_mux/devsel_iob/en_out_Z bridge/pci_io_mux/stop_iob/en_out_Z
vif_set_merge -original bridge/parity_checker/frame_dec2_Z bridge/pci_target_unit/pci_target_sm/previous_frame_Z

# Technology sequential redundancies
vif_set_equiv -translated bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob24/en_out_rep30_Z
vif_set_equiv -translated bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob24/en_out_rep29_Z
vif_set_equiv -translated bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob24/en_out_rep28_Z
vif_set_equiv -translated bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob24/en_out_rep27_Z
vif_set_equiv -translated bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob24/en_out_rep26_Z
vif_set_equiv -translated bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob24/en_out_rep25_Z
vif_set_equiv -translated bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob24/en_out_rep24_Z
vif_set_equiv -translated bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob24/en_out_rep23_Z
vif_set_equiv -translated bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob24/en_out_rep22_Z
vif_set_equiv -translated bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob24/en_out_rep21_Z
vif_set_equiv -translated bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob24/en_out_rep20_Z
vif_set_equiv -translated bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob24/en_out_rep19_Z
vif_set_equiv -translated bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob24/en_out_rep18_Z
vif_set_equiv -translated bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob24/en_out_rep17_Z
vif_set_equiv -translated bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob24/en_out_rep16_Z
vif_set_equiv -translated bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob24/en_out_rep15_Z
vif_set_equiv -translated bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob24/en_out_rep14_Z
vif_set_equiv -translated bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob24/en_out_rep13_Z
vif_set_equiv -translated bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob24/en_out_rep12_Z
vif_set_equiv -translated bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob24/en_out_rep11_Z
vif_set_equiv -translated bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob24/en_out_rep10_Z
vif_set_equiv -translated bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob24/en_out_rep9_Z
vif_set_equiv -translated bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob24/en_out_rep8_Z
vif_set_equiv -translated bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob24/en_out_rep7_Z
vif_set_equiv -translated bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob24/en_out_rep6_Z
vif_set_equiv -translated bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob24/en_out_rep5_Z
vif_set_equiv -translated bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob24/en_out_rep4_Z
vif_set_equiv -translated bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob24/en_out_rep3_Z
vif_set_equiv -translated bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob24/en_out_rep2_Z
vif_set_equiv -translated bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob24/en_out_rep1_Z
vif_set_equiv -translated bridge/pci_io_mux/ad_iob24/en_out_Z bridge/pci_io_mux/ad_iob24/en_out_rep0_Z
vif_set_equiv -translated bridge/pci_io_mux/cbe_iob0/en_out_Z bridge/pci_io_mux/cbe_iob0/en_out_rep2_Z
vif_set_equiv -translated bridge/pci_io_mux/cbe_iob0/en_out_Z bridge/pci_io_mux/cbe_iob0/en_out_rep1_Z
vif_set_equiv -translated bridge/pci_io_mux/cbe_iob0/en_out_Z bridge/pci_io_mux/cbe_iob0/en_out_rep0_Z
vif_set_equiv -translated bridge/pci_io_mux/devsel_iob/en_out_Z bridge/pci_io_mux/devsel_iob/en_out_rep1_Z
vif_set_equiv -translated bridge/pci_io_mux/devsel_iob/en_out_Z bridge/pci_io_mux/devsel_iob/en_out_rep0_Z
vif_set_equiv -translated uWB_Slave/dma_start_o_Z uWB_Slave/dma_start_o_1_Z
vif_set_equiv -translated wb_master_inst/wbm_we_o_Z wb_master_inst/wbm_we_o_rep15_Z
vif_set_equiv -translated wb_master_inst/wbm_we_o_Z wb_master_inst/wbm_we_o_rep14_Z
vif_set_equiv -translated wb_master_inst/wbm_we_o_Z wb_master_inst/wbm_we_o_rep13_Z
vif_set_equiv -translated wb_master_inst/wbm_we_o_Z wb_master_inst/wbm_we_o_rep12_Z
vif_set_equiv -translated wb_master_inst/wbm_we_o_Z wb_master_inst/wbm_we_o_rep11_Z
vif_set_equiv -translated wb_master_inst/wbm_we_o_Z wb_master_inst/wbm_we_o_rep10_Z
vif_set_equiv -translated wb_master_inst/wbm_we_o_Z wb_master_inst/wbm_we_o_rep9_Z
vif_set_equiv -translated wb_master_inst/wbm_we_o_Z wb_master_inst/wbm_we_o_rep8_Z
vif_set_equiv -translated wb_master_inst/wbm_we_o_Z wb_master_inst/wbm_we_o_rep7_Z
vif_set_equiv -translated wb_master_inst/wbm_we_o_Z wb_master_inst/wbm_we_o_rep6_Z
vif_set_equiv -translated wb_master_inst/wbm_we_o_Z wb_master_inst/wbm_we_o_rep5_Z
vif_set_equiv -translated wb_master_inst/wbm_we_o_Z wb_master_inst/wbm_we_o_rep4_Z
vif_set_equiv -translated wb_master_inst/wbm_we_o_Z wb_master_inst/wbm_we_o_rep3_Z
vif_set_equiv -translated wb_master_inst/wbm_we_o_Z wb_master_inst/wbm_we_o_rep2_Z
vif_set_equiv -translated wb_master_inst/wbm_we_o_Z wb_master_inst/wbm_we_o_rep1_Z
vif_set_equiv -translated wb_master_inst/wbm_we_o_Z wb_master_inst/wbm_we_o_rep0_Z
vif_set_equiv -inverted -translated wb_master_inst/wbm_we_o_Z wb_master_inst/wbm_we_o_rep16_i_Z

# Inverted map points

# Port directions
vif_set_port_dir -original IN TOP RST
vif_set_port_dir -original OUT TOP INTA

# Black box mapping


# Register pruning
vif_set_constant -original 0 bridge.pci_resets_and_interrupts.inta.dat_out
vif_set_constant -original 0 bridge.wishbone_slave_unit.wishbone_slave.wb_conf_hit
vif_set_constant -original 0 bridge.wishbone_slave_unit.wishbone_slave.img_hit[1]
vif_set_constant -original 0 bridge.wishbone_slave_unit.wishbone_slave.img_hit[2]
vif_set_constant -original 0 bridge.wishbone_slave_unit.wishbone_slave.img_hit[3]
vif_set_constant -original 0 bridge.wishbone_slave_unit.wishbone_slave.img_hit[4]
vif_set_constant -original 0 bridge.wishbone_slave_unit.wishbone_slave.c_state[5]
vif_set_constant -original 0 bridge.wishbone_slave_unit.wishbone_slave.c_state[4]
vif_set_constant -original 0 bridge.wishbone_slave_unit.wishbone_slave.d_incoming[0]
vif_set_constant -original 0 bridge.wishbone_slave_unit.wishbone_slave.d_incoming[1]
vif_set_constant -original 0 bridge.wishbone_slave_unit.wishbone_slave.d_incoming[2]
vif_set_constant -original 0 bridge.wishbone_slave_unit.wishbone_slave.d_incoming[3]
vif_set_constant -original 0 bridge.wishbone_slave_unit.wishbone_slave.d_incoming[4]
vif_set_constant -original 0 bridge.wishbone_slave_unit.wishbone_slave.d_incoming[5]
vif_set_constant -original 0 bridge.wishbone_slave_unit.wishbone_slave.d_incoming[6]
vif_set_constant -original 0 bridge.wishbone_slave_unit.wishbone_slave.d_incoming[7]
vif_set_constant -original 0 bridge.wishbone_slave_unit.wishbone_slave.d_incoming[8]
vif_set_constant -original 0 bridge.wishbone_slave_unit.wishbone_slave.d_incoming[9]
vif_set_constant -original 0 bridge.wishbone_slave_unit.wishbone_slave.d_incoming[10]
vif_set_constant -original 0 bridge.wishbone_slave_unit.wishbone_slave.d_incoming[11]
vif_set_constant -original 0 bridge.wishbone_slave_unit.wishbone_slave.d_incoming[12]
vif_set_constant -original 0 bridge.wishbone_slave_unit.wishbone_slave.d_incoming[13]
vif_set_constant -original 0 bridge.wishbone_slave_unit.wishbone_slave.d_incoming[14]
vif_set_constant -original 0 bridge.wishbone_slave_unit.wishbone_slave.d_incoming[15]
vif_set_constant -original -1 bridge.wishbone_slave_unit.del_sync.status_out
vif_set_constant -original 0 bridge.wishbone_slave_unit.del_sync.bc_out[0]
vif_set_constant -original 0 bridge.wishbone_slave_unit.del_sync.addr_out[0]
vif_set_constant -original 0 bridge.wishbone_slave_unit.del_sync.addr_out[1]
vif_set_constant -original -1 bridge.pci_target_unit.wishbone_master.first_wb_data_access
vif_set_constant -original -1 bridge.pci_target_unit.wishbone_master.wb_cti_o[2]
vif_set_constant -original -1 bridge.pci_target_unit.wishbone_master.wb_cti_o[0]
vif_set_constant -original 1 bridge.pci_target_unit.wishbone_master.wb_cti_o[1]
vif_set_constant -original 0 bridge.pci_target_unit.wishbone_master.c_state[4]
vif_set_constant -original 0 bridge.pci_target_unit.del_sync.we_out
vif_set_constant -original 0 bridge.pci_target_unit.del_sync.status_out
vif_set_constant -original 0 bridge.configuration.pci_err_cs_bit9
vif_set_constant -original -1 bridge.output_backup.irdy_out
vif_set_constant -original -1 bridge.output_backup.perr_en_out
vif_set_constant -original -1 bridge.output_backup.par_out
vif_set_constant -original -1 bridge.input_register.pci_gnt_reg_out
vif_set_constant -original 0 wb_master_inst.dma_length_sync1[16]
vif_set_constant -original 0 wb_master_inst.dma_length[16]
vif_set_constant -original -1 wb_master_inst.reg_wbm_dat_o_l[0]
vif_set_constant -original -1 wb_master_inst.reg_wbm_dat_o_l[1]
vif_set_constant -original -1 wb_master_inst.reg_wbm_dat_o_l[2]
vif_set_constant -original -1 wb_master_inst.reg_wbm_dat_o_l[3]
vif_set_constant -original -1 wb_master_inst.reg_wbm_dat_o_l[4]
vif_set_constant -original -1 wb_master_inst.reg_wbm_dat_o_l[5]
vif_set_constant -original -1 wb_master_inst.reg_wbm_dat_o_l[6]
vif_set_constant -original -1 wb_master_inst.reg_wbm_dat_o_l[7]
vif_set_constant -original -1 wb_master_inst.reg_wbm_dat_o_l[8]
vif_set_constant -original -1 wb_master_inst.reg_wbm_dat_o_l[9]
vif_set_constant -original -1 wb_master_inst.reg_wbm_dat_o_l[10]
vif_set_constant -original -1 wb_master_inst.reg_wbm_dat_o_l[11]
vif_set_constant -original -1 wb_master_inst.reg_wbm_dat_o_l[12]
vif_set_constant -original -1 wb_master_inst.reg_wbm_dat_o_l[13]
vif_set_constant -original -1 wb_master_inst.reg_wbm_dat_o_l[14]
vif_set_constant -original -1 wb_master_inst.reg_wbm_dat_o_l[15]