wbs_uart.plg

来自「这是用pci-wishbone核和16450串口核在xilinx的fpga上实现」· PLG 代码 · 共 13 行

@P:  Worst Slack : 985.564
@P:  wbs_uart|wb_clk_i - Estimated Frequency : 69.3 MHz
@P:  wbs_uart|wb_clk_i - Requested Frequency : 1.0 MHz
@P:  wbs_uart|wb_clk_i - Estimated Period : 14.436
@P:  wbs_uart|wb_clk_i - Requested Period : 1000.000
@P:  wbs_uart|wb_clk_i - Slack : 985.564
@P: wbs_uart Part : xc2s200pq208-6
@P: wbs_uart I/O primitives : 80
@P: wbs_uart I/O Register bits : 74
@P: wbs_uart Register bits (Non I/O) : 278 (5%)
@P: wbs_uart Dual Port Rams (RAM16X1D) : 16
@P: wbs_uart Total Luts : 637 (13%)