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📄 cpu.c

📁 基于MC9S12C64的CAN总线通讯源程序
💻 C
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/** ###################################################################
**     THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
**     Filename  : Cpu.C
**     Project   : NODE_A
**     Processor : MC9S12C64CFA16
**     Beantype  : MC9S12C32_48
**     Version   : Bean 01.020, Driver 01.20, CPU db: 2.87.339
**     Datasheet : 9S12C-FamilyDGV1/D V01.00
**     Compiler  : Metrowerks HC12 C Compiler
**     Date/Time : 2006-11-11, 14:37
**     Abstract  :
**         This bean "MC9S12C32_48" implements properties, methods,
**         and events of the CPU.
**     Settings  :
**
**     Contents  :
**         EnableInt   - void Cpu_EnableInt(void);
**         DisableInt  - void Cpu_DisableInt(void);
**         SetWaitMode - void Cpu_SetWaitMode(void);
**         SetStopMode - void Cpu_SetStopMode(void);
**
**     (c) Copyright UNIS, spol. s r.o. 1997-2005
**     UNIS, spol. s r.o.
**     Jundrovska 33
**     624 00 Brno
**     Czech Republic
**     http      : www.processorexpert.com
**     mail      : info@processorexpert.com
** ###################################################################*/

/* MODULE Cpu. */

#include "TI1.h"
#include "AS1.h"
#include "PWM6.h"
#include "CAN1.h"
#include "Bits1.h"
#include "TO1.h"
#include "Events.h"
#include "Cpu.h"

#define CGM_DELAY  511UL

#pragma DATA_SEG DEFAULT

/* Global variables */
volatile byte CCR_reg;                 /* Current CCR reegister */
byte CpuMode = HIGH_SPEED;             /* Current speed mode */


/*
** ===================================================================
**     Method      :  Cpu_Interrupt (bean MC9S12C32_48)
**
**     Description :
**         This method is internal. It is used by Processor Expert only.
** ===================================================================
*/
#pragma CODE_SEG __NEAR_SEG NON_BANKED

ISR(Cpu_Interrupt)
{
}

#pragma CODE_SEG DEFAULT

/*
** ===================================================================
**     Method      :  Cpu_DisableInt (bean MC9S12C32_48)
**
**     Description :
**         Disable maskable interrupts
**     Parameters  : None
**     Returns     : Nothing
** ===================================================================
*/
/*
void Cpu_DisableInt(void)

**      This method is implemented as macro in the header module. **
*/

/*
** ===================================================================
**     Method      :  Cpu_EnableInt (bean MC9S12C32_48)
**
**     Description :
**         Enable maskable interrupts
**     Parameters  : None
**     Returns     : Nothing
** ===================================================================
*/
/*
void Cpu_EnableInt(void)

**      This method is implemented as macro in the header module. **
*/

/*
** ===================================================================
**     Method      :  Cpu_SetStopMode (bean MC9S12C32_48)
**
**     Description :
**         Set low power mode - Stop mode.
**         For more information about the stop mode see
**         documentation of this CPU.
**     Parameters  : None
**     Returns     : Nothing
** ===================================================================
*/
/*
void Cpu_SetStopMode(void)

**      This method is implemented as macro in the header module. **
*/

/*
** ===================================================================
**     Method      :  Cpu_SetWaitMode (bean MC9S12C32_48)
**
**     Description :
**         Set low power mode - Wait mode.
**         For more information about the wait mode see
**         documentation of this CPU.
**         Release from Wait mode: Reset or interrupt
**     Parameters  : None
**     Returns     : Nothing
** ===================================================================
*/
/*
void Cpu_SetWaitMode(void)

**      This method is implemented as macro in the header module. **
*/

/*
** ===================================================================
**     Method      :  _EntryPoint (bean MC9S12C32_48)
**
**     Description :
**         This method is internal. It is used by Processor Expert only.
** ===================================================================
*/
extern void _Startup(void);            /* Forward declaration of external startup function declared in file Start12.c */
#pragma CODE_SEG __NEAR_SEG NON_BANKED

#define INITRG_ADR  0x0011             /* Register map position register */

#pragma NO_FRAME
#pragma NO_EXIT
void _EntryPoint(void)
{
  /*** ### MC9S12C64CFA16 "Cpu" init code ... ***/
  /*** PE initialization code after reset ***/
  /* Initialization of the registers INITRG, INITRM, INITEE is done to protect them to be written accidentally later by the application */
  *(byte*)INITRG_ADR = 0;              /* Set the register map position */
  asm("nop");                          /* nop instruction */
  /* INITRM: RAM15=0,RAM14=0,RAM13=1,RAM12=1,RAM11=0,??=0,??=0,RAMHAL=0 */
  setReg8(INITRM, 48);                 /* Set the RAM map position */ 
  /* MISC: ??=0,??=0,??=0,??=0,EXSTR1=1,EXSTR0=1,ROMHM=0,ROMON=1 */
  setReg8(MISC, 13);                    
  /* EBICTL: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,ESTR=0 */
  setReg8(EBICTL, 0);                   
  /* PEAR: NOACCE=0,??=0,??=0,NECLK=0,??=0,??=0,??=0,??=0 */
  setReg8(PEAR, 0);                     
  /* CLKSEL: PLLSEL=0,PSTP=0,SYSWAI=0,ROAWAI=0,PLLWAI=0,CWAI=0,RTIWAI=0,COPWAI=0 */
  setReg8(CLKSEL, 0);                  /* Select clock source from XTAL and set bits in CLKSEL reg. */ 
  /*** End of PE initialization code after reset ***/
  __asm("jmp _Startup");               /* Jump to C startup code */
}

#pragma CODE_SEG DEFAULT

/*
** ===================================================================
**     Method      :  PE_low_level_init (bean MC9S12C32_48)
**
**     Description :
**         This method is internal. It is used by Processor Expert only.
** ===================================================================
*/
void PE_low_level_init(void)
{
  /* Set pull-up of unconnected pins of this package */
  /* Common initialization of the CPU registers */
  /* PTS: PTS1=1 */
  setReg8Bits(PTS, 2);                  
  /* DDRS: DDRS1=1,DDRS0=0 */
  clrSetReg8Bits(DDRS, 1, 2);           
  /* PWME: ??=0,??=0,PWME5=0,PWME4=0,PWME3=0,PWME2=0,PWME1=0,PWME0=0 */
  setReg8(PWME, 0);                     
  /* TSCR1: TSWAI=0,TSFRZ=0 */
  clrReg8Bits(TSCR1, 96);               
  /* MODRR: MODRR2=0,MODRR0=1 */
  clrSetReg8Bits(MODRR, 4, 1);          
  /* PWMCTL: CON01=0,PSWAI=0,PFRZ=0 */
  clrReg8Bits(PWMCTL, 28);              
  /* PWMCAE: CAE0=0 */
  clrReg8Bits(PWMCAE, 1);               
  /* PWMPOL: PPOL0=0 */
  clrReg8Bits(PWMPOL, 1);               
  /* PTT: PTT2=0,PTT1=1,PTT0=0 */
  clrSetReg8Bits(PTT, 5, 2);            
  /* DDRT: DDRT2=1,DDRT1=1,DDRT0=1 */
  setReg8Bits(DDRT, 7);                 
  /* PERT: PERT1=0 */
  clrReg8Bits(PERT, 2);                 
  /* TCTL2: OM2=0,OL2=0 */
  clrReg8Bits(TCTL2, 48);               
  /* TCTL1: OM7=0,OL7=0 */
  clrReg8Bits(TCTL1, 192);              
  /* TTOV: TOV2=0 */
  clrReg8Bits(TTOV, 4);                 
  /* TSCR2: TOI=0,TCRE=1 */
  clrSetReg8Bits(TSCR2, 128, 8);        
  /* TIOS: IOS7=1,IOS2=1 */
  setReg8Bits(TIOS, 132);               
  /* PWMSDN: PWMIF=0,PWMIE=0,PWMRSTRT=0,PWMLVL=0,??=0,PWM5IN=0,PWM5INL=0,PWM5ENA=0 */
  setReg8(PWMSDN, 0);                   
  /* PERP: ??=1,??=1,??=1,??=1,??=1,??=1,??=1 */
  setReg8Bits(PERP, 223);               
  /* DDRB: ??=1,??=1,??=1,??=1,??=1,??=1,??=1 */
  setReg8Bits(DDRB, 239);               
  /* DDRE: ??=1,??=1,??=1,??=1 */
  setReg8Bits(DDRE, 108);               
  /* DDRA: ??=1,??=1,??=1,??=1,??=1,??=1,??=1 */
  setReg8Bits(DDRA, 254);               
  /* PERS: ??=1,??=1 */
  setReg8Bits(PERS, 12);                
  /* PERJ: PERJ7=1,PERJ6=1 */
  setReg8Bits(PERJ, 192);               
  /* ### MC9S12C32_48 "Cpu" init code ... */

  /* ### TimerInt "TI1" init code ... */
  setReg8(RTICTL, 107);                 
  
  /* ### Asynchro serial "AS1" init code ... */
  AS1_Init();
  /* ### Programable pulse generation "PWM6" init code ... */
  PWM6_Init();
  /* ###  "CAN1" init code ... */
  CAN1_Init();
  /* ### BitsIO "Bits1" init code ... */
  /* ### TimerOut "TO1" init code ... */
  TO1_Init();
 /* Common peripheral initialization - ENABLE */
  /* CRGFLG: RTIF=1 */
  setReg8Bits(CRGFLG, 128);             
  /* CRGINT: RTIE=1 */
  setReg8Bits(CRGINT, 128);             
  /* INTCR: IRQEN=0 */
  clrReg8Bits(INTCR, 64);              /* Disable the IRQ interrupt. IRQ interrupt is enabled after CPU reset by default. */ 
  __EI();                              /* Enable interrupts */
}

/* END Cpu. */

/*
** ###################################################################
**
**     This file was created by UNIS Processor Expert 2.96 [03.76]
**     for the Freescale HCS12 series of microcontrollers.
**
** ###################################################################
*/

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