pciconfigration.cpp

pci配置

/* PCI Configuration Space
  register   bits 31-24   bits 23-16   bits 15-8   bits 7-0  
			 00   				Device ID     		     |				Vendor ID  
			 04   				Status   				 |				Command  
			 08   	ClassCode   SubClass   | 			revision ID  
			 0C   		BIST   		HeaderType | LatencyTimer CacheLineSize  
			 10   Base Address #0  
			 14   Base Address #1  
			 ...  
			 24   Base Address #5  
			 28   Card Bus CIS Pointer  
			 2C   SubSystem ID   					 |			SubSystem Vendor ID  
			 30   Expansion ROM base address  
			 34   Reserved  
			 38   Reserved  
			 3C   Maxlatency   MinGrant  | InterruptPIN   InterruptLine  
 *
 */

#include "Pci.h"
#include <system.h>
#include <device.h>
#include <Process.h>

#define PCIBIOS_INSTALL_CHECK	0xB101
#define PCIBIOS_FIND_PCI_DEVICE	0xB102
#define PCIBIOS_FIND_PCI_CLASS_CODE	0xB103
#define PCIBIOS_READ_CONFIG_BYTE	0xB108
#define PCIBIOS_READ_CONFIG_WORD	0xB109
#define PCIBIOS_READ_CONFIG_DWORD	0xB10A
#define PCIBIOS_WRITE_CONFIG_BYTE	0xB10B
#define PCIBIOS_WRITE_CONFIG_WORD	0xB10C
#define PCIBIOS_WRITE_CONFIG_DWORD	0xB10D
#define PCIBIOS_GET_IRQ_ROUTING_INFO	0xB10E

//For reading Configurations
#define PCI_VENDOR_ID		0x00
#define PCI_DEVICE_ID		0x02
#define PCI_COMMAND		0x04
#define PCI_STATUS		0x06
#define PCI_REVISION		0x08
#define PCI_INTERFACE		0x09
#define PCI_SUB_CLASS		0x0A
#define PCI_CLASS_CODE		0x0B
#define PCI_LATENCY		0x0D
#define PCI_HEADER_TYPE		0x0E
#define PCI_BASE_REGISTERS	0x10
#define PCI_INTERRUPT_LINE	0x3C
#define PCI_INTERRUPT_PIN	0x3D
#define PCI_MIN_GRANT		0x3E
#define PCI_MAX_LATENCY		0x3F

#define PCI_COMMAND_IO		0x001
#define PCI_COMMAND_MEMORY	0x002
#define PCI_COMMAND_MASTER	0x004

#define PCI_ADDRESS_SPACE	0x01
#define PCI_ADDRESS_IO_MASK	0xFFFFFFFC
#define PCI_ADDRESS_MEMORY_32_MASK	0xFFFFFFF0

#define PCI_HEADER_BRIDGE	0x01
#define PCI_MULTIFUNCTION	0x80

#define PCI_BUS_PRIMARY	0x18
#define PCI_BUS_SECONDARY	0x19
#define PCI_BUS_SUBORDINATE	0x1A

#define PCI_MASS_STORAGE	0x01
#define PCI_IDE			0x01

#define MAX_PCI_DEVICES		255
#define PCI_NOT_PRESENT		0
#define PCI_PRESENT		1

PPciUnit PciDevices[MAX_PCI_DEVICES];
const char* PciClassName[]={
	"Unknown",
	"Storage",
	"Network",
	"Display",
	"Multimedia",
	"Memory",
	"Bridge",
	"Simple Communication",
	"System",
	"Input",
	"Docking",
	"Processor",
	"Serial",
	"Wireless",
	"Intelligent I/O",
	"Satellite Communication",
	"En/Decryption",
	"Data Aquisition & Signal Processing"
};

typedef struct tagPciDescription{
	int Class;
	int SubClass;
	int Interface;
	char Name[48];
}PciDescription;

//Pci描述
static struct tagPciDescription PciRecord[] = {
 { 0x00, 0x00, 0x00, "Undefined" },
 { 0x00, 0x01, 0x00, "VGA" },

 { 0x01, 0x00, 0x00, "SCSI" },
 { 0x01, 0x01, 0x00, "IDE" },
 { 0x01, 0x02, 0x00, "Floppy" },
 { 0x01, 0x03, 0x00, "IPI" },
 { 0x01, 0x04, 0x00, "RAID" },
 { 0x01, 0x05, 0x20, "ATA (Single DMA)" },
 { 0x01, 0x05, 0x30, "ATA (Chained DMA)" },
 { 0x01, 0x06, 0x00, "Serial ATA" },
 { 0x01, 0x06, 0x01, "Serial ATA (AHCI 1.0)" },
 { 0x01, 0x07, 0x00, "Serial Attached SCSI" },
 { 0x01, 0x80, 0x00, "Other" },

 { 0x02, 0x00, 0x00, "Ethernet" },
 { 0x02, 0x01, 0x00, "Token Ring" },
 { 0x02, 0x02, 0x00, "FDDI" },
 { 0x02, 0x03, 0x00, "ATM" },
 { 0x02, 0x04, 0x00, "ISDN" },
 { 0x02, 0x05, 0x00, "WorldFip" },
 { 0x02, 0x06, 0x00, "PICMG 2.14" },
 { 0x02, 0x80, 0x00, "Other" },

 { 0x03, 0x00, 0x00, "VGA" },
 { 0x03, 0x00, 0x01, "VGA+8514" },
 { 0x03, 0x01, 0x00, "XGA" },
 { 0x03, 0x02, 0x00, "3D" },
 { 0x03, 0x80, 0x00, "Other" },

 { 0x04, 0x00, 0x00, "Video" },
 { 0x04, 0x01, 0x00, "Audio" },
 { 0x04, 0x02, 0x00, "Telephony" },
 { 0x04, 0x80, 0x00, "Other" },

 { 0x05, 0x00, 0x00, "RAM" },
 { 0x05, 0x01, 0x00, "Flash" },
 { 0x05, 0x80, 0x00, "Other" },

 { 0x06, 0x00, 0x00, "PCI to HOST" },
 { 0x06, 0x01, 0x00, "PCI to ISA" },
 { 0x06, 0x02, 0x00, "PCI to EISA" },
 { 0x06, 0x03, 0x00, "PCI to MCA" },
 { 0x06, 0x04, 0x00, "PCI to PCI" },
 { 0x06, 0x04, 0x01, "PCI to PCI (Subtractive Decode)" },
 { 0x06, 0x05, 0x00, "PCI to PCMCIA" },
 { 0x06, 0x06, 0x00, "PCI to NuBUS" },
 { 0x06, 0x07, 0x00, "PCI to Cardbus" },
 { 0x06, 0x08, 0x00, "PCI to RACEway (Transparent)" },
 { 0x06, 0x08, 0x01, "PCI to RACEway (End-point)" },
 { 0x06, 0x09, 0x40, "PCI to PCI (Primary bus to host)" },
 { 0x06, 0x09, 0x80, "PCI to PCI (Secondary bus to host)" },
 { 0x06, 0x0A, 0x00, "PCI to InfiBand" },
 { 0x06, 0x80, 0x00, "PCI to Other" },

 { 0x07, 0x00, 0x00, "Serial" },
 { 0x07, 0x00, 0x01, "Serial - 16450" },
 { 0x07, 0x00, 0x02, "Serial - 16550" },
 { 0x07, 0x00, 0x03, "Serial - 16650" },
 { 0x07, 0x00, 0x04, "Serial - 16750" },
 { 0x07, 0x00, 0x05, "Serial - 16850" },
 { 0x07, 0x00, 0x06, "Serial - 16950" },
 { 0x07, 0x01, 0x00, "Parallel" },
 { 0x07, 0x01, 0x01, "Parallel - BiDir" },
 { 0x07, 0x01, 0x02, "Parallel - ECP" },
 { 0x07, 0x01, 0x03, "Parallel - IEEE1284 Controller" },
 { 0x07, 0x01, 0xFE, "Parallel - IEEE1284 Target" },
 { 0x07, 0x02, 0x00, "Multiport Serial" },
 { 0x07, 0x03, 0x00, "Hayes Compatible Modem" },
 { 0x07, 0x03, 0x01, "Hayes Compatible Modem, 16450" },
 { 0x07, 0x03, 0x02, "Hayes Compatible Modem, 16550" },
 { 0x07, 0x03, 0x03, "Hayes Compatible Modem, 16650" },
 { 0x07, 0x03, 0x04, "Hayes Compatible Modem, 16750" },
 { 0x07, 0x04, 0x00, "GPIB (IEEE 488.1/2)" },
 { 0x07, 0x05, 0x00, "Smart Card" },
 { 0x07, 0x80, 0x00, "Other" },

 { 0x08, 0x00, 0x00, "PIC" },
 { 0x08, 0x00, 0x01, "ISA PIC" },
 { 0x08, 0x00, 0x02, "EISA PIC" },
 { 0x08, 0x00, 0x10, "I/O APIC" },
 { 0x08, 0x00, 0x20, "I/O(x) APIC" },
 { 0x08, 0x01, 0x00, "DMA" },
 { 0x08, 0x01, 0x01, "ISA DMA" },
 { 0x08, 0x01, 0x02, "EISA DMA" },
 { 0x08, 0x02, 0x00, "Timer" },
 { 0x08, 0x02, 0x01, "ISA Timer" },
 { 0x08, 0x02, 0x02, "EISA Timer" },
 { 0x08, 0x03, 0x00, "RTC" },
 { 0x08, 0x03, 0x01, "ISA RTC" },
 { 0x08, 0x04, 0x00, "Hot-Plug" },
 { 0x08, 0x80, 0x00, "Other" },

 { 0x09, 0x00, 0x00, "Keyboard" },
 { 0x09, 0x01, 0x00, "Pen" },
 { 0x09, 0x02, 0x00, "Mouse" },
 { 0x09, 0x03, 0x00, "Scanner" },
 { 0x09, 0x04, 0x00, "Game Port" },
 { 0x09, 0x04, 0x10, "Game Port (Legacy)" },
 { 0x09, 0x80, 0x00, "Other" },

 { 0x0a, 0x00, 0x00, "Generic" },
 { 0x0a, 0x80, 0x00, "Other" },

 { 0x0b, 0x00, 0x00, "386" },
 { 0x0b, 0x01, 0x00, "486" },
 { 0x0b, 0x02, 0x00, "Pentium" },
 { 0x0b, 0x03, 0x00, "PentiumPro" },
 { 0x0b, 0x10, 0x00, "DEC Alpha" },
 { 0x0b, 0x20, 0x00, "PowerPC" },
 { 0x0b, 0x30, 0x00, "MIPS" },
 { 0x0b, 0x40, 0x00, "Coprocessor" },
 { 0x0b, 0x80, 0x00, "Other" },

 { 0x0c, 0x00, 0x00, "FireWire" },
 { 0x0c, 0x00, 0x10, "OHCI FireWire" },
 { 0x0c, 0x01, 0x00, "ACCESS.bus" },
 { 0x0c, 0x02, 0x00, "SSA" },
 { 0x0c, 0x03, 0x00, "USB (UHCI)" },
 { 0x0c, 0x03, 0x10, "USB (OHCI)" },
 { 0x0c, 0x03, 0x20, "USB (EHCI)" },
 { 0x0c, 0x03, 0x80, "USB" },
 { 0x0c, 0x03, 0xFE, "USB Device" },
 { 0x0c, 0x04, 0x00, "Fibre Channel" },
 { 0x0c, 0x05, 0x00, "SMBus Controller" },
 { 0x0c, 0x06, 0x00, "InfiniBand" },
 { 0x0c, 0x07, 0x00, "IPMI (SMIC)" },
 { 0x0c, 0x07, 0x01, "IPMI (Keyb)" },
 { 0x0c, 0x07, 0x02, "IPMI (Block Tx)" },
 { 0x0c, 0x08, 0x00, "SERCOS (IEC61491)" },
 { 0x0c, 0x09, 0x00, "CANbus" },
 { 0x0c, 0x80, 0x00, "Other" },

 { 0x0d, 0x00, 0x00, "iRDA Controller" },
 { 0x0d, 0x01, 0x00, "Consumer IR" },
 { 0x0d, 0x10, 0x00, "RF controller" },
 { 0x0d, 0x11, 0x00, "Bluetooth" },
 { 0x0d, 0x12, 0x00, "Broadband" },
 { 0x0d, 0x20, 0x00, "Wireless Ethernet 802.11a" },
 { 0x0d, 0x21, 0x00, "Wireless Ethernet 802.11b" },
 { 0x0d, 0x80, 0x00, "Other" },

 { 0x0e, 0x00, 0x00, "I2O" },
 { 0x0e, 0x80, 0x00, "Other" },

 { 0x0f, 0x01, 0x00, "TV" },
 { 0x0f, 0x02, 0x00, "Audio" },
 { 0x0f, 0x03, 0x00, "Voice" },
 { 0x0f, 0x04, 0x00, "Data" },
 { 0x0f, 0x80, 0x00, "Other" },

 { 0x10, 0x00, 0x00, "Network" },
 { 0x10, 0x10, 0x00, "Entertainment" },
 { 0x10, 0x80, 0x00, "Other" },

 { 0x11, 0x00, 0x00, "DPIO Modules" },
 { 0x11, 0x01, 0x00, "Performance Counters" },
 { 0x11, 0x10, 0x00, "Comm. Sync, Time+Freq. Measurement" },
 { 0x11, 0x20, 0x00, "Management Card" },
 { 0x11, 0x80, 0x00, "Other" }
};

typedef struct tagBIOS32ServiceData{
	t_32 Signature;	//0x5F32335F  "_32_"
	t_32 EntryPoint;	//入口
	t_8	 Revision;	//00h
	t_8	 LenghOfThis;	//01h * 16
	t_8	 Checksum;	//00h
	t_8	 Reserved[5];	//00h 
}BIOS32ServiceData, *PBIOS32ServiceData;
PBIOS32ServiceData pBios32Srv;

typedef struct __attribute__((packed)) tagLongCall {
  MEMADDR Offset;
  USHORT Selector;
}LongCall;

static LongCall Bios32Entry = { 0, 0x8 };
static LongCall PciEntry = { 0, 0x8 };
RESULT PciBiosCall( NUMBER srvNo, t_32 *pEbx, t_32 *pEcx, t_32 *pEdx );
RESULT GetBiosService( t_32 srvSign, MEMADDR *SrvAddr );

static UCHAR PciChar;	//
/*
Bit(s)  Description     (Table 0647)
0      configuration space access mechanism 1 supported
1      configuration space access mechanism 2 supported
2-3    reserved
4      Special Cycle generation mechanism 1 supported
5      Special Cycle generation mechanism 2 supported
6-7    reserved
*/
static UCHAR LastPci;	//最后一块PCI编号
static UCHAR PciVersion;	//
static UCHAR PciBusses = 0;
static UCHAR DeviceNum = 0;

const char* GetPciType( int cls )
{
	return PciClassName[cls];
}

const char* GetPciName( int cls, int sub, int interface )
{
	int i;
	int no = sizeof(PciRecord)/sizeof(PciDescription);
	for(i=0; i<no; i++ )
	{
		if( PciRecord[i].Class==cls&&PciRecord[i].SubClass==sub &&
			PciRecord[i].Interface==interface )
		return PciRecord[i].Name;
	}
	return "Unknown";
}

RESULT PciBiosCall( NUMBER srvNo, t_32 *pEbx, t_32 *pEcx, t_32 *pEdx )
{	
	UCHAR ret;
	t_32 ebx, ecx, edx;
  __asm__("lcall *(%%edi)"
	:"=a" (ret),
	 "=b" (ebx),
	 "=c" (ecx),
	 "=d" (edx)
	:"0" (srvNo),
	 "1" (0),
	 "D" (&PciEntry));
	if( pEbx )
		*pEbx = ebx;
	if( pEcx )
		*pEcx = ecx;
	if( pEdx )
		*pEdx = edx;
	return ret;
}