📄 f240regs.h
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/*;***********************************************************************
; File Name: f240regs.h
;
; Description: F240 Header file containing all peripheral register
; declarations as well as other useful definitions.
;
; Revision: 1.00
;
;***********************************************************************
;-----------------------------------------------------------------------
; On Chip Periperal Register Definitions (All registers mapped into data
; space unless otherwise noted)
;-----------------------------------------------------------------------
;C240xA Core Registers
;~~~~~~~~~~~~~~~~~~~~*/
//
#define WSGR portffff
#define FCMR portff0f
#define IFR (* (unsigned int *) 0x6)
#define IMR (* (unsigned int *) 0x4)
//LDP #00e0h
#define SCSR1 (* (unsigned int *) 0x07018)
#define SCSR2 (* (unsigned int *) 0x07019)
#define DINR (* (unsigned int *) 0x0701C)
#define PIVR (* (unsigned int *) 0x0701E)
#define WDCNTR (* (unsigned int *) 0x07023)
#define WDKEY (* (unsigned int *) 0x07025)
#define WDCR (* (unsigned int *) 0x07029)
#define SCICCR (* (unsigned int *) 0x07050)
#define SCICTL1 (* (unsigned int *) 0x07051)
#define SCIHBAUD (* (unsigned int *) 0x07052)
#define SCILBAUD (* (unsigned int *) 0x07053)
#define SCICTL2 (* (unsigned int *) 0x07054)
#define SCIRXST (* (unsigned int *) 0x07055)
#define SCIRXEMU (* (unsigned int *) 0x07056)
#define SCIRXBUF (* (unsigned int *) 0x07057)
#define SCITXBUF (* (unsigned int *) 0x07059)
#define SCIPRI (* (unsigned int *) 0x0705f)
#define XINT1CR (* (unsigned int *) 0x07070)
#define XINT2CR (* (unsigned int *) 0x07071)
//LDP #00e1h
#define MCRA (* (unsigned int *) 0x07090)
#define MCRB (* (unsigned int *) 0x07092)
#define MCRC (* (unsigned int *) 0x07094)
#define PADATDIR (* (unsigned int *) 0x07098)
#define PBDATDIR (* (unsigned int *) 0x0709a)
#define PCDATDIR (* (unsigned int *) 0x0709c)
#define PDDATDIR (* (unsigned int *) 0x0709E)
#define PEDATDIR (* (unsigned int *) 0x07095)
#define PFDATDIR (* (unsigned int *) 0x07096)
#define ADCTRL1 (* (unsigned int *) 0x070A0)
#define ADCTRL2 (* (unsigned int *) 0x070A1)
#define MAXCONV (* (unsigned int *) 0x070A2)
#define CHSELSEQ1 (* (unsigned int *) 0x070A3)
#define CHSELSEQ2 (* (unsigned int *) 0x070A4)
#define CHSELSEQ3 (* (unsigned int *) 0x070A5)
#define CHSELSEQ4 (* (unsigned int *) 0x070A6)
#define AUTO_SEQ_SR (* (unsigned int *) 0x070A7)
#define RESULT0 (* (unsigned int *) 0x070A8)
#define RESULT1 (* (unsigned int *) 0x070A9)
#define RESULT2 (* (unsigned int *) 0x070AA)
#define RESULT3 (* (unsigned int *) 0x070AB)
#define RESULT4 (* (unsigned int *) 0x070AC)
#define RESULT5 (* (unsigned int *) 0x070AD)
#define RESULT6 (* (unsigned int *) 0x070AE)
#define RESULT7 (* (unsigned int *) 0x070AF)
#define RESULT8 (* (unsigned int *) 0x070B0)
#define RESULT9 (* (unsigned int *) 0x070B1)
#define RESULT10 (* (unsigned int *) 0x070B2)
#define RESULT11 (* (unsigned int *) 0x070B3)
#define RESULT12 (* (unsigned int *) 0x070B4)
#define RESULT13 (* (unsigned int *) 0x070B5)
#define RESULT14 (* (unsigned int *) 0x070B6)
#define RESULT15 (* (unsigned int *) 0x070B7)
#define CALIBRATION (* (unsigned int *) 0x070B8)
//LDP #00e2h
#define MDER (* (unsigned int *) 0x07100)
#define TCR (* (unsigned int *) 0x07101)
#define RCR (* (unsigned int *) 0x07102)
#define MCR (* (unsigned int *) 0x07103)
#define BCR2 (* (unsigned int *) 0x07104)
#define BCR1 (* (unsigned int *) 0x07105)
#define ESR (* (unsigned int *) 0x07106)
#define GSR (* (unsigned int *) 0x07107)
#define CEC (* (unsigned int *) 0x07108)
#define CAN_IFR (* (unsigned int *) 0x07109)
#define CAN_IMR (* (unsigned int *) 0x0710a)
#define LAM0_H (* (unsigned int *) 0x0710b)
#define LAM0_L (* (unsigned int *) 0x0710c)
#define LAM1_H (* (unsigned int *) 0x0710D)
#define LAM1_L (* (unsigned int *) 0x0710E)
//LDP #00e4h
#define MSGID0L (* (unsigned int *) 0x07200)
#define MSGID0H (* (unsigned int *) 0x07201)
#define MSGCTRL0 (* (unsigned int *) 0x07202)
#define MBOX0A (* (unsigned int *) 0x07204)
#define MBOX0B (* (unsigned int *) 0x07205)
#define MBOX0C (* (unsigned int *) 0x07206)
#define MBOX0D (* (unsigned int *) 0x07207)
#define MSGID1L (* (unsigned int *) 0x07208)
#define MSGID1H (* (unsigned int *) 0x07209)
#define MSGCTRL1 (* (unsigned int *) 0x0720a)
#define MBOX1A (* (unsigned int *) 0x0720c)
#define MBOX1B (* (unsigned int *) 0x0720D)
#define MBOX1C (* (unsigned int *) 0x0720E)
#define MBOX1D (* (unsigned int *) 0x0720F)
#define MSGID2L (* (unsigned int *) 0x07210)
#define MSGID2H (* (unsigned int *) 0x07211)
#define MSGCTRL2 (* (unsigned int *) 0x07212)
#define MBOX2A (* (unsigned int *) 0x07214)
#define MBOX2B (* (unsigned int *) 0x07215)
#define MBOX2C (* (unsigned int *) 0x07216)
#define MBOX2D (* (unsigned int *) 0x07217)
#define MSGID3L (* (unsigned int *) 0x07218)
#define MSGID3H (* (unsigned int *) 0x07219)
#define MSGCTRL3 (* (unsigned int *) 0x0721a)
#define MBOX3A (* (unsigned int *) 0x0721c)
#define MBOX3B (* (unsigned int *) 0x0721D)
#define MBOX3C (* (unsigned int *) 0x0721E)
#define MBOX3D (* (unsigned int *) 0x0721F)
#define MSGID4L (* (unsigned int *) 0x07220)
#define MSGID4H (* (unsigned int *) 0x07221)
#define MSGCTRL4 (* (unsigned int *) 0x07222)
#define MBOX4A (* (unsigned int *) 0x07224)
#define MBOX4B (* (unsigned int *) 0x07225)
#define MBOX4C (* (unsigned int *) 0x07226)
#define MBOX4D (* (unsigned int *) 0x07227)
#define MSGID5L (* (unsigned int *) 0x07228)
#define MSGID5H (* (unsigned int *) 0x07229)
#define MSGCTRL5 (* (unsigned int *) 0x0722a)
#define MBOX5A (* (unsigned int *) 0x0722c)
#define MBOX5B (* (unsigned int *) 0x0722D)
#define MBOX5C (* (unsigned int *) 0x0722E)
#define MBOX5D (* (unsigned int *) 0x0722F)
//LDP #00e8h
#define GPTCONA (* (unsigned int *) 0x07400)
#define T1CNT (* (unsigned int *) 0x07401)
#define T1CMPR (* (unsigned int *) 0x07402)
#define T1PR (* (unsigned int *) 0x07403)
#define T1CON (* (unsigned int *) 0x07404)
#define T2CNT (* (unsigned int *) 0x07405)
#define T2CMPR (* (unsigned int *) 0x07406)
#define T2PR (* (unsigned int *) 0x07407)
#define T2CON (* (unsigned int *) 0x07408)
#define EVAIMRA (* (unsigned int *) 0x0742C)
#define EVAIMRB (* (unsigned int *) 0x0742D)
#define EVAIMRC (* (unsigned int *) 0x0742E)
#define EVAIFRA (* (unsigned int *) 0x0742F)
#define EVAIFRB (* (unsigned int *) 0x07430)
#define EVAIFRC (* (unsigned int *) 0x07431)
//LDP #00EAh
#define GPTCONB (* (unsigned int *) 0x07500)
#define T3CNT (* (unsigned int *) 0x07501)
#define T3CMPR (* (unsigned int *) 0x07502)
#define T3PR (* (unsigned int *) 0x07503)
#define T3CON (* (unsigned int *) 0x07504)
#define T4CNT (* (unsigned int *) 0x07505)
#define T4CMPR (* (unsigned int *) 0x07506)
#define T4PR (* (unsigned int *) 0x07507)
#define T4CON (* (unsigned int *) 0x07508)
#define EVBIMRA (* (unsigned int *) 0x0752C)
#define EVBIMRB (* (unsigned int *) 0x0752D)
#define EVBIMRC (* (unsigned int *) 0x0752E)
#define EVBIFRA (* (unsigned int *) 0x0752F)
#define EVBIFRB (* (unsigned int *) 0x07530)
#define EVBIFRC (* (unsigned int *) 0x07531)
/*;Flash Module Registers (mapped into Program space)
;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
SEG_CTR .set 0h ;Flash Segment Control Register
WADRS .set 2h ;Flash Write Address Register
WDATA .set 3h ;Flash Write Data Register
;Wait State Generator Registers (mapped into I/O space)
;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
WSGR .set 0FFFFh ;Wait State Generator Register
;-----------------------------------------------------------------------
; Constant Definitions
;-----------------------------------------------------------------------
;Data Memory Boundary Addresses
;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
B0_SADDR .set 00200h ;Block B0 start address
B0_EADDR .set 002FFh ;Block B0 end address
B1_SADDR .set 00300h ;Block B1 start address
B1_EADDR .set 003FFh ;Block B1 end address
B2_SADDR .set 00060h ;Block B2 start address
B2_EADDR .set 0007Fh ;Block B2 end address
XDATA_SADDR .set 08000h ;External Data Space start address
XDATA_EADDR .set 09FFFh ;External Data Space end address*/
#define B0_SADDR (* (unsigned int *) 0x00200)
#define B0_EADDR (* (unsigned int *) 0x002ff)
#define B1_SADDR (* (unsigned int *) 0x00300)
#define B1_EADDR (* (unsigned int *) 0x003ff)
#define B2_SADDR (* (unsigned int *) 0x00060)
#define B2_EADDR (* (unsigned int *) 0x0007f)
#define XDATA_SADDR (* (unsigned int *) 0x08000)
#define XDATA_EADDR (* (unsigned int *) 0x09fff)
//;Bit codes for Test Bit instruction (BIT)
//;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
#define BIT15 0x0001 ////;Bit Code for 15
#define BIT14 0x0002 ////;Bit Code for 14
#define BIT13 0x0004 ////;Bit Code for 13
#define BIT12 0x0008 //;Bit Code for 12
#define BIT11 0x0010 //;Bit Code for 11
#define BIT10 0x0020 //;Bit Code for 10
#define BIT9 0x0040 //;Bit Code for 9
#define BIT8 0x0080 //;Bit Code for 8
#define BIT7 0x0100 //;Bit Code for 7
#define BIT6 0x0200 //;Bit Code for 6
#define BIT5 0x0400 //;Bit Code for 5
#define BIT4 0x0800 //;Bit Code for 4
#define BIT3 0x1000 //;Bit Code for 3
#define BIT2 0x2000 //;Bit Code for 2
#define BIT1 0x4000 //;Bit Code for 1
#define BIT0 0x8000 //;Bit Code for 0
//D/A 显示, 虚地址
#define VIRTUALDA (* (unsigned int *) 0x0a000)
#define CHARACTER (* (unsigned int *) 0x0afff) ⌨️ 快捷键说明
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