xsac97ctrl.h

ARM9WindowsOS下电机控制 蜂鸣控制 需要高度自治的试验平台

#define XS_AC97CTRL_COLD_TIMEOUT_50USECS   20000

        // Timeout for the I/O cycle reading mixer registers from Codec
        // Actually the max is expected to be 126 uSec; add some for padding
#define XS_AC97CTRL_READ_TIMEOUT_1USECS ((XS_AC97CTRL_ACLINK_FRAME_USECS*6)+24)

        // Getting the AC link should not take much longer than a time-out
        //  on an in-progress read operation.  If one read operation is 
        //  successful, both should proceed fairly quickly.
#define XS_AC97CTRL_CAIP_TIMEOUT_1USECS  (XS_AC97CTRL_READ_TIMEOUT_1USECS + 50)

/*
*******************************************************************************
*******************************************************************************
***   Structure definitions
*******************************************************************************
*******************************************************************************
*/

/*
*******************************************************************************
    AC'97 Controller Registers Structure Definition
*******************************************************************************
*/

// For accessing the Codec mixer registers, each increment of one 32-bit word
//  in processor space increments the addressed mixer register by two.
// This does not cause any ambiguities because only even mixer register 
//  addresses are currently supported (AC '97 spec, R 2.2)
#define XS_AC97CTRL_MIXER_REGS_PER_WORD   2


typedef struct XsAc97CtrlRegsS
{  //   Register symbol     // Usage

    int POCR;           // PCM Out Control Register
    int PICR;           // PCM In Control Register
    int MCCR;           // Mic In Control Register
    int GCR;            // Global Control Register
    int POSR;           // PCM Out Status Register
    int PISR;           // PCM In Status Register
    int MCSR;           // Mic In Status Register
    int GSR;            // Global Status Register
    int CAR;            // CODEC Access Register
    int rsvd1 [7];      // 0x4050-0024 through 0x4050-003C
    int PCDR;           // PCM FIFO Data Register
    int rsvd2 [7];      // 0x4050-0044 through 0x4050-005C   
    int MCDR;           // Mic-in FIFO Data Register
    int rsvd3 [0x27];   // 0x4050-0064 through 0x4050-00FC   
    int MOCR;           // MODEM Out Control Register
    int rsvd4; 
    int MICR;           // MODEM In Control Register
    int rsvd5; 
    int MOSR;           // MODEM Out Status Register
    int rsvd6; 
    int MISR;           // MODEM In Status Register
    int rsvd7 [9];      // 0x4050-011C through 0x4050-013C
    int MODR;           // MODEM FIFO Data Register 
    int rsvd8 [0x2F];   // 0x4050-0144 through 0x4050-01FC
                            // Primary Audio CODEC registers access 
    int XsAC97CtrlMixerRegsPrimaryAud   [AC97_NUM_MIXER_REGS];
                            // Secondary Audio CODEC registers access
    int XsAC97CtrlMixerRegsSecondaryAud [AC97_NUM_MIXER_REGS];
                            // Primary MODEM CODEC registers access
    int XsAC97CtrlMixerRegsPrimaryMdm   [AC97_NUM_MIXER_REGS];
                            // Secondary MODEM CODEC registers access
    int XsAC97CtrlMixerRegsSecondaryMdm [AC97_NUM_MIXER_REGS];

}  XsAc97CtrlRegsT ;


/*
*******************************************************************************
    Define one entry in the AC'97 Controller status indicator processing table.
    Includes interrupt control and callback (registered handler) info.
*******************************************************************************
*/

typedef struct XsAc97CtrlStatusEntryE
{
    int     intIsSupported;           // Int supported in current system?
    int     intIsEnabled;             // Ints currently enabled for this type?
    XsAc97CtrlHandlerFnPT              // Pointer to the client's registered 
                registeredHandlerFnP;  //  handler for this interrupt type.
    void*    registeredParamP;         // Pass back to registered handler

    int* enableRegisterP;          // Addr of mem-mapped reg for int enable
    int      enableBitShift;           // Bit position in enable reg for enable

    int   reportBitMaskGsr;         // Unshifted Mask for status in GSR
    int      reportBitShiftGsr;        // Bit position where reported in GSR

    int* clearRegisterP;           // Addr of mem-mapped reg for status clr
    int      clearBitShift;            // Bit position in status reg for clear

} XsAc97CtrlStatusEntryT;


/*
*******************************************************************************
*******************************************************************************
    Ac97Ctrl.c scope variable definitions
*******************************************************************************
*******************************************************************************
*/

static 
XsAc97CtrlRegsT *XsAc97CtrlRegsP = 
                                (XsAc97CtrlRegsT *) XS_AC97CTRL_REGISTER_BASE;

#if 0

// Translates AC'97 interrupt IDs to status indicator IDs
// Permits both status and interrupt-related functions to use
//  XsAc97CtrlStatusTable.

static
XsAc97CtrlStatusIdT XsAc97CtrlIntToStatusTransTbl [] =
{
    XS_AC97CTRL_STAT_GSCI,    // XS_AC97CTRL_int_GSCI
    XS_AC97CTRL_STAT_MDM_IN,  // XS_AC97CTRL_int_MIint
    XS_AC97CTRL_STAT_MDM_OUT, // XS_AC97CTRL_int_MOint
    XS_AC97CTRL_STAT_PCM_IN,  // XS_AC97CTRL_int_PIint
    XS_AC97CTRL_STAT_PCM_OUT, // XS_AC97CTRL_int_POint
    XS_AC97CTRL_STAT_MIC_IN,  // XS_AC97CTRL_int_Mint 
    XS_AC97CTRL_STAT_PCRDY,   // XS_AC97CTRL_int_PCRDY
    XS_AC97CTRL_STAT_SCRDY,   // XS_AC97CTRL_int_SCRDY
    XS_AC97CTRL_STAT_PCRSM,   // XS_AC97CTRL_int_PCRSM
    XS_AC97CTRL_STAT_SCRSM,   // XS_AC97CTRL_int_SCRSM
    XS_AC97CTRL_STAT_SDONE,   // XS_AC97CTRL_int_SDONE
    XS_AC97CTRL_STAT_CDONE    // XS_AC97CTRL_int_CDONE

}; // XsAc97CtrlIntToStatusTransTbl[]


/*
*******************************************************************************
    AC'97 Controller status and registered interrupt processing table.
    - Register addresses must be set during runtime initialization, so this 
      table will be entirely initialized then.
*******************************************************************************
*/

static
XsAc97CtrlStatusEntryT XsAc97CtrlStatusTable [XS_AC97CTRL_STAT_MAX+1];

/*
*******************************************************************************
*******************************************************************************
    Private function prototypes for processor on-board AC'97 Controller module
*******************************************************************************
*******************************************************************************
*/
// Helper function to initialize the entries in XsAc97CtrlStatusTable[]
static
void XsAc97CtrlSetStatusEntry ( XsAc97CtrlStatusEntryT*,
                                int,
                                int*,
                                int,
                                int,
                                int,
                                int*,
                                int);

static 
void XsAc97CtrlInterruptHandler (void *);

static 
int XsAc97CtrlClearStatus (XsAc97CtrlStatusIdT);

static 
int XsAc97CtrlRangeCheckStatusId (XsAc97CtrlStatusIdT);

static
void XsAc97CtrlSetStatusEntry ( XsAc97CtrlStatusEntryT* targetEntryP,
                                int,
                                int*,
                                int,
                                int,
                                int,
                                int*,
                                int);


// End Private prototypes for processor on-board AC'97 Controller module

#endif // 0

#endif // #ifndef _XSAC97CTRL_H