📄 xsuart.h
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/******************************************************************************
**
** COPYRIGHT (C) 2000 Intel Corporation
**
** FILENAME: xsuart.h
**
** PURPOSE: This file containes the UART's register definitions
**
** LAST MODIFIED: 12/20/2000
******************************************************************************/
#ifndef _xsuart_h
#define _xsuart_h
/*
************************************************************************************
* CONSTANTS
************************************************************************************
*/
/*
************************************************************************************
* DATA TYPES
************************************************************************************
*/
// UART registers
// This type is used by FFUART, BTUART and STUART
typedef struct UartRegsS {
int UDATA; // Receive Buffer Reg. (RBR), Transmit Holding Reg. (THR) and DLL
int IER; // Interrupt Enable Reg. (IER) and Baud Divisor Higher Byte Reg. (DLH)
int FCR; // Interrupt ID Reg. (read only) and FIFO Control Reg. (write only)
int LCR; // Line Control Reg.
int MCR; // Modem Control Reg.
int LSR; // Line Status Reg.
int MSR; // Modem Status Reg.
int SPR; // Scratch Pad Reg.
int ISR; // Slow Infrared Select Reg.
} UartRegsT;
// Masks for IER Reg.
// Note:
// - user needs to program the GPIO reg. before enabling the unit
// - NRZ is used in UART mode only, not for infrared mode
// - user needs to make sure that DMA and TIE and RAVIE are not set to 1 at the same time
#define IER_RAVIE (0x1 << 0)
#define IER_TIE (0x1 << 1)
#define IER_RLSE (0x1 << 2)
#define IER_MIE (0x1 << 3)
#define IER_RTOIE (0x1 << 4)
#define IER_NRZE (0x1 << 5)
#define IER_UUE (0x1 << 6)
#define IER_DMAE (0x1 << 7)
// Masks for Interrupt Identification Reg. (IIR)
// Note: IIR (read only) is located at the same address as the FCR (write only)
#define IIR_IP (0x1 << 0)
#define IIR_RLS (0x3 << 1)
#define IIR_RDA (0x1 << 2)
#define IIR_TOD (0x3 << 2)
#define IIR_TFIFO (0x1 << 1)
#define IID_MODS (0x0 << 3)
#define IID_FIFOES (0x3 << 6)
// Masks for FIFO Control Register
#define FCR_TRFIFOD (0x0 << 0)
#define FCR_TRFIFOE (0x1 << 0)
#define FCR_RESETRF (0x1 << 1)
#define FCR_RESETTF (0x1 << 2)
#define FCR_ITL1 (0x0 << 7)
#define FCR_ITL8 (0x1 << 6)
#define FCR_ITL16 (0x1 << 7)
#define FCR_ITL32 (0x3 << 6)
#define FCR_ENABLED (FCR_TRFIFOE | FCR_RESETRF | FCR_RESETTF)
// Masks for Line Control Reg. (LCR)
#define LCR_WLS5 (0x0 << 0)
#define LCR_WLS6 (0x1 << 0)
#define LCR_WLS7 (0x1 << 1)
#define LCR_WLS8 (0x3 << 0)
#define LCR_STB (0x1 << 2)
#define LCR_PEN (0x1 << 3)
#define LCR_EPSO (0x1 << 4)
#define LCR_EPSE (0x0 << 4)
#define LCR_STKYP (0x1 << 5)
#define LCR_SB (0x1 << 6)
#define LCR_DLAB1 (0x1 << 7)
// Masks for Line Status Reg. (LSR)
#define LSR_DR (0x1 << 0)
#define LSR_OE (0x1 << 1)
#define LSR_PE (0x1 << 2)
#define LSR_FE (0x1 << 3)
#define LSR_BI (0x1 << 4)
#define LSR_TDRQ (0x1 << 5)
#define LSR_TEMT (0x1 << 6)
#define LSR_FIFOE (0x1 << 7)
// Masks for Modem Control Reg.
#define MCR_DTR (0x1 << 0)
#define MCR_RTS (0x1 << 1)
#define MCR_OUT1 (0x1 << 2)
#define MCR_OUT2 (0x1 << 3)
#define MCR_LOOP (0x1 << 4)
// Masks for Modem Status Reg. (MSR)
#define MSR_DCTS (0x1 << 0)
#define MSR_DDSR (0x1 << 1)
#define MSR_PE (0x1 << 2)
#define MSR_FE (0x1 << 3)
#define MSR_BI (0x1 << 4)
#define MSR_TDRQ (0x1 << 5)
#define MSR_TEMT (0x1 << 6)
#define MSR_FIFOE (0x1 << 7)
// Masks for Infrared Selection Reg. (ISR)
#define ISR_XMITIR (0x1 << 0)
#define ISR_RCVEIR (0x1 << 1)
#define ISR_XMODE (0x1 << 2)
#define ISR_TXPL (0x1 << 3)
#define ISR_RXPL (0x1 << 4)
// Minimum values of divisors programmed in divisor latch reg.
#define FFDIVISOR_MIN 4 // FFUART divisor
#define BTDIVISOR_MIN 1 // BTUART divisor
#define STDIVISOR_MIN 4 // STUART divisor
#define RETRY 10
#define FFUARTREG_BASE (0x40100000) // FFUART Base Register Location
#define BTUARTREG_BASE (0x40200000) // BTUART Base Register Location
#define STUARTREG_BASE (0x40700000) // STUART Base Register Location
typedef struct bufInfo_S {
char * buf;
void * param;
int len;
} bufInfo_T;
typedef enum UartLoopbackMode_E
{
UartLoopbackOff = 0,
UartLoopbackOn = 1
} UartLoopbackMode_T;
typedef enum UartType_E
{
FFUartType = 0,
BTUartType,
STUartType,
SystemUart = 0xff
} UartType_T;
// UART configuration structure
// This structure is used by the hardware setup function
// to confiqure UART
/*
maskFIFO is used to choose FIFO or non-FIFO mode and
set interrupt trigger level in FIFO mode,
this mask will be applied to FCR register
maskInt is used to enable or disable DMA, NRZ and IRQs,
this mask will be applied to IER register
maskSerial is used to congiqure serial data format,
this mask will be aplied to LCR register
maskIRDA is used to confiqure slow infrared operation,
this mask will be aplied to ISR register.
(it will be used only with STUART)
loopback is used to set test mode
0 for normal UART operation
1 for test mode
rate is used to confiqure the baud rate generator.
Value of baud rate.
*/
typedef struct UartCfgS {
int maskFIFO;
int maskInt;
int maskSerial;
int maskIRDA;
int loopback;
int rate;
} UartCfgT;
// DMA configuration structure
// Used to configure DMA to service UARTs
typedef struct UartDmaCfgS {
int descNum; // Number of the descriptors in the chain
int xferLength; // Length of the transfer for each of the descriptors, bytes
int sourceName; // Name of the source (see xsdma.h)
int targetName; // Name of the target (see xsdma.h)
int priority; // Channel's priority
} UartDmaCfgT;
// UART test.
void TestUARTs(void);
// UART interface
typedef void (*UartCallbackT) (int reason, char *buf, void *param);
typedef int (*UartSetupT) (void * ctxP);
typedef int (*UartCleanupT) (void * ctxP);
typedef int (*UartTransmitT) (void * ctxP, char *buf, int len, void *param);
typedef int (*UartReceiveT) (void * ctxP, char *buf, int len, void *param);
typedef int (*UartSetCallbackT) (void * ctxP, UartCallbackT func, int reason);
typedef int (*UartLoopbackT) (void * ctxP, int data);
typedef int (*UartWriteT) (void * ctxP, char *buf, int len);
typedef int (*UartReadT) (void * ctxP, char *buf, int len);
typedef int (*UartClearRxT) (void * ctxP);
typedef int (*UartClearTxT) (void * ctxP);
// UART Context Structure
typedef struct UartContextS {
UartRegsT * regsP; // Pointer to UART's register base
UartCfgT * uartCfgP; // Pointer to UART's configuration structure
UartDmaCfgT * dmaTxCfgP; // Pointer to DMA Tx configuration structure
UartDmaCfgT * dmaRxCfgP; // Pointer to DMA Rx configuration structure
int loggedError; // Used to report tests and drivers errors
int dmaRxChannel; // DMA channel used to transfer data from UART to memory
int dmaTxChannel; // DMA channel used to transfer data from memory to UART
int type; // Used to mark uart as a system device
// Pint descriptorDma; // Pointer to the descriptor chain (logical address)
// Pint xmitDmaSourceP; // Pointer to the DMA Tx Source buffer (logical address)
// Pint rcvDmaTargetP; // Pointer to the DMA Rx Target buffer (logical address)
UartSetupT setupUartFnP; // Pointer to UART's hardware setup function
UartCleanupT shutdownUartFnP; // Pointer to UART's cleanup function
UartLoopbackT loopbackUartFnP; // Pointer to UART's loopback function
UartWriteT writeUartFnP; // Pointer to UART's write function
UartReadT readUartFnP; // Pointer to UART's read function
UartClearTxT clearTxUartFnP; // Pointer to UART's clear Tx. FIFO function
UartClearRxT clearRxUartFnP; // Pointer to UART's clear Rx. FIFO function
UartTransmitT xmitUartFnP; // Pointer to UART's transmit via DMA function
UartReceiveT recvUartFnP; // Pointer to UART's receive via DMA function
UartSetCallbackT setCallbackUartFnP; // Pointer to UART's setCallback function
UartCallbackT rcvCallbackUartFnP; // Pointer to UART's rcvCallback function
UartCallbackT xmitCallbackUartFnP; // Pointer to UART's xmitCallback function
} UartContextT;
#endif /* _xsuart_h */
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