enc28j60_8h-source.html

avr cpu 库源代码 对avr单片机编程很有帮助

00099 <span class="preprocessor">#define MACON1      (0x00|0x40|0x80)</span>
00100 <span class="preprocessor"></span><span class="preprocessor">#define MACON2      (0x01|0x40|0x80)</span>
00101 <span class="preprocessor"></span><span class="preprocessor">#define MACON3      (0x02|0x40|0x80)</span>
00102 <span class="preprocessor"></span><span class="preprocessor">#define MACON4      (0x03|0x40|0x80)</span>
00103 <span class="preprocessor"></span><span class="preprocessor">#define MABBIPG     (0x04|0x40|0x80)</span>
00104 <span class="preprocessor"></span><span class="preprocessor">#define MAIPGL      (0x06|0x40|0x80)</span>
00105 <span class="preprocessor"></span><span class="preprocessor">#define MAIPGH      (0x07|0x40|0x80)</span>
00106 <span class="preprocessor"></span><span class="preprocessor">#define MACLCON1    (0x08|0x40|0x80)</span>
00107 <span class="preprocessor"></span><span class="preprocessor">#define MACLCON2    (0x09|0x40|0x80)</span>
00108 <span class="preprocessor"></span><span class="preprocessor">#define MAMXFLL     (0x0A|0x40|0x80)</span>
00109 <span class="preprocessor"></span><span class="preprocessor">#define MAMXFLH     (0x0B|0x40|0x80)</span>
00110 <span class="preprocessor"></span><span class="preprocessor">#define MAPHSUP     (0x0D|0x40|0x80)</span>
00111 <span class="preprocessor"></span><span class="preprocessor">#define MICON       (0x11|0x40|0x80)</span>
00112 <span class="preprocessor"></span><span class="preprocessor">#define MICMD       (0x12|0x40|0x80)</span>
00113 <span class="preprocessor"></span><span class="preprocessor">#define MIREGADR    (0x14|0x40|0x80)</span>
00114 <span class="preprocessor"></span><span class="preprocessor">#define MIWRL       (0x16|0x40|0x80)</span>
00115 <span class="preprocessor"></span><span class="preprocessor">#define MIWRH       (0x17|0x40|0x80)</span>
00116 <span class="preprocessor"></span><span class="preprocessor">#define MIRDL       (0x18|0x40|0x80)</span>
00117 <span class="preprocessor"></span><span class="preprocessor">#define MIRDH       (0x19|0x40|0x80)</span>
00118 <span class="preprocessor"></span><span class="comment">// Bank 3 registers</span>
00119 <span class="preprocessor">#define MAADR1      (0x00|0x60|0x80)</span>
00120 <span class="preprocessor"></span><span class="preprocessor">#define MAADR0      (0x01|0x60|0x80)</span>
00121 <span class="preprocessor"></span><span class="preprocessor">#define MAADR3      (0x02|0x60|0x80)</span>
00122 <span class="preprocessor"></span><span class="preprocessor">#define MAADR2      (0x03|0x60|0x80)</span>
00123 <span class="preprocessor"></span><span class="preprocessor">#define MAADR5      (0x04|0x60|0x80)</span>
00124 <span class="preprocessor"></span><span class="preprocessor">#define MAADR4      (0x05|0x60|0x80)</span>
00125 <span class="preprocessor"></span><span class="preprocessor">#define EBSTSD      (0x06|0x60)</span>
00126 <span class="preprocessor"></span><span class="preprocessor">#define EBSTCON     (0x07|0x60)</span>
00127 <span class="preprocessor"></span><span class="preprocessor">#define EBSTCSL     (0x08|0x60)</span>
00128 <span class="preprocessor"></span><span class="preprocessor">#define EBSTCSH     (0x09|0x60)</span>
00129 <span class="preprocessor"></span><span class="preprocessor">#define MISTAT      (0x0A|0x60|0x80)</span>
00130 <span class="preprocessor"></span><span class="preprocessor">#define EREVID      (0x12|0x60)</span>
00131 <span class="preprocessor"></span><span class="preprocessor">#define ECOCON      (0x15|0x60)</span>
00132 <span class="preprocessor"></span><span class="preprocessor">#define EFLOCON     (0x17|0x60)</span>
00133 <span class="preprocessor"></span><span class="preprocessor">#define EPAUSL      (0x18|0x60)</span>
00134 <span class="preprocessor"></span><span class="preprocessor">#define EPAUSH      (0x19|0x60)</span>
00135 <span class="preprocessor"></span><span class="comment">// PHY registers</span>
00136 <span class="preprocessor">#define PHCON1      0x00</span>
00137 <span class="preprocessor"></span><span class="preprocessor">#define PHSTAT1     0x01</span>
00138 <span class="preprocessor"></span><span class="preprocessor">#define PHHID1      0x02</span>
00139 <span class="preprocessor"></span><span class="preprocessor">#define PHHID2      0x03</span>
00140 <span class="preprocessor"></span><span class="preprocessor">#define PHCON2      0x10</span>
00141 <span class="preprocessor"></span><span class="preprocessor">#define PHSTAT2     0x11</span>
00142 <span class="preprocessor"></span><span class="preprocessor">#define PHIE        0x12</span>
00143 <span class="preprocessor"></span><span class="preprocessor">#define PHIR        0x13</span>
00144 <span class="preprocessor"></span><span class="preprocessor">#define PHLCON      0x14</span>
00145 <span class="preprocessor"></span>
00146 <span class="comment">// ENC28J60 EIE Register Bit Definitions</span>
00147 <span class="preprocessor">#define EIE_INTIE       0x80</span>
00148 <span class="preprocessor"></span><span class="preprocessor">#define EIE_PKTIE       0x40</span>
00149 <span class="preprocessor"></span><span class="preprocessor">#define EIE_DMAIE       0x20</span>
00150 <span class="preprocessor"></span><span class="preprocessor">#define EIE_LINKIE      0x10</span>
00151 <span class="preprocessor"></span><span class="preprocessor">#define EIE_TXIE        0x08</span>
00152 <span class="preprocessor"></span><span class="preprocessor">#define EIE_WOLIE       0x04</span>
00153 <span class="preprocessor"></span><span class="preprocessor">#define EIE_TXERIE      0x02</span>
00154 <span class="preprocessor"></span><span class="preprocessor">#define EIE_RXERIE      0x01</span>
00155 <span class="preprocessor"></span><span class="comment">// ENC28J60 EIR Register Bit Definitions</span>
00156 <span class="preprocessor">#define EIR_PKTIF       0x40</span>
00157 <span class="preprocessor"></span><span class="preprocessor">#define EIR_DMAIF       0x20</span>
00158 <span class="preprocessor"></span><span class="preprocessor">#define EIR_LINKIF      0x10</span>
00159 <span class="preprocessor"></span><span class="preprocessor">#define EIR_TXIF        0x08</span>
00160 <span class="preprocessor"></span><span class="preprocessor">#define EIR_WOLIF       0x04</span>
00161 <span class="preprocessor"></span><span class="preprocessor">#define EIR_TXERIF      0x02</span>
00162 <span class="preprocessor"></span><span class="preprocessor">#define EIR_RXERIF      0x01</span>
00163 <span class="preprocessor"></span><span class="comment">// ENC28J60 ESTAT Register Bit Definitions</span>
00164 <span class="preprocessor">#define ESTAT_INT       0x80</span>
00165 <span class="preprocessor"></span><span class="preprocessor">#define ESTAT_LATECOL   0x10</span>
00166 <span class="preprocessor"></span><span class="preprocessor">#define ESTAT_RXBUSY    0x04</span>
00167 <span class="preprocessor"></span><span class="preprocessor">#define ESTAT_TXABRT    0x02</span>
00168 <span class="preprocessor"></span><span class="preprocessor">#define ESTAT_CLKRDY    0x01</span>
00169 <span class="preprocessor"></span><span class="comment">// ENC28J60 ECON2 Register Bit Definitions</span>
00170 <span class="preprocessor">#define ECON2_AUTOINC   0x80</span>
00171 <span class="preprocessor"></span><span class="preprocessor">#define ECON2_PKTDEC    0x40</span>
00172 <span class="preprocessor"></span><span class="preprocessor">#define ECON2_PWRSV     0x20</span>
00173 <span class="preprocessor"></span><span class="preprocessor">#define ECON2_VRPS      0x08</span>
00174 <span class="preprocessor"></span><span class="comment">// ENC28J60 ECON1 Register Bit Definitions</span>
00175 <span class="preprocessor">#define ECON1_TXRST     0x80</span>
00176 <span class="preprocessor"></span><span class="preprocessor">#define ECON1_RXRST     0x40</span>
00177 <span class="preprocessor"></span><span class="preprocessor">#define ECON1_DMAST     0x20</span>
00178 <span class="preprocessor"></span><span class="preprocessor">#define ECON1_CSUMEN    0x10</span>
00179 <span class="preprocessor"></span><span class="preprocessor">#define ECON1_TXRTS     0x08</span>
00180 <span class="preprocessor"></span><span class="preprocessor">#define ECON1_RXEN      0x04</span>
00181 <span class="preprocessor"></span><span class="preprocessor">#define ECON1_BSEL1     0x02</span>
00182 <span class="preprocessor"></span><span class="preprocessor">#define ECON1_BSEL0     0x01</span>
00183 <span class="preprocessor"></span><span class="comment">// ENC28J60 MACON1 Register Bit Definitions</span>
00184 <span class="preprocessor">#define MACON1_LOOPBK   0x10</span>
00185 <span class="preprocessor"></span><span class="preprocessor">#define MACON1_TXPAUS   0x08</span>
00186 <span class="preprocessor"></span><span class="preprocessor">#define MACON1_RXPAUS   0x04</span>
00187 <span class="preprocessor"></span><span class="preprocessor">#define MACON1_PASSALL  0x02</span>
00188 <span class="preprocessor"></span><span class="preprocessor">#define MACON1_MARXEN   0x01</span>
00189 <span class="preprocessor"></span><span class="comment">// ENC28J60 MACON2 Register Bit Definitions</span>
00190 <span class="preprocessor">#define MACON2_MARST    0x80</span>
00191 <span class="preprocessor"></span><span class="preprocessor">#define MACON2_RNDRST   0x40</span>
00192 <span class="preprocessor"></span><span class="preprocessor">#define MACON2_MARXRST  0x08</span>
00193 <span class="preprocessor"></span><span class="preprocessor">#define MACON2_RFUNRST  0x04</span>
00194 <span class="preprocessor"></span><span class="preprocessor">#define MACON2_MATXRST  0x02</span>
00195 <span class="preprocessor"></span><span class="preprocessor">#define MACON2_TFUNRST  0x01</span>
00196 <span class="preprocessor"></span><span class="comment">// ENC28J60 MACON3 Register Bit Definitions</span>
00197 <span class="preprocessor">#define MACON3_PADCFG2  0x80</span>
00198 <span class="preprocessor"></span><span class="preprocessor">#define MACON3_PADCFG1  0x40</span>
00199 <span class="preprocessor"></span><span class="preprocessor">#define MACON3_PADCFG0  0x20</span>
00200 <span class="preprocessor"></span><span class="preprocessor">#define MACON3_TXCRCEN  0x10</span>
00201 <span class="preprocessor"></span><span class="preprocessor">#define MACON3_PHDRLEN  0x08</span>
00202 <span class="preprocessor"></span><span class="preprocessor">#define MACON3_HFRMLEN  0x04</span>
00203 <span class="preprocessor"></span><span class="preprocessor">#define MACON3_FRMLNEN  0x02</span>
00204 <span class="preprocessor"></span><span class="preprocessor">#define MACON3_FULDPX   0x01</span>
00205 <span class="preprocessor"></span><span class="comment">// ENC28J60 MICMD Register Bit Definitions</span>