📄 initial.c.bak
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void initial()
{
asm(" setc INTM"); /*disable general interrupters*/
asm(" clrc SXM"); /*抑制符号位扩展*/
asm(" clrc OVM"); /*累加器结果正常溢出*/
asm(" clrc CNF"); /*CNF=0 see wonee.cmd*/
*SCSR1=0x8F; /*IOPE0 valid see MCRC configuration(I/O mux control register)
IOPE0 can also be configured as CLOCKOUT pin*/
/*low power mode: IDLE1*/
/*system clock=PLL*Fin=4*10=40M */
/*enable ADC EVA EVB CLOCK*/
/*disable SCI SPI CAN CLOCK*/
/*clear ILLADR*/
#ifdef DEBUG
*SCSR2=0x000F;
/*input pulse signal should last 5 clock periods before being recongnized by DSP*/
/*user can disable WD in software,see bit WDDIS in register WDCR */
/*external memory interface working in normal mode*/
/*forbidden boot ROM*/
/*MP mode, when DSP working in DEBUG mode*/
/*PON=1 DON=1 see wonee.cmd*/
#else
*SCSR2=0x000B;
/*MC mode, when DSP working in NORMAL mode*/
/*other same as the former*/
#endif
*IMR=0x0000; /*open int2*/
*IFR=0x0FFFF; /*clear all interrupters' flags*/
*WDCR=0x0EB; /*disable WD in software*/
/*overload time is 13.1ms*/
/*when DSP working 40M*/
/*E8--3.28ms,EA--6.6ms,EB--13.1ms,EC--26.2ms*/
/*ED--52.4ms,EE--104.9ms,EF--209.7ms*/
/* *XINT1CR= */
/* *XINT2CR= */
/*** cofigurate shared pins ***/
*MCRA = 0x0ffff;
/* bit 15 0=IOPB7, 1=TCLKINA
bit 14 0=IOPB6, 1=TDIRA
bit 13 IIC_SDA 0=IOPB5, 1=T2PWM/T2CMP
bit 12 IIC_SCL 0=IOPB4, 1=T1PWM/T1CMP
bit 11 PWM6 0=IOPB3, 1=PWM6
bit 10 PWM5 0=IOPB2, 1=PWM5
bit 9 PWM4 0=IOPB1, 1=PWM4
bit 8 PWM3 0=IOPB0, 1=PWM3
bit 7 PWM2 0=IOPA7, 1=PWM2
bit 6 PWM1 0=IOPA6, 1=PWM1
bit 5 0=IOPA5, 1=CAP3
bit 4 ENCODER_Y 0=IOPA4, 1=CAP2/QEP2
bit 3 ENCODER_X 0=IOPA3, 1=CAP1/QEP1
bit 2 0=IOPA2, 1=XINT1
bit 1 SCIRXD 0=IOPA1, 1=SCIRXD
bit 0 SCITXD 0=IOPA0, 1=SCITXD */
/* *MCRB = 0xFFFC; new configure*/
*MCRB = 0x0ff00; /*old configure*/
/* bit 15 1_ 0=reserved, 1=TMS2 (always write as 1)
bit 14 1_ 0=reserved, 1=TMS (always write as 1)
bit 13 1_ 0=reserved, 1=TD0 (always write as 1)
bit 12 1_ 0=reserved, 1=TDI (always write as 1)
bit 11 1_ 0=reserved, 1=TCK (always write as 1)
bit 10 1_ 0=reserved, 1=EMU1 (always write as 1)
bit 9 1_ 0=reserved, 1=EMU0 (always write as 1)
bit 8 I_DC_SOC --->0=IOPD0, 1=XINT2/ADCSOC
bit 7 1_ 0=IOPC7, 1=CANRX
bit 6 1_ 0=IOPC6, 1=CANTX
bit 5 1_ 0=IOPC5, 1=SPISTE
bit 4 1_ 0=IOPC4, 1=SPICLK
bit 3 jumper4 --->0=IOPC3, 1=SPISOMI
bit 2 jumper3 --->0=IOPC2, 1=SPISIMO
bit 1 jumper2 --->0=IOPC1, 1=B\I\O\
bit 0 jumper1 --->0=IOPC0, 1=W/R\ */
*MCRC = 0x282A;
/* bit 15 reserved
bit 14 dout --->0=IOPF6, 1=IOPF6
bit 13 Load <--- 0=IOPF5, 1=TCLKINB
bit 12 din <--- 0=IOPF4, 1=TDIRB
bit 11 dck <--- 0=IOPF3, 1=T4PWM/T4CMP
bit 10 ERR <--- 0=IOPF2, 1=T3PWM/T3CMP
bit 9 DCL <--- 0=IOPF1, 1=CAP6
bit 8 DOL <--- 0=IOPF0, 1=CAP5/QEP4
bit 7 DO --->0=IOPE7, 1=CAP4/QEP3
bit 6 DC --->0=IOPE6, 1=PWM12
bit 5 DS --->0=IOPE5, 1=PWM11
bit 4 DOL_IN1 --->0=IOPE4, 1=PWM10
bit 3 DCL_IN1 --->0=IOPE3, 1=PWM9
bit 2 DOL_IN2 --->0=IOPE2, 1=PWM8
bit 1 DCL_IN2 --->0=IOPE1, 1=PWM7
bit 0 IPM_EN <--- 0=IOPE0, 1=CLKOUT */
/*** Initial IO Ports ** */
/*HIGH 8 BITS:1=OUTPUT;
0=INPUT
LOW 8 BITS:1=INPUT HIGH
0=INPUT LOW */
*PBDATDIR = (*PBDATDIR|0x1010)&0xFFEF;
*PADATDIR = (*PADATDIR|0x0000)&0xFFDF;
*PCDATDIR = (*PCDATDIR|0x0F00)&0xFFFF;
*PFDATDIR = (*PEDATDIR|0x3F00)&0xFF00;
*PEDATDIR = (*PEDATDIR|0x0101)&0xFFFF;
}
*EVAIFRA=0xFFFF; /*clear interrupter flag */
*EVAIFRB=0xFFFF;
*EVAIFRC=0xFFFF;
*EVAIMRA=0x0201; /*open T1UFINT & PDPINTA */
*EVAIMRB=0x0000;
*EVAIMRC=0x0000;
*ACTRA=0x9999;
*EVBIFRA=0xFFFF; /*clear interrupter flag */
*EVBIFRB=0xFFFF;
*EVBIFRC=0xFFFF;
*EVBIMRA=0x0081; /*open T3PINT & PDPINTB */
*EVBIMRB=0x0000;
/* *EVBIMRB=0x0001; open T4PINT */
*EVBIMRC=0x0000;
*ACTRB=0x9999; /*pwm11 active low*/
*T1PR=2000;
*CMPR3=500;
*CMPR2=500;
*CMPR1=500;
*DBTCONA=0x5F0; /*dead time=2us */
*DBTCONB=0x5F0;
*COMCONA=0x8200; /*enable PWM1~6 out */
*COMCONB=0x8200; /*enable PWM11 out */
*T1CNT=0x0000;
*T1CON=0x842; /*work mode: continue up&down */
/*time clock: fcpu/1(using internal clock) */
/*T2 T4 use itself enable bit &period register */
/*T1 is enable,running... */
/*enble Timer1's compare operation
if disable Timer1's compare operation
there will be no PWM signal in pin T1PWM */
}
/////////////////////////////////////////////////////////////////////////
/*No.2*/
void adini(void) /* using seq1, seq2 */
{
*ADCTRL1=0x1D80; // 采样时间窗口预定标位ACQ PS3-PS0为D, high-priority interrupter
// 转换时间预定标位CPS为1,AD为启动/停止模式，
// 工作于双排序器方式，且禁止校准与自测
*ADCTRL2=0x4747; // reset SEQ1,SEQ1 is triggered by events of EVA,AD完成后申请中断
// reset SEQ2,SEQ2 is triggered by events of EVB,AD完成后申请中断
*MAXCONV=0x77; // 8 channels per SEQ
*CHSELSEQ1=0xB291;
*CHSELSEQ2=0xE5C3;
*CHSELSEQ3=0x76D4;
*CHSELSEQ4=0x80AF;
}
//////////////////////////////////////////////////////////////////////////
/*No.3*/
void evini(void)
{
*GPTCONA=0xF870; /* T1's under flow event doesn't trigger SEQ1 now */
*GPTCONB=0xF8F8; /* T3's under flow event trigger SEQ2 now */
/* *T1CON=0x0800; T1 doesn't run at present,& T1 compare operation is forbidden */
/* *T2CON=0x1810; T2 clock sourse come from extern pin,&T2 compare operation is forbidden&T2 doesn't run now */
*T3CON=0x0842; /* T3 begin to run...*/
/* *T4CON=0x0802; T4 doesn't run at present,& T4 compare operation is enabled */
*T1CNT=0x0000;
*T2CNT=0x0000;
*T3CNT=0x0000;
*T4CNT=0x0000;
*T1CMPR=0x0000;
*T2CMPR=0x0000;
*T3CMPR=0x0000;
*T4CMPR=0x0000;
*T1PR=2000; /* frequency of carier wave for PWM1-6 is 10kHz(period time=0.1ms) */
/* *T2PR=0x1 ; */
*T3PR=10000; /* frequency of carier wave for PWM11 is 2kHz(period time=0.5ms) */
/* *T4PR=0x5000; */
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