📄 int.lst
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146 {
147 1
148 1
149 1
150 1
151 1
152 1 //mast the transfer interrupt
153 1 if (TI)
154 1 {
155 2 TI=0;
156 2 return;
157 2 }
158 1 //get four bytes of a frame
159 1 RS232_Receive_Buffer=SBUF;
160 1
161 1
162 1 RI=0;
163 1
164 1
165 1 }
166
167
168 #if (IR_SYSTEM==NEC_IR_SYSTEM)
#if( SYSTEM_CRYSTAL ==USE_CRYSTAL_40M)
#define NEC_IR_KEY_VALID_INTERVAL 5 // >(108-9-2.75)/19.6 //crystal=40M
#define NEC_IR_0_BIT_WIDTH 3750 /* //1.125ms/(12/fs*1000)*/
#define NEC_IR_1_BIT_WIDTH 7500 /* //2.25ms/(12/fs*1000)*/
#define NEC_IR_START_BIT_WIDTH 45000 /* //13.5ms/(12/fs*1000)*/
#define NEC_IR_TIME_BIAS 1000 /* //0.3ms/(12/fs*1000)*/
#define NEC_IR_REPEAT_BIT_WIDTH 37500 /*//11.25ms/(12/fs*1000)*/
#define NEC_IR_0_BIT_WIDTH_MIN 2750 //3750-1000
#define NEC_IR_1_BIT_WIDTH_MIN 6500 //7500-1000
C51 COMPILER V8.02 INT 10/16/2006 17:42:27 PAGE 4
#define NEC_IR_START_BIT_WIDTH_MIN 35000 //4500-1000
#define NEC_IR_REPEAT_BIT_WIDTH_MIN 36948 //37500-552
#define NEC_IR_0_BIT_WIDTH_MAX 4750 //3750+1000
#define NEC_IR_1_BIT_WIDTH_MAX 8500 //7500+1000
#define NEC_IR_START_BIT_WIDTH_MAX 46000 //45000+000
#define NEC_IR_REPEAT_BIT_WIDTH_MAX 38052 //37500+552
#elif ( SYSTEM_CRYSTAL ==USE_CRYSTAL_24M598_X2)
//the timer2 max overflow T=15.98ms
#define NEC_IR_KEY_VALID_INTERVAL 7 // >(108-9-2.75)/15.98 //crystal=24.5
-98 X2M=49.196072
#define NEC_IR_0_BIT_WIDTH 4612 /* 1.125ms/(12/fs*1000)*/
#define NEC_IR_1_BIT_WIDTH 9224 /* 2.25ms/(12/fs*1000)*/
#define NEC_IR_START_BIT_WIDTH 55345 /* 13.5ms/(12/fs*1000)*/
#define NEC_IR_TIME_BIAS 1229 /* 0.3ms/(12/fs*1000)*/
#define NEC_IR_REPEAT_BIT_WIDTH 46121 /* 11.25ms/(12/fs*1000)*/
#define NEC_IR_0_BIT_WIDTH_MIN 3612 //4612-1000
#define NEC_IR_1_BIT_WIDTH_MIN 8224 //9224-1000
#define NEC_IR_START_BIT_WIDTH_MIN 54345 //55345-1000
#define NEC_IR_REPEAT_BIT_WIDTH_MIN 45121 //46121-1000
#define NEC_IR_0_BIT_WIDTH_MAX 5712 //4612+1000
#define NEC_IR_1_BIT_WIDTH_MAX 10224 //9224+1000
#define NEC_IR_START_BIT_WIDTH_MAX 56345 //55345+1000
#define NEC_IR_REPEAT_BIT_WIDTH_MAX 47121 //46121+1000
#elif ( SYSTEM_CRYSTAL ==USE_CRYSTAL_40M039_X2)
//the timer2 max overflow T=15.98ms
#define NEC_IR_KEY_VALID_INTERVAL 12 // >(108-9-2.75)/ //crystal=80.078096
#define NEC_IR_0_BIT_WIDTH 7507 /* 1. 125ms/(12/fs)*1000*/
#define NEC_IR_1_BIT_WIDTH 15014 /*2.25ms/(12/fs)*1000*/
//#define NEC_IR_START_BIT_WIDTH 90085 /*13.5ms/(12/fs)*1000*/
//for the X=80.07, the MAX time of TIMER2 is 9.8ms, so the 11.25 mean that a overflow will take place ,the
-n remain 11.25-9.8=1.45ms
#define NEC_IR_REPEAT_BIT_WIDTH 9675 /*(11.25-9.8)ms/(12/fs*1000)*/
//#define NEC_IR_TIME_BIAS 2001 /*0.2ms/(12/fs)*1000)*/
#define NEC_IR_0_BIT_WIDTH_MIN 6007
#define NEC_IR_1_BIT_WIDTH_MIN 13514
//#define NEC_IR_START_BIT_WIDTH_MIN 5000
#define NEC_IR_REPEAT_BIT_WIDTH_MIN 9001
#define NEC_IR_0_BIT_WIDTH_MAX 9000
#define NEC_IR_1_BIT_WIDTH_MAX 16514
C51 COMPILER V8.02 INT 10/16/2006 17:42:27 PAGE 5
//#define NEC_IR_START_BIT_WIDTH_MAX 5800
#define NEC_IR_REPEAT_BIT_WIDTH_MAX 11613
#elif(SYSTEM_CRYSTAL ==USE_CRYSTAL_27M)
#define NEC_IR_KEY_VALID_INTERVAL 4 // >(108-9-2.75)/ //crystal=27
#define NEC_IR_0_BIT_WIDTH 2531 /* 1.125ms/(12/fs)*1000*/
#define NEC_IR_1_BIT_WIDTH 5062 /*2.25ms/(12/fs)*1000*/
//for the X=27, the MAX time of TIMER2 is 28.9ms, so it mean that only one overflow will take place betwee
-n key code part and the repeat part
//then there is 11.25ms bit
#define NEC_IR_REPEAT_BIT_WIDTH 25312 /*11.25ms/(12/fs)*1000*/
//err=0.4ms =900(X=27M)
#define NEC_IR_0_BIT_WIDTH_MIN 1900 // 1600 // 2025
#define NEC_IR_1_BIT_WIDTH_MIN 4100 //4557
#define NEC_IR_REPEAT_BIT_WIDTH_MIN 21000
#define NEC_IR_0_BIT_WIDTH_MAX 3400// 3034
#define NEC_IR_1_BIT_WIDTH_MAX 5900// 5568
#define NEC_IR_REPEAT_BIT_WIDTH_MAX 29000
#else
#define NEC_IR_KEY_VALID_INTERVAL 3 // >(108-9-2.75)/35.7 //crystal=22118M
#define NEC_IR_0_BIT_WIDTH 2073 /* //1.125ms/(12/fs*1000)*/
#define NEC_IR_1_BIT_WIDTH 4147 /* //2.25ms/(12/fs*1000)*/
#define NEC_IR_START_BIT_WIDTH 24882 /*13.5ms/(12/fs*1000)*/
#define NEC_IR_TIME_BIAS 552 /*0.3ms/(12/fs*1000)*/
#define NEC_IR_REPEAT_BIT_WIDTH 20736 /*11.25ms/(12/fs*1000)*/
#define NEC_IR_0_BIT_WIDTH_MIN 1521 //2073-552
#define NEC_IR_1_BIT_WIDTH_MIN 3595 //4147-552
#define NEC_IR_START_BIT_WIDTH_MIN 24330 //24882-552
#define NEC_IR_REPEAT_BIT_WIDTH_MIN 20184 //20736-552
#define NEC_IR_0_BIT_WIDTH_MAX 2625 //2073+552
#define NEC_IR_1_BIT_WIDTH_MAX 4699 //4147+552
#define NEC_IR_START_BIT_WIDTH_MAX 25434 //24882+552
#define NEC_IR_REPEAT_BIT_WIDTH_MAX 21288 //20736+552
#endif
CODE U8 IR_Key_Repeat_Enable_Table[]=
{
0,//KEY_IR_0= 0x00,
0,//KEY_IR_1 = 0x01,
0,//KEY_IR_2 = 0x02,
0,//KEY_IR_3 = 0x03,
0,//KEY_IR_4 = 0x04,
0,//KEY_IR_5 = 0x05,
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