📄 main.lss
字号:
{
SPI_ENABLE();
188: c0 98 cbi 0x18, 0 ; 24
NOP();
18a: 00 00 nop
while(MISO_1);
18c: b3 99 sbic 0x16, 3 ; 22
18e: fe cf rjmp .-4 ; 0x18c <TI_CC_SpiStrobe+0x4>
NOP();
190: 00 00 nop
SPI_TX(strobe);
192: 8f b9 out 0x0f, r24 ; 15
194: 77 9b sbis 0x0e, 7 ; 14
196: fe cf rjmp .-4 ; 0x194 <TI_CC_SpiStrobe+0xc>
NOP();
198: 00 00 nop
SPI_DISABLE();
19a: c0 9a sbi 0x18, 0 ; 24
19c: 08 95 ret
0000019e <TI_CC_SpiWriteReg>:
}// TI_CC_SpiStrobe
//-------------------------------------------------------------------------------------------------------
// void TI_CC_SpiWriteReg(BYTE addr, BYTE value)
// 写单个寄存器
// DESCRIPTION:
// Function for writing to a single CCxxx0 register
//
// ARGUMENTS:
// BYTE addr
// Address of a specific CCxxx0 register to accessed.
// BYTE value
// Value to be written to the specified CCxxx0 register.
//-------------------------------------------------------------------------------------------------------
void TI_CC_SpiWriteReg(BYTE addr, BYTE value)
{
SPI_ENABLE();
19e: c0 98 cbi 0x18, 0 ; 24
NOP();
1a0: 00 00 nop
while(MISO_1);
1a2: b3 99 sbic 0x16, 3 ; 22
1a4: fe cf rjmp .-4 ; 0x1a2 <TI_CC_SpiWriteReg+0x4>
NOP();
1a6: 00 00 nop
SPI_TX(addr);
1a8: 8f b9 out 0x0f, r24 ; 15
1aa: 77 9b sbis 0x0e, 7 ; 14
1ac: fe cf rjmp .-4 ; 0x1aa <TI_CC_SpiWriteReg+0xc>
SPI_TX(value);
1ae: 6f b9 out 0x0f, r22 ; 15
1b0: 77 9b sbis 0x0e, 7 ; 14
1b2: fe cf rjmp .-4 ; 0x1b0 <TI_CC_SpiWriteReg+0x12>
NOP();
1b4: 00 00 nop
SPI_DISABLE();
1b6: c0 9a sbi 0x18, 0 ; 24
1b8: 08 95 ret
000001ba <TI_CC_SpiWriteBurstReg>:
}// TI_CC_SpiWriteReg
//-------------------------------------------------------------------------------------------------------
// void TI_CC_SpiWriteBurstReg(BYTE addr, BYTE *buffer, BYTE count)
// 写多个寄存器
// DESCRIPTION:
// This function writes to multiple CCxxx0 register, using SPI burst access.
//
// ARGUMENTS:
// BYTE addr
// Address of the first CCxxx0 register to be accessed.
// BYTE *buffer
// Array of bytes to be written into a corresponding range of
// CCxx00 registers, starting by the address specified in _addr_.
// BYTE count
// Number of bytes to be written to the subsequent CCxxx0 registers.
//-------------------------------------------------------------------------------------------------------
void TI_CC_SpiWriteBurstReg(BYTE addr, BYTE *buffer, BYTE count)
{
UINT8 i;
SPI_ENABLE();
1ba: c0 98 cbi 0x18, 0 ; 24
while((MISO_1));
1bc: b3 99 sbic 0x16, 3 ; 22
1be: fe cf rjmp .-4 ; 0x1bc <TI_CC_SpiWriteBurstReg+0x2>
SPI_TX(addr | WRITE_BURST);
1c0: 80 64 ori r24, 0x40 ; 64
1c2: 8f b9 out 0x0f, r24 ; 15
1c4: 77 9b sbis 0x0e, 7 ; 14
1c6: fe cf rjmp .-4 ; 0x1c4 <TI_CC_SpiWriteBurstReg+0xa>
for (i = 0; i < count; i++)
1c8: 90 e0 ldi r25, 0x00 ; 0
1ca: 94 17 cp r25, r20
1cc: 48 f4 brcc .+18 ; 0x1e0 <TI_CC_SpiWriteBurstReg+0x26>
{
SPI_TX(buffer[i]);
1ce: fb 01 movw r30, r22
1d0: e9 0f add r30, r25
1d2: f1 1d adc r31, r1
1d4: 80 81 ld r24, Z
1d6: 8f b9 out 0x0f, r24 ; 15
1d8: 77 9b sbis 0x0e, 7 ; 14
1da: fe cf rjmp .-4 ; 0x1d8 <TI_CC_SpiWriteBurstReg+0x1e>
1dc: 9f 5f subi r25, 0xFF ; 255
1de: f5 cf rjmp .-22 ; 0x1ca <TI_CC_SpiWriteBurstReg+0x10>
}
SPI_DISABLE();
1e0: c0 9a sbi 0x18, 0 ; 24
1e2: 08 95 ret
000001e4 <TI_CC_RfWriteRfSettings>:
}// TI_CC_SpiWriteBurstReg
//-------------------------------------------------------------------------------------------------------
// void RfWriteRfSettings(RF_SETTINGS *pRfSettings)
// 设置寄存器
// DESCRIPTION:
// This function is used to configure the CC2500 based on a given rf setting
//
// ARGUMENTS:
// RF_SETTINGS *pRfSettings
// Pointer to a struct containing rf register settings
//-------------------------------------------------------------------------------------------------------
void TI_CC_RfWriteRfSettings(RF_SETTINGS *pRfSettings)
{
1e4: 0f 93 push r16
1e6: 1f 93 push r17
1e8: 8c 01 movw r16, r24
// Write register settings
TI_CC_SpiWriteReg(CCxxx0_FSCTRL1, pRfSettings->FSCTRL1);
1ea: fc 01 movw r30, r24
1ec: 60 81 ld r22, Z
1ee: 8b e0 ldi r24, 0x0B ; 11
1f0: 0e 94 cf 00 call 0x19e <TI_CC_SpiWriteReg>
TI_CC_SpiWriteReg(CCxxx0_FSCTRL0, pRfSettings->FSCTRL0);
1f4: f8 01 movw r30, r16
1f6: 61 81 ldd r22, Z+1 ; 0x01
1f8: 8c e0 ldi r24, 0x0C ; 12
1fa: 0e 94 cf 00 call 0x19e <TI_CC_SpiWriteReg>
TI_CC_SpiWriteReg(CCxxx0_FREQ2, pRfSettings->FREQ2);
1fe: f8 01 movw r30, r16
200: 62 81 ldd r22, Z+2 ; 0x02
202: 8d e0 ldi r24, 0x0D ; 13
204: 0e 94 cf 00 call 0x19e <TI_CC_SpiWriteReg>
TI_CC_SpiWriteReg(CCxxx0_FREQ1, pRfSettings->FREQ1);
208: f8 01 movw r30, r16
20a: 63 81 ldd r22, Z+3 ; 0x03
20c: 8e e0 ldi r24, 0x0E ; 14
20e: 0e 94 cf 00 call 0x19e <TI_CC_SpiWriteReg>
TI_CC_SpiWriteReg(CCxxx0_FREQ0, pRfSettings->FREQ0);
212: f8 01 movw r30, r16
214: 64 81 ldd r22, Z+4 ; 0x04
216: 8f e0 ldi r24, 0x0F ; 15
218: 0e 94 cf 00 call 0x19e <TI_CC_SpiWriteReg>
TI_CC_SpiWriteReg(CCxxx0_MDMCFG4, pRfSettings->MDMCFG4);
21c: f8 01 movw r30, r16
21e: 65 81 ldd r22, Z+5 ; 0x05
220: 80 e1 ldi r24, 0x10 ; 16
222: 0e 94 cf 00 call 0x19e <TI_CC_SpiWriteReg>
TI_CC_SpiWriteReg(CCxxx0_MDMCFG3, pRfSettings->MDMCFG3);
226: f8 01 movw r30, r16
228: 66 81 ldd r22, Z+6 ; 0x06
22a: 81 e1 ldi r24, 0x11 ; 17
22c: 0e 94 cf 00 call 0x19e <TI_CC_SpiWriteReg>
TI_CC_SpiWriteReg(CCxxx0_MDMCFG2, pRfSettings->MDMCFG2);
230: f8 01 movw r30, r16
232: 67 81 ldd r22, Z+7 ; 0x07
234: 82 e1 ldi r24, 0x12 ; 18
236: 0e 94 cf 00 call 0x19e <TI_CC_SpiWriteReg>
TI_CC_SpiWriteReg(CCxxx0_MDMCFG1, pRfSettings->MDMCFG1);
23a: f8 01 movw r30, r16
23c: 60 85 ldd r22, Z+8 ; 0x08
23e: 83 e1 ldi r24, 0x13 ; 19
240: 0e 94 cf 00 call 0x19e <TI_CC_SpiWriteReg>
TI_CC_SpiWriteReg(CCxxx0_MDMCFG0, pRfSettings->MDMCFG0);
244: f8 01 movw r30, r16
246: 61 85 ldd r22, Z+9 ; 0x09
248: 84 e1 ldi r24, 0x14 ; 20
24a: 0e 94 cf 00 call 0x19e <TI_CC_SpiWriteReg>
TI_CC_SpiWriteReg(CCxxx0_CHANNR, pRfSettings->CHANNR);
24e: f8 01 movw r30, r16
250: 62 85 ldd r22, Z+10 ; 0x0a
252: 8a e0 ldi r24, 0x0A ; 10
254: 0e 94 cf 00 call 0x19e <TI_CC_SpiWriteReg>
TI_CC_SpiWriteReg(CCxxx0_DEVIATN, pRfSettings->DEVIATN);
258: f8 01 movw r30, r16
25a: 63 85 ldd r22, Z+11 ; 0x0b
25c: 85 e1 ldi r24, 0x15 ; 21
25e: 0e 94 cf 00 call 0x19e <TI_CC_SpiWriteReg>
TI_CC_SpiWriteReg(CCxxx0_FREND1, pRfSettings->FREND1);
262: f8 01 movw r30, r16
264: 64 85 ldd r22, Z+12 ; 0x0c
266: 81 e2 ldi r24, 0x21 ; 33
268: 0e 94 cf 00 call 0x19e <TI_CC_SpiWriteReg>
TI_CC_SpiWriteReg(CCxxx0_FREND0, pRfSettings->FREND0);
26c: f8 01 movw r30, r16
26e: 65 85 ldd r22, Z+13 ; 0x0d
270: 82 e2 ldi r24, 0x22 ; 34
272: 0e 94 cf 00 call 0x19e <TI_CC_SpiWriteReg>
TI_CC_SpiWriteReg(CCxxx0_MCSM0 , pRfSettings->MCSM0 );
276: f8 01 movw r30, r16
278: 66 85 ldd r22, Z+14 ; 0x0e
27a: 88 e1 ldi r24, 0x18 ; 24
27c: 0e 94 cf 00 call 0x19e <TI_CC_SpiWriteReg>
TI_CC_SpiWriteReg(CCxxx0_FOCCFG, pRfSettings->FOCCFG);
280: f8 01 movw r30, r16
282: 67 85 ldd r22, Z+15 ; 0x0f
284: 89 e1 ldi r24, 0x19 ; 25
286: 0e 94 cf 00 call 0x19e <TI_CC_SpiWriteReg>
TI_CC_SpiWriteReg(CCxxx0_BSCFG, pRfSettings->BSCFG);
28a: f8 01 movw r30, r16
28c: 60 89 ldd r22, Z+16 ; 0x10
28e: 8a e1 ldi r24, 0x1A ; 26
290: 0e 94 cf 00 call 0x19e <TI_CC_SpiWriteReg>
TI_CC_SpiWriteReg(CCxxx0_AGCCTRL2, pRfSettings->AGCCTRL2);
294: f8 01 movw r30, r16
296: 61 89 ldd r22, Z+17 ; 0x11
298: 8b e1 ldi r24, 0x1B ; 27
29a: 0e 94 cf 00 call 0x19e <TI_CC_SpiWriteReg>
TI_CC_SpiWriteReg(CCxxx0_AGCCTRL1, pRfSettings->AGCCTRL1);
29e: f8 01 movw r30, r16
2a0: 62 89 ldd r22, Z+18 ; 0x12
2a2: 8c e1 ldi r24, 0x1C ; 28
2a4: 0e 94 cf 00 call 0x19e <TI_CC_SpiWriteReg>
TI_CC_SpiWriteReg(CCxxx0_AGCCTRL0, pRfSettings->AGCCTRL0);
2a8: f8 01 movw r30, r16
2aa: 63 89 ldd r22, Z+19 ; 0x13
2ac: 8d e1 ldi r24, 0x1D ; 29
2ae: 0e 94 cf 00 call 0x19e <TI_CC_SpiWriteReg>
TI_CC_SpiWriteReg(CCxxx0_FSCAL3, pRfSettings->FSCAL3);
2b2: f8 01 movw r30, r16
2b4: 64 89 ldd r22, Z+20 ; 0x14
2b6: 83 e2 ldi r24, 0x23 ; 35
2b8: 0e 94 cf 00 call 0x19e <TI_CC_SpiWriteReg>
TI_CC_SpiWriteReg(CCxxx0_FSCAL2, pRfSettings->FSCAL2);
2bc: f8 01 movw r30, r16
2be: 65 89 ldd r22, Z+21 ; 0x15
2c0: 84 e2 ldi r24, 0x24 ; 36
2c2: 0e 94 cf 00 call 0x19e <TI_CC_SpiWriteReg>
TI_CC_SpiWriteReg(CCxxx0_FSCAL1, pRfSettings->FSCAL1);
2c6: f8 01 movw r30, r16
2c8: 66 89 ldd r22, Z+22 ; 0x16
2ca: 85 e2 ldi r24, 0x25 ; 37
2cc: 0e 94 cf 00 call 0x19e <TI_CC_SpiWriteReg>
TI_CC_SpiWriteReg(CCxxx0_FSCAL0, pRfSettings->FSCAL0);
2d0: f8 01 movw r30, r16
2d2: 67 89 ldd r22, Z+23 ; 0x17
2d4: 86 e2 ldi r24, 0x26 ; 38
2d6: 0e 94 cf 00 call 0x19e <TI_CC_SpiWriteReg>
TI_CC_SpiWriteReg(CCxxx0_FSTEST, pRfSettings->FSTEST);
2da: f8 01 movw r30, r16
2dc: 60 8d ldd r22, Z+24 ; 0x18
2de: 89 e2 ldi r24, 0x29 ; 41
2e0: 0e 94 cf 00 call 0x19e <TI_CC_SpiWriteReg>
TI_CC_SpiWriteReg(CCxxx0_TEST2, pRfSettings->TEST2);
2e4: f8 01 movw r30, r16
2e6: 61 8d ldd r22, Z+25 ; 0x19
2e8: 8c e2 ldi r24, 0x2C ; 44
2ea: 0e 94 cf 00 call 0x19e <TI_CC_SpiWriteReg>
TI_CC_SpiWriteReg(CCxxx0_TEST1, pRfSettings->TEST1);
2ee: f8 01 movw r30, r16
2f0: 62 8d ldd r22, Z+26 ; 0x1a
2f2: 8d e2 ldi r24, 0x2D ; 45
2f4: 0e 94 cf 00 call 0x19e <TI_CC_SpiWriteReg>
TI_CC_SpiWriteReg(CCxxx0_TEST0, pRfSettings->TEST0);
2f8: f8 01 movw r30, r16
2fa: 63 8d ldd r22, Z+27 ; 0x1b
2fc: 8e e2 ldi r24, 0x2E ; 46
2fe: 0e 94 cf 00 call 0x19e <TI_CC_SpiWriteReg>
TI_CC_SpiWriteReg(CCxxx0_IOCFG2, pRfSettings->IOCFG2);
302: f8 01 movw r30, r16
304: 64 8d ldd r22, Z+28 ; 0x1c
306: 80 e0 ldi r24, 0x00 ; 0
308: 0e 94 cf 00 call 0x19e <TI_CC_SpiWriteReg>
TI_CC_SpiWriteReg(CCxxx0_IOCFG0, pRfSettings->IOCFG0);
30c: f8 01 movw r30, r16
30e: 65 8d ldd r22, Z+29 ; 0x1d
310: 82 e0 ldi r24, 0x02 ; 2
312: 0e 94 cf 00 call 0x19e <TI_CC_SpiWriteReg>
TI_CC_SpiWriteReg(CCxxx0_PKTCTRL1, pRfSettings->PKTCTRL1);
316: f8 01 movw r30, r16
318: 66 8d ldd r22, Z+30 ; 0x1e
31a: 87 e0 ldi r24, 0x07 ; 7
31c: 0e 94 cf 00 call 0x19e <TI_CC_SpiWriteReg>
TI_CC_SpiWriteReg(CCxxx0_PKTCTRL0, pRfSettings->PKTCTRL0);
320: f8 01 movw r30, r16
322: 67 8d ldd r22, Z+31 ; 0x1f
324: 88 e0 ldi r24, 0x08 ; 8
326: 0e 94 cf 00 call 0x19e <TI_CC_SpiWriteReg>
TI_CC_SpiWriteReg(CCxxx0_ADDR, pRfSettings->ADDR);
32a: f8 01 movw r30, r16
32c: 60 a1 ldd r22, Z+32 ; 0x20
32e: 89 e0 ldi r24, 0x09 ; 9
330: 0e 94 cf 00 call 0x19e <TI_CC_SpiWriteReg>
TI_CC_SpiWriteReg(CCxxx0_PKTLEN, pRfSettings->PKTLEN);
334: f8 01 movw r30, r16
336: 61 a1 ldd r22, Z+33 ; 0x21
338: 86 e0 ldi r24, 0x06 ; 6
33a: 0e 94 cf 00 call 0x19e <TI_CC_SpiWriteReg>
// Set Syn Byte
TI_CC_SpiWriteReg(CCxxx0_SYNC1, 0x12);
33e: 62 e1 ldi r22, 0x12 ; 18
340: 84 e0 ldi r24, 0x04 ; 4
342: 0e 94 cf 00 call 0x19e <TI_CC_SpiWriteReg>
TI_CC_SpiWriteReg(CCxxx0_SYNC0, 0x34);
346: 64 e3 ldi r22, 0x34 ; 52
348: 85 e0 ldi r24, 0x05 ; 5
34a: 0e 94 cf 00 call 0x19e <TI_CC_SpiWriteReg>
TI_CC_SpiWriteBurstReg(CCxxx0_PATABLE, paTable, sizeof(paTable));
34e: 41 e0 ldi r20, 0x01 ; 1
350: 6f e0 ldi r22, 0x0F ; 15
352: 71 e0 ldi r23, 0x01 ; 1
354: 8e e3 ldi r24, 0x3E ; 62
356: 0e 94 dd 00 call 0x1ba <TI_CC_SpiWriteBurstReg>
35a: 1f 91 pop r17
35c: 0f 91 pop r16
35e: 08 95 ret
00000360 <TI_CC_RfSendPacket>:
}// TI_CC_RfWriteRfSettings
//-------------------------------------------------------------------------------------------------------
// void TI_CC_RfSendPacket(BYTE *txBuffer, UINT8 size)
// 发送一个数据包
// 最大数据包长度<63; GDO0 设置成监听数据包: TI_CC_SpiWriteReg(CCxxx0_IOCFG0, 0x06);
// 不定长数据包格式,数据包里的第一个字节为数据包长度
// DESCRIPTION:
// This function can be used to transmit a packet with packet length up to 63 bytes.
// To use this function, GD00 must be configured to be asserted when sync word is sent and
// de-asserted at the end of the packet => TI_CC_SpiWriteReg(CCxxx0_IOCFG0, 0x06);
// The function implements polling of GDO0. First it waits for GD00 to be set and then it waits
// for it to be cleared.
//
// ARGUMENTS:
// BYTE *txBuffer
// Pointer to a buffer containing the data that are going to be transmitted
//
// UINT8 size
// The size of the txBuffer
//-------------------------------------------------------------------------------------------------------
void TI_CC_RfSendPacket(BYTE *txBuffer, UINT8 size)
{
360: 9c 01 movw r18, r24
//写发送缓冲区
TI_CC_SpiWriteBurstReg(CCxxx0_TXFIFO, txBuffer, size);
362: 46 2f mov r20, r22
364: b9 01 movw r22, r18
366: 8f e3 ldi r24, 0x3F ; 63
368: 0e 94 dd 00 call 0x1ba <TI_CC_SpiWriteBurstReg>
// 进入发送状态
TI_CC_SpiStrobe(CCxxx0_STX);
36c: 85 e3 ldi r24, 0x35 ; 53
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -