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📄 l51_bank.lst

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A51 MACRO ASSEMBLER  L51_BANK                                                             11/10/2006 13:38:49 PAGE     1


MACRO ASSEMBLER A51 V7.10
OBJECT MODULE PLACED IN .\OUT\L51_BANK.obj
ASSEMBLER INVOKED BY: D:\keil2\C51\BIN\A51.EXE L51_BANK.A51 SET(LARGE) DEBUG PRINT(.\LIST\L51_BANK.lst) OBJECT(.\OUT\L51
                      _BANK.obj) EP

LOC  OBJ            LINE     SOURCE

                       1     $nomod51 
                       2     $nocond 
                       3     ;------------------------------------------------------------------------------
                       4     ;  This file is part of the BL51 / L251 Banked Linker/Locater package
                       5     ;  Copyright (c) 1988 - 2000 Keil Elektronik GmbH and Keil Software, Inc.
                       6     ;  Version 2.03 (Code and Variable Banking for 8051 based Derivatives)
                       7     ;------------------------------------------------------------------------------
                       8     ;************************ Configuration Section *******************************
  0008                 9     ?B_NBANKS       EQU  8   ; Define max. Number of Banks                       *
                      10     ;                         ; The following values are allowed: 2, 4, 8, 16, 32 *
                      11     ;                         ; the max. value for ?B_BANKS is 32                 *
                      12     ;                                                                             *
  0004                13     ?B_MODE         EQU  4    ; 0 for Bank-Switching via 8051 Port                *
                      14     ;                         ; 1 for Bank-Switching via XDATA Port               *
                      15     ;                         ; 4 for user-provided bank switch code              *
                      16     ;                                                                             *
  0000                17     ?B_RTX          EQU  0    ; 0 for applications without RTX-51 FULL            *
                      18     ;                         ; 1 for applications using RTX-51 FULL              *
                      19     ;                                                                             *
  0000                20     ?B_VAR_BANKING  EQU  0    ; Enable Variable Banking in XDATA and CODE memory  *
                      21     ;                         ; 0 Variable Banking is disabled                    *
                      22     ;                         ; 1 XDATA and CODE banking with same address lines  *
                      23     ;                         ; 2 XDATA uses a different banking port             *
                      24     ;                                                                             *
                             ENDIF;                                                                        *
                      39     ;                                                                             *
                             ENDIF;                                                                        *
                      51     ;                                                                             *
                             ENDIF;                                                                        *
                      60     ;                                                                             *
                      61     IF  ?B_MODE = 4;                                                              *
                      62     ;-----------------------------------------------------------------------------*
                      63     ; if ?BANK?MODE is 4 define the following switch macros                       *
                      64     ; For bank switching via user-provided bank switch code you must define for   *
                      65     ; each memory bank a own macro which contains the bank switch code.  The      *
                      66     ; following example shows how to use the I/O lines P1.4 and P1.7 for bank     *
                      67     ; switching.  Since you can select just 4 banks with two address lines, just  *
                      68     ; four macros are defined.  The number of macros must conform with the number *
                      69     ; ?B_NBANKS number, i.e. for an application with 16 memory banks you must     *
                      70     ; define 16 macros.                                                           *
                      71     ;                                                                             *
                      72     ; IMPORTANT NOTES:                                                            *
                      73     ; 1.  Eeach SWITCH macro must generate the same code size, otherwise the      *
                      74     ;     BANKSWITCH code does not work correctly.                                *
                      75     ; 2.  You must ensure that your bankswitch logic has a defined stated after   *
                      76     ;     CPU reset.  We recommend that the following code is insert at the end   *
                      77     ;     of the STARTUP.A51 file:                                                *
                      78     ;                :                                                            *
                      79     ;         EXTRN DATA (?B_CURRENTBANK)                                         *
                      80     ;               MOV     ?B_CURRENTBANK,#0    ; select code bank 0             *
                      81     ;               SWITCH0                      ; the code of your SWITCH0 macro *
                      82     ;                       LJMP    ?C_START                                              *
                      83     ;                :                                                            *
                      84     ; 3.  If you are using the RTX-51 real-time operating system this banking     *
                      85     ;     mode cannot be used.                                                    *
                      86     ;                                                                             *
                      87     ;P1              DATA    90H      ; I/O Port Address                           *
A51 MACRO ASSEMBLER  L51_BANK                                                             11/10/2006 13:38:49 PAGE     2

                      88     ;                                                                             *
                      89     SWITCH0         MACRO            ; Switch to Memory Bank #0                   *
                      90     ;                CLR     P1.4     ; Clear Port 1 Bit 4                         *
                      91     ;                CLR     P1.7     ; Clear Port 1 Bit 7                         *
                      92                     MOV     0A2H,#0
                      93                     ENDM                                                          *
                      94     ;                                                                             *
                      95     SWITCH1         MACRO            ; Switch to Memory Bank #0                   *
                      96     ;                SETB    P1.4     ; Set   Port 1 Bit 4                         *
                      97     ;                CLR     P1.7     ; Clear Port 1 Bit 7                         *
                      98                     MOV     0A2H,#1
                      99                     ENDM                                                          *
                     100     ;                                                                             *
                     101     SWITCH2         MACRO            ; Switch to Memory Bank #0                   *
                     102     ;                CLR     P1.4     ; Clear Port 1 Bit 4                         *
                     103     ;               SETB    P1.7     ; Set   Port 1 Bit 7                         *
                     104                     MOV     0A2H,#2
                     105     
                     106                     ENDM                                                          *
                     107     ;                                                                             *
                     108     SWITCH3         MACRO            ; Switch to Memory Bank #0                   *
                     109     ;                SETB    P1.4     ; Set   Port 1 Bit 4                         *
                     110     ;                SETB    P1.7     ; Set   Port 1 Bit 7                         *
                     111                     MOV     0A2H,#3
                     112                     ENDM  
                     113     SWITCH4         MACRO            ; Switch to Memory Bank #0                   *
                     114     ;                SETB    P1.4     ; Set   Port 1 Bit 4                         *
                     115     ;                SETB    P1.7     ; Set   Port 1 Bit 7                         *
                     116                     MOV     0A2H,#4
                     117                     ENDM            
                     118     SWITCH5         MACRO            ; Switch to Memory Bank #0                   *
                     119     ;                SETB    P1.4     ; Set   Port 1 Bit 4                         *
                     120     ;                SETB    P1.7     ; Set   Port 1 Bit 7                         *
                     121                     MOV     0A2H,#5
                     122                     ENDM
                     123     SWITCH6         MACRO            ; Switch to Memory Bank #0                   *
                     124     ;                SETB    P1.4     ; Set   Port 1 Bit 4                         *
                     125     ;                SETB    P1.7     ; Set   Port 1 Bit 7                         *
                     126                     MOV     0A2H,#6
                     127                     ENDM  
                     128     SWITCH7         MACRO            ; Switch to Memory Bank #0                   *
                     129     ;                SETB    P1.4     ; Set   Port 1 Bit 4                         *
                     130     ;                SETB    P1.7     ; Set   Port 1 Bit 7                         *
                     131                     MOV     0A2H,#7
                     132                     ENDM            
                     133     ;                                                                             *
                     134     ;-----------------------------------------------------------------------------*
                     135     ENDIF;                                                                        *
                     136     ;                                                                             *
                     137     ;******************************************************************************
                     138     ;                                                                             *
                     139     ; THEORY OF OPERATION                                                         *
                     140     ; -------------------                                                         *
                     141     ; The section below describes the code generated by BL51 or L251 and the      *
                     142     ; operation of the L51_BANK.A51 module.  BL51/L251 generates for each         *
                     143     ; function that is located in a code memory bank and called from the common   *
                     144     ; area or a different code bank and entry into the INTRABANK CALL TABLE.  The *
                     145     ; INTRABANK CALL TABLE is located in the SEGMENT ?BANK?SELECT and listed in   *
                     146     ; the Linker MAP file. The entries in that TABLE have the following format:   *
                     147     ;                                                                             *
                     148     ;   ?FCT?1:  MOV  DPTR,#FCT     ; Load Address of target FCT                  *
                     149     ;            JMP  ?B_BANKn      ; Switch to Bank and Jump to Target Code      *
                     150     ;                                                                             *
                     151     ; Instead of directly calling the function FCT, the Linker changes the entry  *
                     152     ; to ?FCT?1.  This entry selects the bank where the function FCT is located   *
                     153     ; and calls that function via the routines defined in this L51_BANK.A51 file. *
A51 MACRO ASSEMBLER  L51_BANK                                                             11/10/2006 13:38:49 PAGE     3

                     154     ; The L51_BANK.A51 file contains two sets of functions for each bank:         *
                     155     ;                                                                             *
                     156     ; ?B_BANKn    is a routine which saves the entry of the ?B_SWITCHn function   *
                     157     ;             for the current active bank on the STACK and switches to the    *
                     158     ;             bank 'n'.  Then it jumps to the address specified by the DPTR   *
                     159     ;             register.  It is allowed to modify the following registers in   *
                     160     ;             the ?B_BANKn routine:  A, B, R0, DPTR, PSW                      *
                     161     ;                                                                             *
                     162     ; ?B_SWITCHn  is a function which selects the bank 'n'.  This function is     *
                     163     ;             used at the end of a user function to return to the calling     *
                     164     ;             code bank.  Only the following registers may be altered in the  *
                     165     ;             ?B_SWITCHn function:  R0, DPTR                                  *
                     166     ;                                                                             *
                     167     ; The current active bank is stored in ?B_CURRENTBANK.  RTX-51 uses this      *
                     168     ; variable to restore the code bank after a task switch.  To get correct      *
                     169     ; results, ?B_CURRENTBANK must be set to the code bank before the hardware    *
                     170     ; switch is done, or the code banking sequences must be interrupt protected.  *
                     171     ;******************************************************************************
                     172     
                     173                     NAME    ?BANK?SWITCHING
                     174     
                     175                     PUBLIC  ?B_NBANKS, ?B_MODE, ?B_CURRENTBANK, ?B_MASK
                     176                     PUBLIC  ?B_FACTOR
                     177     
                     178     ; Standard SFR Symbols required in L51_BANK.A51
  00E0               179     ACC     DATA    0E0H
  00F0               180     B       DATA    0F0H
  0082               181     DPL     DATA    82H
  0083               182     DPH     DATA    83H
  00A8               183     IE      DATA    0A8H
  00AF               184     EA      BIT     IE.7
                     185     
                     186     
                     187     ; generate Mask and Bank Number Information
                             ELSEIF  ?B_NBANKS <= 8
  0007               193       MASK          EQU     00000111B
                             ENDIF
                     199     
                             ENDIF  ; close block IF ?B_MODE = 0 *******************************************
                     360     
                     361     
                             ENDIF  ; close block IF ?B_MODE = 1 *******************************************
                     596     
                     597     
                     598     IF  ?B_MODE = 4 ;**************************************************************
                     599     
  0000               600     ?B_FACTOR       EQU     0               ; Dummy Declarations
  0000               601     ?B_FIRSTBIT     EQU     0

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