regs847x.h

神龙解压卡Linux下的完整开发包,绝对是超值超值超值

/*****************************************************************************
*  regs847x.h : registers for EM847X
*  REALmagic Quasar Hardware Library
*  Created by Aurelia Popa-Radu
*  Copyright Sigma Designs Inc
*  Sigma Designs Proprietary and confidential
*  Created on 8/7/01
*  Description:
*****************************************************************************/

#ifndef __REGS847X_H__
#define __REGS847X_H__

#define DRAM_portmux				0x1C0C

// defines local bus registers
#define LBC_config					0x1E40
#define LBC_config1					0x1E41
#define LBC_write_fifo0_access		0x1E42
#define LBC_write_fifo0_cnt			0x1E43
#define LBC_read_fifo0_access		0x1E44
#define LBC_read_fifo0_cnt			0x1E45
#define LBC_read_fifo1_access		0x1E46
#define LBC_read_fifo1_cnt			0x1E47
#define LBC_write_reg_addr			0x1E48
#define LBC_write_reg_data			0x1E49
#define LBC_read_reg_addr			0x1E4A
#define LBC_read_reg_data			0x1E4B
#define LBC_burst_xfer_ctrl			0x1E4C
#define LBC_status_reg				0x1E4D
#define LBC_interrupt_reg			0x1E4E
#define LBC_PGIO_reg				0x1E4F

#define VC_config					0x1E50
#define VC_pic_width				0x1E51	// 11 bits, max 0x7FF = 2047
#define VC_pic_height				0x1E52	// 11 bits, max 0x7FF = 2047
#define VC_xoffset					0x1E53	// 11 bits, max 0x7FF = 2047
#define VC_yoffset					0x1E54	// 11 bits, max 0x7FF = 2047
#define VC_scaleFactor				0x1E55
#define VC_lineLength				0x1E56
#define VC_video_inf				0x1E57

// defines video filter registers
#define VID_LUMA_VERT_FILTER		0x1E80
#define VID_LUMA_HORZ_FILTER		0x1E90
#define VID_CHROMA_VERT_FILTER		0x1EA0
#define VID_CHROMA_HORZ_FILTER		0x1EB0

#define VID_INTERNAL_PLL			0x1EFF	// default value after reset 0x4303

#define PIO8F_DATA					0x1F7C
#define PIO8F_DIR					0x1F7D

#define AUDIO_in_counter			0x1FDB

// defines JDA1 registers
#define AUDIO_jda1_config			0x1FDC
#define AUDIO_jda1_setup_lo			0x1FDD
#define AUDIO_jda1_setup_hi			0x1FDE

#define QPM_to_host_addr_lo			0x1FE8
#define QPM_to_host_addr_hi			0x1FE9
#define QPM_to_host_xfer_cnt		0x1FEA
#define QPM_to_host_master_ena		0x1FEB
#define QPM_Pci_Burst				0x1FEC

#endif