instructions_ppc.c

skyeye_1_2_2_Rel.rar 最新skyeye源码

}

/*
 * ---------------------------------------
 * mcrxr UISA Form X
 * Move to condition register from XER
 * ---------------------------------------
 */
void 
i_mcrxr(uint32_t icode) {
	int crfd = 7 - ((icode>>23) & 7);
	uint32_t mask = ~(0xf<<(4*crfd));
#if 0
	check_illegal icode	
#endif
	CR = (CR & mask) | (((XER & 0xf0000000)>>28)<<(4*crfd));
	XER = XER & 0x0fffffff;
	fprintf(stderr,"instr i_mcrxr(%08x)\n",icode);
}

/* 
 * --------------------------------------------------------------
 * lswx  UISA Form X
 * Load string word indexed
 * v1
 * --------------------------------------------------------------
 */
void 
i_lswx(uint32_t icode) {
	int d=(icode>>21)&0x1f;
	int a=(icode>>16)&0x1f;
	int b=(icode>>11)&0x1f;
	int n=XER&0x7f;
	int r;
	int i;
	uint32_t ea;
	if(a==0) {
		ea =  GPR(b);
	} else {
		ea=GPR(b)+GPR(a);
	}
	r=GPR(d)-1;
	i=0;
	while(n>0) {
		if(i==0) {
			r=(r+1)&31;
			GPR(r)=0;
		}
		/* Create Exception on segment Boudary is missing here */
		GPR(r)=GPR(r) | (MMU_Read8(ea)<<(24-i));
		i=(i+8)&31;
		ea++;
		n--;
	}
	fprintf(stderr,"instr i_lswx(%08x)\n",icode);
}

/* 
 * ---------------------------------------------
 * lwbrx UISA Form X
 * Load  word byte reversed indexed
 * v1
 * ---------------------------------------------
 */
void 
i_lwbrx(uint32_t icode) {
	int d=(icode>>21)&0x1f;
	int a=(icode>>16)&0x1f;
	int b=(icode>>11)&0x1f;
	uint32_t ea;
	if(a==0) {
		ea =  GPR(b);
	} else {
		ea=GPR(b)+GPR(a);
	}
	GPR(d) = swap32(MMU_Read32(ea));
	fprintf(stderr,"instr i_lwbrx(%08x)\n",icode);
}

void 
i_lfsx(uint32_t icode) {
	fprintf(stderr,"instr i_lfsx(%08x) not implemented\n",icode);
}

/*
 * --------------------------------------
 * srwx
 * Shift Right Word
 * --------------------------------------
 */

void 
i_srwx(uint32_t icode) {
	int s = (icode>>21) & 0x1f;
	int a = (icode>>16) & 0x1f;
	int b = (icode>>11) & 0x1f;
	int rc = icode & 1;
	int sh = GPR(b) & 0x3f;
	uint32_t result;
	if(sh>31) {
		result = GPR(a) = 0;
	} else {
		result = GPR(a) = GPR(s) >> sh;
	}
	if(rc) {
		update_cr0(result);
	}
	fprintf(stderr,"instr i_srwx(%08x) not implemented\n",icode);
}

void 
i_srdx(uint32_t icode) {
	fprintf(stderr,"instr i_srdx(%08x) not implemented\n",icode);
}

/*
 * -----------------------------------------------------------------------------
 * tlbsync
 *	Wait until all processors have invalidated the outstanding TLB-Entries
 * -----------------------------------------------------------------------------
 */
void 
i_tlbsync(uint32_t icode) {
	fprintf(stderr,"instr i_tlbsync(%08x) ignored\n",icode);
}

void 
i_lfsux(uint32_t icode) {
	fprintf(stderr,"instr i_lfsux(%08x) not implemented\n",icode);
}

void 
i_mfsr(uint32_t icode) {
	// OEA check missing //
	int d = (icode>>21) & 0x1f;
	int sr = (icode>>16) &0xf;
	GPR(d) = SR(sr);
	fprintf(stderr,"instr i_mfsr(%08x) not implemented\n",icode);
}

/*
 * -------------------------------------------------------
 * lswi UISA Form X
 * 	Load string word immediate
 * v1
 * -------------------------------------------------------
 */
void 
i_lswi(uint32_t icode) {
	int d=(icode>>21)&0x1f;
	int a=(icode>>16)&0x1f;
	int nb=(icode>>11)&0x1f;	
	int i;
	int n;
	int r;
	uint32_t ea;
	if(a==0) {
		ea=0;
	} else {
		ea=GPR(a);
	}
	if(nb==0) {
		n=32;
	} else {
		n=nb;
	}
	r=GPR(d)-1;
	i=0;
	while(n>0) {
		if(i==0) {
			r=(r+1)&31;
			GPR(r)=0;
		}
		GPR(r) = GPR(r) | MMU_Read8(ea)<<(24-i);
		i=(i+8)&31;
		ea++;
		n--;
	}
	fprintf(stderr,"instr i_lswi(%08x) not implemented\n",icode);
}

/*
 * ------------------------------------------------
 * sync
 *	Synchronize
 * ------------------------------------------------
 */
void 
i_sync(uint32_t icode) {
	fprintf(stderr,"instr i_sync(%08x) currently does nothing\n",icode);
}

void 
i_lfdx(uint32_t icode) {
	fprintf(stderr,"instr i_lfdx(%08x) not implemented\n",icode);
}

void 
i_lfdux(uint32_t icode) {
	fprintf(stderr,"instr i_lfdux(%08x) not implemented\n",icode);
}

/*
 * -----------------------------------------------
 * mfsrin Move from Segment register indirect
 * v1
 * -----------------------------------------------
 */
void 
i_mfsrin(uint32_t icode) {
	/*  OEA Supervisor */
	int d = (icode>>21)&0x1f;
	int b = (icode>>11)&0x1f;	
	GPR(d) = SR(GPR(b)>>28);
	fprintf(stderr,"instr i_mfsrin(%08x) not implemented\n",icode);
}

/*
 * -----------------------------------------------
 * stswx UISA Form X
 * 	Store String Word Indexed
 * v1
 * -----------------------------------------------
 */
void 
i_stswx(uint32_t icode) {
	int s=(icode>>21)&0x1f;
	int a=(icode>>16)&0x1f;
	int b=(icode>>11)&0x1f;
	int n=XER&0x7f;
	int r;
	int i;
	uint32_t ea;
	if(a==0) {
		ea = GPR(b);
	} else {
		ea=GPR(b)+GPR(a);
	}
	r=GPR(s)-1;
	i=0;
	while(n>0) {
		if(i==0) {
			r=(r+1)&31;
		}
		MMU_Write8(GPR(r)>>(24-i),ea);
		i=(i+8)&31;
		ea++;
		n--;
	}
	fprintf(stderr,"instr i_stswx(%08x)\n",icode);
}

/*
 * ------------------------------------------------------------------
 * stwbrx UISA Form X
 * 	Store Word Byte Reversed Indexed
 * v1
 * ------------------------------------------------------------------
 */
void 
i_stwbrx(uint32_t icode) {
	int s=(icode>>21)&0x1f;
	int a=(icode>>16)&0x1f;
	int b=(icode>>11)&0x1f;
	uint32_t ea;
	if(a) {
		ea = GPR(a) + GPR(b);
	} else {
		ea = GPR(b);
	}
	MMU_Write32(swap32(GPR(s)),ea);	
	fprintf(stderr,"instr i_stwbrx(%08x)\n",icode);
}

void 
i_stfsx(uint32_t icode) {
	fprintf(stderr,"instr i_stfsx(%08x) not implemented\n",icode);
}

void 
i_stfsux(uint32_t icode) {
	fprintf(stderr,"instr i_stfsux(%08x) not implemented\n",icode);
}

/*
 * -------------------------------------------
 * stswi UISA Form X
 * 	Store String Word Immediate
 * v1
 * -------------------------------------------
 */ 
void 
i_stswi(uint32_t icode) {
	int s=(icode>>21)&0x1f;
	int a=(icode>>16)&0x1f;
	int nb=(icode>>11)&0x1f;	
	int i;
	int n;
	int r;
	uint32_t ea;
	if(a==0) {
		ea=0;
	} else {
		ea=GPR(a);
	}
	if(nb==0) {
		n=32;
	} else {
		n=nb;
	}
	r=GPR(s)-1;
	i=0;
	while(n>0) {
		if(i==0) {
			r=(r+1)&31;
		}
		MMU_Write8((GPR(r)>>(24-i))&0xff,ea);
		i=(i+8)&31;
		ea++;
		n--;
	}
	fprintf(stderr,"instr i_stswi(%08x)\n",icode);
}

/*
 *
 */
void 
i_stfdx(uint32_t icode) {
	int s = (icode>>21) & 0x1f;
	int a = (icode>>16) & 0x1f;
	int b = (icode>>11) & 0x1f;
	uint32_t ea;
	if(a) {
		ea = GPR(a) + GPR(b);
	} else {
		ea = GPR(b);
	}
	MMU_Write64(FPR(s),ea);
	fprintf(stderr,"instr i_stfdx(%08x) not implemented\n",icode);
}

/*
 * -------------------------
 * dcba VEA Optional Form X
 * Currently does nothing
 * v1
 * -------------------------
 */
void 
i_dcba(uint32_t icode) {
	int a=(icode>>16)&0x1f;
	int b=(icode>>11)&0x1f;
	uint32_t ea;
	if(a) {
		ea = GPR(a) + GPR(b);
	} else {
		ea = GPR(b);
	}
	/* Write some random numbers to the memory block */
	fprintf(stderr,"instr i_dcba(%08x) ignored\n",icode);
}

void 
i_stfdux(uint32_t icode) {
	int s = (icode>>21) & 0x1f;
	int a = (icode>>16) & 0x1f;
	int b = (icode>>11) & 0x1f;
	uint32_t ea;
	ea = GPR(a) + GPR(b);
	MMU_Write64(FPR(s),ea);
	GPR(a) = ea;
	fprintf(stderr,"instr i_stfdux(%08x) not implemented\n",icode);
}

/*
 * ------------------------------------------
 * lhbrx
 * 	Load half word byte reversed indexed
 * v1
 * ------------------------------------------
 */
void 
i_lhbrx(uint32_t icode) {
	int d=(icode>>21)&0x1f;
	int a=(icode>>16)&0x1f;
	int b=(icode>>11)&0x1f;
	uint32_t ea;
	if(a==0) {
		ea = GPR(b);
	} else {
		ea = GPR(a)+GPR(b);
	}
	GPR(d) = swap16(MMU_Read16(ea));	
	fprintf(stderr,"instr i_lhbrx(%08x)\n",icode);
}

/*
 * -------------------------------------------
 * srawx
 * 	Shift right algebraic word
 * carry untested
 * -------------------------------------------
 */
void 
i_srawx(uint32_t icode) {
	int s=(icode>>21);
	int a=(icode>>16);
	int b=(icode>>11);
	int rc = icode & 1;	
	int sh = GPR(b)&0x3f;	
	uint32_t result;
	XER = XER &  ~XER_CA;
	if(sh>31) {
		result = GPR(a) = 0;
	} else { 
		if(GPR(s) & 0x80000000) {
			if(((GPR(s) >> sh) << sh) != GPR(s)) {
				XER |= XER_CA;
			}
		}
		result = GPR(a) = ((int32_t)GPR(s)) >> sh;
	}
	if(rc) {
		update_cr0(result);
	}
	fprintf(stderr,"instr i_srawx(%08x)\n",icode);
}

void 
i_sradx(uint32_t icode) {
	fprintf(stderr,"instr i_sradx(%08x) not implemented\n",icode);
}

/*
 * ---------------------------------------------
 * srawix
 * 	Shift right algebraic word immediate
 * ---------------------------------------------
 */
void 
i_srawix(uint32_t icode) {
	int s=(icode>>21)&0x1f;
	int a=(icode>>16)&0x1f;
	int rc = icode & 1;	
	int sh = (icode>>11) & 0x1f;	
	uint32_t result;
	XER = XER &  ~XER_CA;
	if(sh>31) {
		result = GPR(a) = 0;
	} else { 
		if(GPR(s) & 0x80000000) {
			if(((GPR(s) >> sh) << sh) != GPR(s)) {
				XER |= XER_CA;
			}
		}
		result = GPR(a) = ((int32_t)GPR(s)) >> sh;
	}
	if(rc) {
		update_cr0(result);
	}
	dprintf("instr i_srawix(%08x)\n",icode);
}

/*
 * ------------------------------------------
 * eieio Enforce in order execution of IO
 * ------------------------------------------
 */
void 
i_eieio(uint32_t icode) {
	fprintf(stderr,"instr i_eieio(%08x) not implemented\n",icode);
}

/*
 * --------------------------------------
 * sthbrx UISA Form X
 * 	Store Half Word reverse Indexed
 * v1
 * --------------------------------------
 */
void 
i_sthbrx(uint32_t icode) {
	int s = (icode>>21)&0x1f;
	int a = (icode>>16)&0x1f;
	int b = (icode>>11)&0x1f;
	uint32_t ea;
	if(a) {
		ea = GPR(a) + GPR(b);
	} else {
		ea = GPR(b);
	}
	MMU_Write16(swap16(GPR(s)&0xffff),ea);
	fprintf(stderr,"instr i_sthbrx(%08x)\n",icode);
}

/*
 * ----------------------------
 * extshx UISA Form X
 * v1
 * ----------------------------
 */
void 
i_extshx(uint32_t icode) {
	int s=(icode>>21) &0x1f;
        int a=(icode>>16) &0x1f;
        int b=(icode>>11) &0x1f;
	int rc = icode &1;
	int16_t imm;
	if(b!=0) {
		fprintf(stderr,"Illegal instruction format\n");
		return;
	}
	imm = GPR(s);
	GPR(a) = imm;
	if(rc) {
		update_cr0(GPR(a));
	}
	fprintf(stderr,"instr i_extshx(%08x) not implemented\n",icode);
}

/*
 * ----------------------------
 * extsbx UISA Form X
 * Extend Sign Byte
 * v1
 * ----------------------------
 */
void 
i_extsbx(uint32_t icode) {
	int s=(icode>>21) &0x1f;
	int a=(icode>>16) &0x1f;
	int b=(icode>>11) &0x1f;
	int rc = icode &1;
	int8_t imm;
	if(b!=0) {
		fprintf(stderr,"Illegal instruction format\n");
		return;
	}
	imm = GPR(s) & 0xff;
	GPR(a) = imm;
	if(rc) {
		update_cr0(GPR(a));
	}
	fprintf(stderr,"instr i_extsbx(%08x)\n",icode);
}

/*
 * ------------------------------------------------------------
 * icbi VEA Form X
 * Instruction Cache block invalidate
 * Currently does nothing because cache is not emulated
 * ------------------------------------------------------------
 */
void 
i_icbi(uint32_t icode) {
	fprintf(stderr,"instr i_icbi(%08x) ignored\n",icode);
}

void 
i_stfiwx(uint32_t icode) {
	int s=(icode>>21)&0x1f;
	int a=(icode>>16)&0x1f;
	int b=(icode>>11)&0x1f;
	uint32_t ea;
	if(a) {
		ea = GPR(a) + GPR(b);
	} else {
		ea = GPR(b);
	}
	MMU_Write32(FPR(s)&0xffffffff,ea);
	
	fprintf(stderr,"instr i_stfiwx(%08x) not implemented\n",icode);
}

void 
i_extsw(uint32_t icode) {
	fprintf(stderr,"instr i_extsw(%08x) not implemented\n",icode);
}

/*
 * -------------------------------------
 * dcbz
 * 	Data block clear to zero
 * v1
 * -------------------------------------
 */
void 
i_dcbz(uint32_t icode) {
	int i;
	int a=(icode>>16)&0x1f;
	int b=(icode>>11)&0x1f;
	uint32_t ea = GPR(b);
	if(a) {
		ea+=GPR(a);
	}
	ea = ea & ~0x1f;
	/* Exception Check Granularity ? */
	for(i=0;i<4;i++) {
		MMU_Write64(0,ea);
		ea+=8;
	}
	fprintf(stderr,"instr i_dcbz(%08x) not implemented\n",icode);
}

/*
 * ---------------------------------------------------------
 * lwz UISA Form D
 * 	Load word and zero
 * v1
 * ---------------------------------------------------------
 */
void 
i_lwz(uint32_t icode) {
	int d = (icode>>21)&0x1f;
	int a = (icode>>16)&0x1f;
	int16_t offs=icode&0xffff;
	uint32_t ea;
	if(a==0) {
		ea=offs;
	} else {
		ea=GPR(a)+offs;
	}
	GPR(d)=MMU_Read32(ea);
	dprintf("instr i_lwz(%08x)\n",icode);
}

/*
 * ---------------------------------------------------------
 * lwzu UISA Form D
 * 	Load Word and Zero with Update
 * v1
 * ---------------------------------------------------------
 */
void 
i_