instructions_ppc.c

skyeye_1_2_2_Rel.rar 最新skyeye源码

 */
void 
i_dcbst(uint32_t icode) {
	fprintf(stderr,"ignore i_dcbst(%08x)\n",icode);
}

/*
 * ------------------------------------------
 * lwzux UISA Form X
 * Load word and zero with update indexed
 * v1
 * ------------------------------------------
 */
void 
i_lwzux(uint32_t icode) {
	int d = (icode>>21)&0x1f;
	int a = (icode>>16)&0x1f;
	int b = (icode>>11)&0x1f;
	uint32_t ea;
	ea=GPR(a)+GPR(b);
	GPR(d)=MMU_Read32(ea);
	GPR(a)=ea;
	fprintf(stderr,"instr i_lwzux(%08x)\n",icode);
}

void 
i_zntlzdx(uint32_t icode) {
	fprintf(stderr,"instr i_zntlzdx(%08x) not implemented\n",icode);
}

/*
 * ----------------------
 * andcx UISA Form X
 * v1
 * ----------------------
 */
void 
i_andcx(uint32_t icode) {
	uint32_t result;
	int s = (icode>>21) & 0x1f;
	int a = (icode>>16) & 0x1f;
	int b = (icode>>11) & 0x1f;
	int rc=icode&1;
	GPR(a) = result = GPR(s) & ~GPR(b);
	if(rc) {
		update_cr0(result);
	}
	fprintf(stderr,"instr i_andcx(%08x) not implemented\n",icode);
}

void 
i_td(uint32_t icode) {
	fprintf(stderr,"instr i_td(%08x) not implemented\n",icode);
}

void 
i_mulhdx(uint32_t icode) {
	fprintf(stderr,"instr i_mulhdx(%08x) not implemented\n",icode);
}

/*
 * -------------------------------------
 * mulhwx UISA Form XO
 *	Multiply high word
 * -------------------------------------
 */
void 
i_mulhwx(uint32_t icode) {
	int d = (icode>>21)&0x1f;	
	int a = (icode>>16)&0x1f;	
	int b = (icode>>11)&0x1f;	
	int rc = icode & 1;
	uint32_t result;
	int64_t prod = (int64_t)GPR(a) * (int64_t)GPR(b);
	result = GPR(d) = (prod >> 32);
	if(rc) {
		update_cr0(result);
	}
	fprintf(stderr,"instr i_mulhwx(%08x) not implemented\n",icode);
}

/*
 * --------------------------------------------
 * mfmsr UISA supervisor Form X
 *	Move from Machine status register
 * --------------------------------------------
 */
void 
i_mfmsr(uint32_t icode) {
	int d = (icode>>21)&0x1f;
#if 0
	if(!supervisor) {
		exception();
	}
#endif
	GPR(d) = MSR;
//	fprintf(stderr,"instr i_mfmsr(%08x) not implemented\n",icode);
}

void 
i_ldarx(uint32_t icode) {
	fprintf(stderr,"instr i_ldarx(%08x) not implemented\n",icode);
}

/*
 * ---------------------------------------------------------
 * dcbf VEA Form X
 * 	Data Cache Block flush
 * 	Do nothing because currently no cache is emulated 
 * v1
 * ---------------------------------------------------------
 */
void 
i_dcbf(uint32_t icode) {
	fprintf(stderr,"ignore i_dcbf(%08x)\n",icode);
}

/*
 * -----------------------------------------------
 * lbzx  UISA Form X
 * Load Byte and zero indexed 
 * -----------------------------------------------
 */
void 
i_lbzx(uint32_t icode) {
	int d=(icode>>21)&0x1f;
	int a=(icode>>16)&0x1f;
	int b=(icode>>11)&0x1f;
	uint32_t ea;
	if(a==0) {
		ea=GPR(b);
	} else {
		ea=GPR(a)+GPR(b);
	}
	GPR(d) = MMU_Read8(ea);
	fprintf(stderr,"instr i_lbzx(%08x) not implemented\n",icode);
}

/*
 * ----------------------------------------------------
 * negx UISA Form XO
 * 	two's complement
 * v1
 * ----------------------------------------------------
 */
void 
i_negx(uint32_t icode) {
	int d = (icode>>21) & 0x1f;
	int a = (icode>>16) & 0x1f;
	int oe = (icode >> 10)&1;
	int rc = icode & 1;
	uint32_t result;
	result = GPR(d) = ~GPR(a) + 1;
	if(oe) {
		if(result == 0x80000000) {
			XER = XER | XER_SO | XER_OV;
		} else {
			XER = XER & ~XER_OV;
		}
	}
	if(rc) {
		update_cr0(result);
	}
	fprintf(stderr,"instr i_negx(%08x)\n",icode);
}

/*
 * ----------------------------------------------
 * lbzux UISA Form X
 * Load Byte and Zero with update indexed
 * v1
 * ----------------------------------------------
 */
void 
i_lbzux(uint32_t icode) {
	int d=(icode>>21)&0x1f;
	int a=(icode>>16)&0x1f;
	int b=(icode>>11)&0x1f;
	uint32_t ea;
	if((a==0)||(a==d)) {
		/* Trigger exception here */
		fprintf(stderr,"illegal instruction format\n");
		return;
	}
	ea=GPR(a)+GPR(b);
	GPR(d) = MMU_Read8(ea);
	GPR(a) = ea;
	fprintf(stderr,"instr i_lbzux(%08x)\n",icode);
}

/*
 * ----------------------------------------------
 * norx UISA form X
 * v1
 * ----------------------------------------------
 */
void 
i_norx(uint32_t icode) {
	int s = (icode>>21) & 0x1f;
	int a = (icode>>16) & 0x1f;
	int b = (icode>>11) & 0x1f;
	int rc = icode & 1;
	uint32_t result;
	result = GPR(a) = ~(GPR(s) | GPR(b));
	if(rc) {
		update_cr0(result);
	}
	fprintf(stderr,"instr i_norx(%08x) not implemented\n",icode);
}

/*
 * -----------------------------------------------------------------
 * subfex UISA Form XO
 * 	Subtract from extended
 * -----------------------------------------------------------------
 */
void 
i_subfex(uint32_t icode) {
	int d = (icode>>21) & 0x1f;
	int a = (icode>>16) & 0x1f;
	int b = (icode>>11) & 0x1f;
	int rc = icode & 1;
	int oe = icode & (1<<10);
	uint32_t result;
	uint32_t op1 = GPR(b),op2 = GPR(a);
	if(XER & XER_CA) {
                GPR(d) = result=op1-op2;
        } else {
		GPR(d) = result=op1-op2-1;
        }
	if(sub_carry(op1,op2,result)) {
		XER=XER | XER_CA;
	} else {
		XER=XER & ~XER_CA;
	}
	if(oe) {
		if(sub_overflow(op1,op2,result)) {
			XER=XER | XER_OV | XER_SO;
		} else {
			XER=XER & ~XER_OV;
		}
	}
	if(rc) {
		update_cr0(result);
	}
	fprintf(stderr,"instr i_subfex(%08x)\n",icode);
}

/*
 * ----------------------------------------
 * addex UISA form XO 
 * v1
 * ----------------------------------------
 */
void 
i_addex(uint32_t icode) {
	int d = (icode>>21)&0x1f;	
	int a = (icode>>16)&0x1f;
	int b = (icode>>11)&0x1f;
	int oe = icode&(1<<10);
	int rc = icode&1;
	uint32_t result,op1,op2;
	op1=GPR(a); op2 = GPR(b); 		
	result = op1+op2;
	if(XER & XER_CA) {
		result++;
	}
	GPR(d)=result;
	if(add_carry(op1,op2,result)) {
		XER |= XER_CA;
	} else {
		XER &= ~XER_CA;
	}
	if(oe) {
		if(add_overflow(op1,op2,result)) {
			XER |= XER_SO | XER_OV;
    		} else {
			XER &= ~XER_OV;
    		}
	}
	if(rc) {
		update_cr0(result);
	}
	fprintf(stderr,"instr i_addex(%08x)\n",icode);
}

/*
 * ---------------------------------------------------------
 * mtcrf  UISA Form XFX
 *	Move to condition register fields
 * ---------------------------------------------------------
 */
void 
i_mtcrf(uint32_t icode) {
	int s = (icode>>21) & 0x1f;
	int crm=(icode>>12)&0xff;
	uint32_t mask = 0;
	int i;
	for(i=0;i<8;i++	) {
		if(crm & (1<<i)) {
			mask |= (0xf<<(i*4));
		}
	}
	CR = (GPR(s) & mask) | (CR & ~mask);
	fprintf(stderr,"instr i_mtcrf(%08x)\n",icode);
}

/* 
 * --------------------------
 * OEA Supervisor Form X 
 * --------------------------
 */
void 
i_mtmsr(uint32_t icode) {
	int s = (icode>>21)&0x1f;	
#if 0
	if(icode&bla) {
		fprintf(stderr,"Illegal icode %08x\n",icode);
		Exception();
	}
	if(!oea supervisor) {
		Exception();
	}
#endif
	PpcSetMsr(GPR(s));
	fprintf(stderr,"instr i_mtmsr(%08x)\n",icode);
}

void 
i_stdx(uint32_t icode) {
	fprintf(stderr,"instr i_stdx(%08x) not implemented\n",icode);
}

/* 
 * --------------------------------------------
 * stwcx UISA Form x
 * 	Store Word Conditional indexed
 * v1
 * --------------------------------------------
 */
void 
i_stwcx_(uint32_t icode) {
	int s=(icode>>21)&0x1f;
	int a=(icode>>16)&0x1f;
	int b=(icode>>11)&0x1f;
	uint32_t ea;
	if(a) {
		ea = GPR(a)+GPR(b);
	} else {
		ea=GPR(b);
	}
	if(gcpu.reservation_valid) {
		gcpu.reservation_valid = 0;
		if(ea!= gcpu.reservation) {
			fprintf(stderr,"reservation for wrong address\n");
		}
		MMU_Write32(GPR(s),ea);		
		CR=(CR & ~(CR_LT | CR_GT | CR_SO)) |  CR_EQ; 
		if(XER & XER_SO) {
			CR |= CR_SO;
		}
	} else {
		CR=(CR & ~(CR_LT | CR_GT | CR_EQ | CR_SO)) ; 
		if(XER & XER_SO) {
			CR |= CR_SO;
		}
	}
	fprintf(stderr,"instr i_stwcx(%08x)\n",icode);
}
/*
 * -------------------------------------------------------------
 * stwx UISA Form X
 *	Store Word indexed
 * v1
 * -------------------------------------------------------------
 */
void 
i_stwx(uint32_t icode) {
	int s = (icode>>21)&0x1f;
	int a = (icode>>16)&0x1f;
	int b = (icode>>11)&0x1f;
	uint32_t ea;
	if(a) {
		ea = GPR(a) + GPR(b);
	} else {
		ea = GPR(b);
	}
	MMU_Write32(GPR(s),ea);	
	fprintf(stderr,"instr i_stwx(%08x)\n",icode);
}

void 
i_stdux(uint32_t icode) {
	fprintf(stderr,"instr i_stdux(%08x) not implemented\n",icode);
}

/*
 * -----------------------------------------------------------
 * stwux
 *	Store Word with update Indexed
 * -----------------------------------------------------------
 */
void 
i_stwux(uint32_t icode) {
	int s = (icode>>21)&0x1f;
	int a = (icode>>16)&0x1f;
	int b = (icode>>11)&0x1f;
	uint32_t ea;
	ea = GPR(a) + GPR(b);
	MMU_Write32(GPR(s),ea);
	GPR(a)=ea;
	fprintf(stderr,"instr i_stwux(%08x)\n",icode);
}

/*
 * --------------------------------------------------
 * subfzex UISA Form XO
 *	Subtract from Zero extended
 * --------------------------------------------------
 */
void 
i_subfzex(uint32_t icode) {
	int d = (icode>>21)&0x1f;
	int a = (icode>>21)&0x1f;
	int oe = icode & (1<<10);
	int rc = icode & 1;
	uint32_t result;
	if(XER & XER_CA) {
		result = 0-GPR(a);
	} else {
		result = 0-GPR(a)-1;
	}
	if(sub_carry(0,GPR(a),result)) {
		XER = XER | XER_CA;
	} else {
		XER = XER & ~XER_CA;
	}
	if(oe) {
		if(sub_overflow(0,GPR(a),result)) {
			XER = XER | XER_OV | XER_SO;
		} else {
			XER = XER & ~XER_OV;
		}
	}
	if(rc) {
		update_cr0(result);
	}
	GPR(d) = result;
	fprintf(stderr,"instr i_subfzex(%08x)\n",icode);
}

/*
 * -----------------------------
 * addzex UISA Form XO
 * -----------------------------
 */
void 
i_addzex(uint32_t icode) {
	int d = (icode>>21)&0x1f;	
	int a = (icode>>16)&0x1f;
	int oe = icode&(1<<10);
	int rc = icode&1;
	uint32_t result,op1;
	op1=GPR(a); 		
	result = op1;
	if(XER & XER_CA) {
		result++;
	}
	if(add_carry(op1,0,result)) {
		XER |= XER_CA;
	} else {
		XER &= ~XER_CA;
	}
	GPR(d) = result;
	if(oe) {
		if(add_overflow( op1,0,result)) {
			XER |= XER_SO | XER_OV;
    		} else {
			XER &= ~XER_OV;
    		}
	}
	if(rc) {
		update_cr0(result);
	}
	fprintf(stderr,"instr i_addzex(%08x) not implemented\n",icode);
}

/*
 * -------------------------------------
 * mtsr OEA Supervisor Form X
 * 	move to Segment Register
 * incomplete v1
 * -------------------------------------
 */
void 
i_mtsr(uint32_t icode) {
	// OEA check missing //
	int s = (icode>>21) & 0x1f;
	int sr = (icode>>16) &0xf;
#if 0
	if(!supervisor(x)) {
		Exception
	}
#endif
	SR(sr) = GPR(s);
	fprintf(stderr,"instr i_mtsr(%08x) not implemented\n",icode);
}

void 
i_stdcx(uint32_t icode) {
	fprintf(stderr,"instr i_stdcx(%08x) not implemented\n",icode);
}

/*
 * -----------------------------------------------------
 * Store Byte indexed
 * -----------------------------------------------------
 */
void 
i_stbx(uint32_t icode) {
	int s = (icode>>21)&0x1f;
	int a = (icode>>16)&0x1f;
	int b = (icode>>11)&0x1f;	
	uint32_t ea;
	if(a) {
		ea=GPR(a) + GPR(b);
	} else {
		ea=GPR(b);
	}
	MMU_Write8(GPR(s)&0xff,ea);
	fprintf(stderr,"instr i_stbx(%08x)\n",icode);
}

/*
 * -------------------------------------------------------------------
 * subfmex UISA Form XO
 * 	Subtract from Minus one extended
 * -------------------------------------------------------------------
 */
void 
i_subfmex(uint32_t icode) {
	int d = (icode>>21)&0x1f;
	int a = (icode>>21)&0x1f;
	int oe = icode & (1<<10);
	int rc = icode & 1;
	uint32_t result;
	if(XER & XER_CA) {
		result = -1-GPR(a);
	} else {
		result = -1-GPR(a)-1;
	}
	if(sub_carry((uint32_t)-1,GPR(a),result)) {
		XER = XER | XER_CA;
	} else {
		XER = XER & ~XER_CA;
	}
	if(oe) {
		if(sub_overflow((uint32_t)-1,GPR(a),result)) {
			XER = XER | XER_OV | XER_SO;
		} else {
			XER = XER & ~XER_OV;
		}
	}
	if(rc) {
		update_cr0(result);
	}
	GPR(d) = result;
	fprintf(stderr,"instr i_subfmex(%08x)\n",icode);
}

void 
i_mulld(uint32_t icode) {
	fprintf(stderr,"instr i_mulld(%08x) not implemented\n",icode);
}

/*
 * ------------------------------------
 * addmex UISA Form XO
 * v1
 * ------------------------------------
 */
void 
i_addmex(uint32_t icode) {
	int d = (icode>>21)&0x1f;	
	int a = (icode>>16)&0x1f;
	int oe = icode&(1<<10);
	int rc = icode&1;
	uint32_t result,op1,op2;
	op1=GPR(a); op2 = (uint32_t)-1; 		
	result = op1 + op2;
	if(XER & XER_CA) {
		result++;
	}
	GPR(d) = result;
	if(add_carry(op1,op2,result)) {
		XER |= XER_CA;
	} else {
		XER &= ~XER_CA;
	}
	if(oe) {
		if(add_overflow( op1,op2,result)) {
			XER |= XER_SO | XER_OV;
    		} else {
			XER &= ~XER_OV;
    		}
	}
	if(rc) {
		update_cr0(result);
	}
	fprintf(stderr,"instr i_addmex(%08x)\n",icode);
}

/*
 * -----------------------------------------------------------------
 * mullwx UISA Form XO
 * 
 * -----------------------------------------------------------------
 */
void 
i_mullwx(uint32_t icode) {
	int d = (icode>>21)&0x1f;	
	int a = (icode>>16)&0x1f;	
	int b = (icode>>11)&0x1f;	
	int rc = icode & 1;
	int oe = (icode>>10) & 1;
	uint32_t low,high;
	uint64_t prod;
	low = GPR(d) = prod = (int64_t)GPR(a) * (int64_t)GPR(b);
	if(oe) {
		high=prod>>32;
		if((high==0) || (high == 0xffffffff)) {
			XER=XER & ~XER_OV;
		} else {
			XER=XER | XER_OV | XER_SO;
		}
	}
	if(rc) {
		update_cr0(low);
	}
	fprintf(stderr,"instr i_mullwx(%08x)\n",icode);