ppc_arch_interface.c

skyeye_1_2_2_Rel.rar 最新skyeye源码

/* Simulator for the Renesas (formerly Hitachi) / SuperH Inc. SH architecture.

   Written by Steve Chamberlain of Cygnus Support.
   [e-mail]

   This file is part of SH sim


		THIS SOFTWARE IS NOT COPYRIGHTED

   Cygnus offers the following for use in the public domain.  Cygnus
   makes no warranty with regard to the software or it's performance
   and the user accepts the software "AS IS" with all faults.

   CYGNUS DISCLAIMS ANY WARRANTIES, EXPRESS OR IMPLIED, WITH REGARD TO
   THIS SOFTWARE INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
   MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.

*/

/*
 *  imported by Michael.Kang
 */ 
#ifdef HAVE_UNISTD_H
#include <unistd.h>
#endif


#include <stdio.h>
#include <stdlib.h>
#include <signal.h>
#ifdef HAVE_LIBREADLINE
#include <readline/readline.h>
#endif

#include "idecode_ppc.h"
#include "cpu_ppc.h"
#include "mmu_ppc.h"

#include "skyeye_config.h"

unsigned char * ppc_memory;

static void ppc_init_state(){
	static int done = 0;
	if(!done){
		/* initialize memeory and io */
		Bus_Init(NULL, 1*1024);

		/* Initialize powerpc cpu */
		PpcCpu_New(CPU_MPC823, 0x0);

		if ((ppc_memory = malloc(4096 * 1024)) != NULL){
			printf("Memory is initialize...\n");
		}
		else{
			fprintf(stderr, "Malloc is failed...\n");
			exit(-1);
		}
		done = 1;
	}
	
}
/*
 * reset the cpu state to initial value
 */
static void ppc_reset_state(){
}

/* Execute a single instruction.  */

static void
ppc_step_once ()
{
	InstructionProc *iproc;
	uint32_t icode;

	icode = MMU_IFetch(NIA);
	NIA += 4;
	iproc = InstructionProcFind(icode);
	//fprintf(stderr,"pc=0x%x,icode=0x%x,iproc=0x%x\n", NIA, icode, iproc);
	iproc(icode);
}
static void ppc_set_pc(WORD addr){
	NIA = addr;
}
static uint32_t ppc_get_pc(){
	return NIA;
}
static int
ppc_ICE_write_byte (WORD addr, uint8_t v)
{
	Bus_Write8(v,addr);	
	return 0;
}
static int 
ppc_ICE_read_byte(WORD addr, uint8_t *pv){
	*pv = Bus_Read8(addr);
	return 0;//fault=1
}

static int
ppc_parse_cpu (cpu_config_t * cpu, const char *param[])
{
	return 0;
}


static int
ppc_parse_mach (machine_config_t * cpu, const char *param[])
{
	return 0;	
}

static int ppc_parse_mem(int num_params, const char *params[]){
	return 0;
}

void init_ppc_arch(){
	static arch_config_t ppc_arch;

	ppc_arch.arch_name = "ppc";
        //ppc_arch.pc = 0;
        ppc_arch.init = ppc_init_state;
        ppc_arch.reset = ppc_reset_state;
        ppc_arch.set_pc = ppc_set_pc;
	ppc_arch.get_pc = ppc_get_pc;
        ppc_arch.step_once = ppc_step_once;
        ppc_arch.ICE_write_byte = ppc_ICE_write_byte;
	ppc_arch.ICE_read_byte = ppc_ICE_read_byte;
        ppc_arch.parse_cpu = ppc_parse_cpu;
        ppc_arch.parse_mach = ppc_parse_mach;
        ppc_arch.parse_mem = NULL;

        register_arch (&ppc_arch);
}