pcicfg.c

这是ARM在Vxworks的驱动源代码

/* @(#) pSOSystem PowerPC/V2.5.0: bsps/ylwknife/src/pcicfg.c (&U&) 4.5 99/05/27 10:21:52 */
/***********************************************************************/
/*                                                                     */
/*   MODULE:  bsps/ylwknife/src/pcicfg.c                               */
/*   DATE:    99/05/27                                                 */
/*   PURPOSE: Routines to dynamically configure PCI devices.           */
/*                                                                     */
/*---------------------------------------------------------------------*/
/*                                                                     */
/*           Copyright 1991 - 1999, Integrated Systems, Inc.           */
/*                      ALL RIGHTS RESERVED                            */
/*                                                                     */
/*   Permission is hereby granted to licensees of Integrated Systems,  */
/*   Inc. products to use or abstract this computer program for the    */
/*   sole purpose of implementing a product based on Integrated        */
/*   Systems, Inc. products.   No other rights to reproduce, use,      */
/*   or disseminate this computer program, whether in part or in       */
/*   whole, are granted.                                               */
/*                                                                     */
/*   Integrated Systems, Inc. makes no representation or warranties    */
/*   with respect to the performance of this computer program, and     */
/*   specifically disclaims any responsibility for any damages,        */
/*   special or consequential, connected with the use of this program. */
/*                                                                     */
/*---------------------------------------------------------------------*/
/*                                                                     */
/*                                                                     */
/*                                                                     */
/***********************************************************************/
/*#include "bsp.h" 
#include <bspfuncs.h>*/
#include "bsps.h"
#include "board.h"
#include "pci/pcihdr.h"
#include "sysEpic.h"


/*---------------------------------------------------------------------*/
/* External variables                                                  */
/*---------------------------------------------------------------------*/
extern PCI_LOC mpc106Hndl;

/*---------------------------------------------------------------------*/
/* Setup handle for the Winbond PCI/ISA bridge                         */
/*---------------------------------------------------------------------*/
PCI_LOC  pibHndl = {
      0x00,             /* PCI bus number of the PPC/PCI bridge */
      0x0B,             /* PCI device number of the PPC/PCI bridge */
      0x00,             /* PCI func number of the PPC/PCI brdige  */
      0,
      0
};
/*---------------------------------------------------------------------*/
/* specify the maximum entries of the PCI device list.                 */
/*---------------------------------------------------------------------*/
#define PCI_DEV_LIST_SIZE  32
PCI_LOC    pci_dev_list[PCI_DEV_LIST_SIZE];
 
PCI_ISA_INFO pciIsaInfo;
extern void BspRawPrint(char * format,...);
/*---------------------------------------------------------------------*/
/* local variables.                                                    */
/*---------------------------------------------------------------------*/
static long pci_init_err;
 
/***********************************************************************/
/* PciConfig(void): find and configure all devices on the PCI buses    */
/*                                                                     */
/* General PCI configure algorithm:                                    */
/* ================================                                    */
/*     Create a list of available PCI functions;                       */
/*     Disable all devices before we initialize any;                   */
/*     Allocate and assign PCI space to each device;                   */
/*     Initialize and enable each device.                              */
/*                                                                     */
/***********************************************************************/
void PciConfig(void)
{
    PCI_LOC *p_dev;
    long rc;
    long i;
    long hostBridge;
    unsigned short tmp;
    volatile UCHAR tmp1, tmp2;

    hostBridge = 0;
 
    /*-----------------------------------------------------------------*/
    /* Set the device list for the host-pci bridge 0                   */
    /*-----------------------------------------------------------------*/
    PciSetupDevList(pci_dev_list, PCI_DEV_LIST_SIZE, hostBridge);

    /*-----------------------------------------------------------------*/
    /* Initialize the structures used to track the PCI memory and IO   */
    /* space allocations.                                              */
    /*-----------------------------------------------------------------*/
    InitPciSpaces();

    /*-----------------------------------------------------------------*/
    /* Walk through the PCI buses to find all devices.                 */
    /* (don't need if there are only fix-configured devices            */
    /*-----------------------------------------------------------------*/

    rc = PciScanBus(hostBridge, MAXPCIDEV, 0, 0);

    pci_init_err = rc;

    /*-----------------------------------------------------------------*/
    /* Initialize each PCI function in the included function list.     */
    /*-----------------------------------------------------------------*/
    PciInitDevices(&pci_dev_list[1], PCI_DEV_LIST_SIZE - 1); 

/* Modified for 3660 --sxf 2k+1-2-28*/
/*
    PciSubBusSetIrq(0, 0, 0);
    */
}

/***********************************************************************/
/* PciCfgProbeRead(): Probe the PCI device.                            */
/*                                                                     */
/* By reading a non-exist location in the PCI configuration space,     */
/* a PCI master-abort will ge generated. On some boards, this event    */
/* may be converted to a mechine check exception, depeding on the      */
/* hardware design and setting. This routine should be protected from  */
/* such exception (for exmaple, using bspSetjmp() and  bsplongjmp().   */     
/*                                                                     */
/* If no device exists, return PCI_NOBODYHOME.                         */
/***********************************************************************/
ULONG PciCfgProbeRead(PCI_LOC * pci_loc, ULONG byteOffset)
{
#if 1

    /*-----------------------------------------------------------------*/
    /* We should disable disbale the NMI generated by the PCI master   */
    /* abort.                                                          */
    /*-----------------------------------------------------------------*/
    return PciCfgRead(pci_loc, byteOffset, PCI_REG_32BIT);
#else
    ULONG rc;
    ULONG errEnable;

    /*-----------------------------------------------------------------*/
    /* Save the ErrorEable Register 1 (ErrEnR1) and disable the Master */
    /* Abort and other errors.                                         */
    /*-----------------------------------------------------------------*/
    errEnable = PciCfgRead(&mpc106Hndl, 0xC0, PCI_REG_8BIT);
    PciCfgWrite(&mpc106Hndl, 0xC0, 0, PCI_REG_8BIT);

    rc = PciCfgRead(pci_loc, byteOffset, PCI_REG_32BIT);

    /*-----------------------------------------------------------------*/
    /* Clear the Error Detection and Status Register, and then         */
    /* Restore the ErrorEable Register 1                               */
    /*-----------------------------------------------------------------*/
    PciCfgWrite(&mpc106Hndl, 0xC1, 0xff, PCI_REG_8BIT);
    PciCfgWrite(&mpc106Hndl, 0xC7, 0xff, PCI_REG_8BIT);
    PciCfgWrite(&mpc106Hndl, 0xC0, errEnable, PCI_REG_8BIT);
    return rc;
#endif
}


/***********************************************************************/
/* PciFindIrq(): Get the IRQ for devices                               */
/*  Input:                                                             */
/*     pci_func:  specify which PCI device                             */
/*     intpin_no: which interrupt pin is used:                         */
/*                0: INTA, 1: INTB, 2: INTC; 3: INTD                   */
/*  Output:                                                            */
/*     *pIntrVec:  the logical interrupt vector which is used by       */
/*                                   PssSetIntHandler                  */
/*  Return:                                                            */
/*     IRQ value which will be written to interrupt line register      */
/***********************************************************************/
long  PciFindIrq(PCI_LOC *pci_func, long intpin_no, long *pIntrVec)
{
	ULONG device_no;
	ULONG func_no;
	short   bus_no;
	long ilevel;
	long irq;
	extern int bridge_bus[];
	
	bus_no = pci_func->bus;
	device_no = pci_func->device;
	func_no = pci_func->function;

	if (BoardInfoBoardType() == BOARD_TYPE_7200)
	{
		if ((device_no == 0x0)&&(bus_no == bridge_bus[0]))
			irq = EPIC_VEC_EXT_IRQ0+1; /* PCI Slot  */
		else if ((device_no == 0x0)&&(bus_no == bridge_bus[1]))
			irq = EPIC_VEC_EXT_IRQ0+5; /* PCI Slot  */
		else if ((device_no == 0x1)&&(bus_no == bridge_bus[0]))
			irq = EPIC_VEC_EXT_IRQ0+2; /* PCI Slot  */
		else if ((device_no == 0x1)&&(bus_no == bridge_bus[1]))
			irq = EPIC_VEC_EXT_IRQ0+6; /* PCI Slot  */
		else if ((device_no == 0x2)&&(bus_no == bridge_bus[0]))
			irq = EPIC_VEC_EXT_IRQ0+3; /* PCI Slot  */
		else if ((device_no == 0x2)&&(bus_no == bridge_bus[1]))
			irq = EPIC_VEC_EXT_IRQ0+7; /* PCI Slot  */
		else if ((device_no == 0x3)&&(bus_no == bridge_bus[0]))
			irq = EPIC_VEC_EXT_IRQ0+4; /* PCI Slot  */
		else if ((device_no == 0x3)&&(bus_no == bridge_bus[1]))
			irq = EPIC_VEC_EXT_IRQ0+8; /* PCI Slot  */
		else if ((device_no == 0x4)&&(bus_no == bridge_bus[0]))
			irq = EPIC_VEC_EXT_IRQ0+9; /* PCI Slot  */
		else if ((device_no == 0x4)&&(bus_no == bridge_bus[1]))
			irq = EPIC_VEC_EXT_IRQ0+10; /* PCI Slot  */
		else
			irq = 0xff;
	}
	if (BoardInfoBoardType() == BOARD_TYPE_3860)
	{
	
		if ((device_no == 0x1)&&(bus_no == bridge_bus[0]))
			irq = EPIC_VEC_EXT_IRQ0+1; /* PCI Slot	*/
		else if ((device_no == 0x2)&&(bus_no == bridge_bus[0]))
			irq = EPIC_VEC_EXT_IRQ0+2; /* PCI Slot	*/
		else if ((device_no == 0x3)&&(bus_no == bridge_bus[0]))
			irq = EPIC_VEC_EXT_IRQ0+1; /* PCI Slot	*/
		else if ((device_no == 0x4)&&(bus_no == bridge_bus[0]))
			irq = EPIC_VEC_EXT_IRQ0+2; /* PCI Slot	*/
		else if ((device_no == 0x1)&&(bus_no == bridge_bus[1]))
			irq = EPIC_VEC_EXT_IRQ0+5; /* PCI Slot	*/
		else if ((device_no == 0x2)&&(bus_no == bridge_bus[1]))
			irq = EPIC_VEC_EXT_IRQ0+6; /* PCI Slot	*/
		else if ((device_no == 0x3)&&(bus_no == bridge_bus[1]))
			irq = EPIC_VEC_EXT_IRQ0+5; /* PCI Slot	*/
		else if ((device_no == 0x4)&&(bus_no == bridge_bus[1]))
			irq = EPIC_VEC_EXT_IRQ0+6; /* PCI Slot	*/

		else
			irq = 0xff; 

	}
	*pIntrVec = irq;	
 
    return irq;
}  


/***********************************************************************/
/* Check if this device needs 16bit address space                      */
/***********************************************************************/
long PciDevNeed16bitIO(PCI_LOC *pci_func)
{
 
    switch(pci_func->dev_vend)
        {
        case INTL_PIIX_IDE_IDS:
            return TRUE;
        default:
            break;
        }
    return FALSE;
}