untitled.eq2

上载硬部线学校课程设计

ispDesignEXPERT 8.1

Design untitled created Tue Apr 18 19:24:36 2006

Title: hard-wired control unit

 P-Terms   Fan-in  Fan-out  Type  Name (attributes)
---------  ------  -------  ----  -----------------
   3/4        5        1    Pin   LDIR 
   3/3        5        1    Pin   LDPC 
   1/3        3        1    Pin   PC_ADD 
   2/2        3        1    Pin   M4 
   7/8       10        1    Pin   LDAR1 
   2/2        3        1    Pin   AR1_INC 
   2/2        3        1    Pin   M3 
   8/6        9        1    Pin   CEL 
   2/4        4        1    Pin   LRW 
   6/2        7        1    Pin   LDER 
   6/5        7        1    Pin   SW_BUS 
   4/4        6        1    Pin   RS_BUS 
   6/2        7        1    Pin   WRD 
   5/2        6        1    Pin   LDDR1 
   1/1        1        1    Pin   S2 
   2/1        2        1    Pin   S1 
   2/1        2        1    Pin   S0 
   5/4        7        1    Pin   ALU_BUS 
   6/8        9        1    Pin   TJ 
   8/4       10        1    Pin   SKIP 
   2/2        3        1    Node  MF1 
   1/3        3        1    Node  SSTO 
   2/2        3        1    Node  RUN.REG 
   1/1        1        1    Node  RUN.C 
   2/2        3        1    Node  STO.REG 
   1/1        1        1    Node  STO.C 
   1/3        3        1    Node  tKRR 
   1/3        3        1    Node  tKRD 
   1/3        3        1    Node  tKWE 
   1/3        3        1    Node  tKLD 
   1/3        3        1    Node  tPR 
   1/2        2        1    Node  KRR1 
   1/2        2        1    Node  KRD1 
   1/2        2        1    Node  KWE1 
   1/2        2        1    Node  KLD1 
   1/2        2        1    Node  PR1 
   1/2        2        1    Node  KRR2 
   1/2        2        1    Node  KRD2 
   1/2        2        1    Node  KWE2 
   1/2        2        1    Node  KLD2 
   1/2        2        1    Node  PR2 
   1/5        5        1    Node  ADD 
   1/5        5        1    Node  SUB 
   1/5        5        1    Node  MUL 
   1/5        5        1    Node  AND 
   1/5        5        1    Node  LDA 
   1/5        5        1    Node  STA 
   1/5        5        1    Node  JMP 
   1/5        5        1    Node  JC 
   1/5        5        1    Node  STP 
=========
 114/159        Best P-Term Total: 93
                       Total Pins: 35
                      Total Nodes: 28
            Average P-Term/Output: 1


Equations:

LDIR = (PR2 & W1
     # KRR2 & W2
     # KLD2 & W2);

LDPC = (W4 & JMP
     # W4 & PR1
     # W4 & JC & C);

PC_ADD = (W4 & JC & C);

M4 = (W4 & PR1
     # W4 & JMP);

LDAR1 = (PR2 & W1
     # W4 & KLD1
     # W4 & KWE1
     # W4 & KRD1
     # W4 & KRR1
     # LDA & W2
     # STA & W2);

AR1_INC = (W4 & KRD2
     # W4 & KWE2);

M3 = (W4 & KRR1
     # W4 & KLD1);

CEL = (!W3 & !STA & !KRD2 & !KWE2 & !KLD2 & !KRR2
     # !W4 & !W3 & !KRD2 & !KWE2 & !KLD2 & !KRR2
     # !STA & !KRD2 & !KWE2 & !KLD2 & !KRR2 & !LDA
     # !W4 & !KRD2 & !KWE2 & !KLD2 & !KRR2 & !LDA
     # !W3 & !STA & !W1
     # !W4 & !W3 & !W1
     # !STA & !W1 & !LDA
     # !W4 & !W1 & !LDA);

LRW = (KRD2 & W1
     # W3 & LDA);

LDER = (W3 & KLD2
     # AND & W3
     # MUL & W3
     # SUB & W3
     # ADD & W3
     # W3 & LDA);

SW_BUS = (!W4 & !KWE2 & !KLD2 & !KRR2
     # STO & !KWE2 & !KLD2 & !KRR2
     # !W4 & !W3 & !W1
     # STO & !W3 & !W1
     # !W4 & !KLD2 & !W1
     # STO & !KLD2 & !W1);

RS_BUS = (!STA & !KRR2 & !LDA & !JMP
     # !W4 & !STA & !LDA
     # !KRR2 & !W2 & !JMP
     # !W4 & !W2);

WRD = (W4 & KLD2
     # W4 & AND
     # W4 & MUL
     # W4 & SUB
     # W4 & ADD
     # W4 & LDA);

LDDR1 = (STA & W2
     # AND & W2
     # MUL & W2
     # SUB & W2
     # ADD & W2);

S2 = (MUL);

S1 = (ADD
     # SUB);

S0 = (SUB
     # STA);

ALU_BUS = (AND & W3
     # MUL & W3
     # SUB & W3
     # ADD & W3
     # W4 & STA);

TJ = (KLD2 & W2
     # KRD2 & W1
     # W4 & tKLD
     # W4 & tKWE
     # W4 & tKRR
     # W4 & STP);

SKIP = (KWE2 & W1
     # KRD2 & W1
     # !STO & W1
     # W2 & JC
     # W2 & JMP
     # KRR2 & W2
     # STA & W2
     # W2 & STP);

MF1 = (!CLR & MF
     # T1);

SSTO = (!STO & RUN & W4);

RUN := (CLR & !STO
     # CLR & RUN);

RUN.C = (MF1);

STO := (CLR & STO
     # CLR & SSTO);

STO.C = (MF1);

tKRR = (SWC & !SWB & !SWA);

tKRD = (!SWC & !SWB & SWA);

tKWE = (!SWC & SWB & !SWA);

tKLD = (!SWC & SWB & SWA);

tPR = (!SWC & !SWB & !SWA);

KRR1 = (!STO & tKRR);

KRD1 = (!STO & tKRD);

KWE1 = (!STO & tKWE);

KLD1 = (!STO & tKLD);

PR1 = (!STO & tPR);

KRR2 = (STO & tKRR);

KRD2 = (STO & tKRD);

KWE2 = (STO & tKWE);

KLD2 = (STO & tKLD);

PR2 = (STO & tPR);

ADD = (PR2 & !IR7 & !IR6 & !IR5 & !IR4);

SUB = (PR2 & !IR7 & !IR6 & !IR5 & IR4);

MUL = (PR2 & !IR7 & !IR6 & IR5 & !IR4);

AND = (PR2 & !IR7 & !IR6 & IR5 & IR4);

LDA = (PR2 & !IR7 & IR6 & !IR5 & IR4);

STA = (PR2 & !IR7 & IR6 & !IR5 & !IR4);

JMP = (PR2 & IR7 & !IR6 & !IR5 & !IR4);

JC = (PR2 & IR7 & !IR6 & !IR5 & IR4);

STP = (PR2 & !IR7 & IR6 & IR5 & !IR4);


Reverse-Polarity Equations:

!LDIR = (!KLD2 & !KRR2 & !W1
     # !PR2 & !KLD2 & !KRR2
     # !W1 & !W2
     # !PR2 & !W2);

!LDPC = (!PR1 & !JMP & !JC
     # !PR1 & !JMP & !C
     # !W4);

!PC_ADD = (!JC
     # !W4
     # !C);

!M4 = (!PR1 & !JMP
     # !W4);

!LDAR1 = (!STA & !W1 & !LDA & !KRR1 & !KRD1 & !KWE1 & !KLD1
     # !PR2 & !STA & !LDA & !KRR1 & !KRD1 & !KWE1 & !KLD1
     # !W1 & !KRR1 & !KRD1 & !KWE1 & !KLD1 & !W2
     # !PR2 & !KRR1 & !KRD1 & !KWE1 & !KLD1 & !W2
     # !W4 & !STA & !W1 & !LDA
     # !W4 & !PR2 & !STA & !LDA
     # !W4 & !W1 & !W2
     # !W4 & !PR2 & !W2);

!AR1_INC = (!KRD2 & !KWE2
     # !W4);

!M3 = (!KRR1 & !KLD1
     # !W4);

!CEL = (W4 & STA
     # KRR2 & W1
     # KLD2 & W1
     # KWE2 & W1
     # KRD2 & W1
     # W3 & LDA);

!LRW = (!W3 & !W1
     # !W3 & !KRD2
     # !W1 & !LDA
     # !KRD2 & !LDA);

!LDER = (!ADD & !SUB & !MUL & !AND & !KLD2 & !LDA
     # !W3);

!SW_BUS = (W3 & KLD2
     # !STO & W4
     # KRR2 & W1
     # KWE2 & W1
     # KLD2 & W1);

!RS_BUS = (W4 & KRR2
     # LDA & W2
     # STA & W2
     # W4 & JMP);

!WRD = (!ADD & !SUB & !MUL & !AND & !KLD2 & !LDA
     # !W4);

!LDDR1 = (!ADD & !SUB & !MUL & !AND & !STA
     # !W2);

!S2 = (!MUL);

!S1 = (!ADD & !SUB);

!S0 = (!SUB & !STA);

!ALU_BUS = (!W4 & !ADD & !SUB & !MUL & !AND
     # !ADD & !SUB & !MUL & !AND & !STA
     # !W4 & !W3
     # !W3 & !STA);

!TJ = (!tKRR & !tKWE & !tKLD & !W1 & !W2 & !STP
     # !tKRR & !tKWE & !tKLD & !KRD2 & !W2 & !STP
     # !tKRR & !tKWE & !tKLD & !KLD2 & !W1 & !STP
     # !tKRR & !tKWE & !tKLD & !KRD2 & !KLD2 & !STP
     # !W4 & !W1 & !W2
     # !W4 & !KRD2 & !W2
     # !W4 & !KLD2 & !W1
     # !W4 & !KRD2 & !KLD2);

!SKIP = (STO & !STA & !KRD2 & !KWE2 & !KRR2 & !JMP & !JC & !STP
     # !STA & !KRR2 & !W1 & !JMP & !JC & !STP
     # STO & !KRD2 & !KWE2 & !W2
     # !W1 & !W2);

!MF1 = (!MF & !T1
     # CLR & !T1);

!SSTO = (!RUN
     # STO
     # !W4);

!RUN := (STO & !RUN
     # !CLR);

!RUN.C = (!MF1);

!STO := (!STO & !SSTO
     # !CLR);

!STO.C = (!MF1);

!tKRR = (SWB
     # !SWC
     # SWA);

!tKRD = (SWB
     # SWC
     # !SWA);

!tKWE = (!SWB
     # SWC
     # SWA);

!tKLD = (!SWB
     # SWC
     # !SWA);

!tPR = (SWB
     # SWC
     # SWA);

!KRR1 = (STO
     # !tKRR);

!KRD1 = (STO
     # !tKRD);

!KWE1 = (STO
     # !tKWE);

!KLD1 = (STO
     # !tKLD);

!PR1 = (STO
     # !tPR);

!KRR2 = (!STO
     # !tKRR);

!KRD2 = (!STO
     # !tKRD);

!KWE2 = (!STO
     # !tKWE);

!KLD2 = (!STO
     # !tKLD);

!PR2 = (!STO
     # !tPR);

!ADD = (IR5
     # IR6
     # IR7
     # !PR2
     # IR4);

!SUB = (IR5
     # IR6
     # IR7
     # !PR2
     # !IR4);

!MUL = (!IR5
     # IR6
     # IR7
     # !PR2
     # IR4);

!AND = (!IR5
     # IR6
     # IR7
     # !PR2
     # !IR4);

!LDA = (IR5
     # !IR6
     # IR7
     # !PR2
     # !IR4);

!STA = (IR5
     # !IR6
     # IR7
     # !PR2
     # IR4);

!JMP = (IR5
     # IR6
     # !IR7
     # !PR2
     # IR4);

!JC = (IR5
     # IR6
     # !IR7
     # !PR2
     # !IR4);

!STP = (!IR5
     # !IR6
     # IR7
     # !PR2
     # IR4);