📄 mvflash.c
字号:
MV_READ_SHORT(FLASH_BASE_ADDR, offset + 2,&rs);
if((rs & data80) == (s & data80))
break; /* DQ7 = DATA */
else
{
mvFlashReset();
return false; /* DQ7 != DATA */
}
}
}
return true;
case 4:
case 8:
if (FLASH_MODE == X16)
{
FirstData = 0x00aa00aa;
SecondData = 0x00550055;
ThirdData = 0x00a000a0;
FirstAddr = 0x5555;
SecondAddr = 0x2aaa;
ThirdAddr = 0x5555;
}
else /* (FLASH_MODE == 8) */
{
FirstData = 0xaaaaaaaa; /* Data for the First Cycle */
SecondData = 0x55555555; /* Data for the Second Cycle */
ThirdData = 0xa0a0a0a0; /* Data for the Third Cycle */
FirstAddr = 0xaaaaaaaa; /* Address for the First Cycle */
SecondAddr = 0x55555555; /* Address for the Second Cycle */
ThirdAddr = 0xaaaaaaaa; /* Address for the Third Cycle */
}
MV_WRITE_WORD(FLASH_BASE_ADDR, FirstAddr *
FLASH_WIDTH + offset % FLASH_WIDTH,FirstData);
MV_WRITE_WORD(FLASH_BASE_ADDR, SecondAddr *
FLASH_WIDTH + offset % FLASH_WIDTH,SecondData);
MV_WRITE_WORD(FLASH_BASE_ADDR, ThirdAddr *
FLASH_WIDTH + offset % FLASH_WIDTH,ThirdData);
/* writting the word. */
MV_WRITE_WORD(FLASH_BASE_ADDR, offset,data);
/* preparing the polling patterns. */
if (FLASH_MODE == X16)
{
data80 = 0x00800080;
data20 = 0x00200020;
}
else /* (FLASH_MODE == 8) */
{
data80 = 0x80808080;
data20 = 0x20202020;
}
while(true) /* polling loop. */
{
rw = MV_READWORD(FLASH_BASE_ADDR, offset);
/* DQ7 =? DATA */
if((rw & data80) == (data & data80))
break; /* DQ7 = DATA */
if((rw & data20) == data20) /* DQ5 =? '1' */
{
rw = MV_READWORD(FLASH_BASE_ADDR, offset);
if((rw & data80) == (data & data80))
break; /* DQ7 = DATA */
else
return false; /* DQ7 != DATA */
}
}
return true;
default:
return false; /* case of invalid flash Width. */
}
}
else /* Intel/Micron */
{
switch(FLASH_WIDTH)
{
case 1:
/* Writing First Byte */
mvFlashReset();
count=0;
while (count<100)
{
MV_WRITE_CHAR(FLASH_BASE_ADDR,0,0x10);
#ifdef LE
c = data;
#else
c = (data >> 24);
#endif
MV_WRITE_CHAR(FLASH_BASE_ADDR, offset,c);
while(true)
{
/* Reading STATUS Register */
MV_WRITE_CHAR(FLASH_BASE_ADDR,0,0x70);
regValue = MV_READCHAR(FLASH_BASE_ADDR,0);
if((regValue & 0x80) == 0x80)
break; /* Case of Write-Operation had Ended */
}
/* Reading STATUS Register for Writing Verification */
MV_WRITE_CHAR(FLASH_BASE_ADDR,0,0x70);
regValue = MV_READCHAR(FLASH_BASE_ADDR,0);
if((regValue & 0x10) == 0x10)
return false; /* Write failure */
count++;
mvFlashReset();
if (MV_READCHAR(FLASH_BASE_ADDR, offset) == c)
{
break;
}
}
/* Writing Second Byte */
#ifdef LE
c = (data >> 8);
#else
c = (data >> 16);
#endif
count = 0;
while (count<100) {
MV_WRITE_CHAR(FLASH_BASE_ADDR, 1,0x10);
MV_WRITE_CHAR(FLASH_BASE_ADDR, offset + 1,c);
while(true)
{
/* Reading STATUS Register */
MV_WRITE_CHAR(FLASH_BASE_ADDR, 1,0x70);
regValue = MV_READCHAR(FLASH_BASE_ADDR, 1);
if((regValue & 0x80) == 0x80)
break; /* Write operation ended */
}
/* Reading STATUS Register for Writing verification */
MV_WRITE_CHAR(FLASH_BASE_ADDR, 1,0x70);
regValue = MV_READCHAR(FLASH_BASE_ADDR, 1);
if((regValue & 0x10) == 0x10)
return false; /* Write failure */
count++;
mvFlashReset();
if (MV_READCHAR(FLASH_BASE_ADDR, offset+1) == c) {
break;
}
}
/* Writing Third Byte */
#ifdef LE
c = (data >> 16);
#else
c = (data >> 8);
#endif
count = 0;
while (count<100) {
MV_WRITE_CHAR(FLASH_BASE_ADDR, 2,0x10);
MV_WRITE_CHAR(FLASH_BASE_ADDR, offset + 2,c);
while(true)
{
/* Reading STATUS Register */
MV_WRITE_CHAR(FLASH_BASE_ADDR, 2,0x70);
regValue = MV_READCHAR(FLASH_BASE_ADDR, 2);
if((regValue & 0x80) == 0x80)
break; /* Write operation ended */
}
/* Reading STATUS Register for Writing Verification */
MV_WRITE_CHAR(FLASH_BASE_ADDR, 2,0x70);
regValue = MV_READCHAR(FLASH_BASE_ADDR, 2);
if((regValue & 0x10) == 0x10)
return false; /* Write failure */
count++;
mvFlashReset();
if (MV_READCHAR(FLASH_BASE_ADDR, offset+2) == c) {
break;
}
}
/* Writing Fourth Byte */
#ifdef LE
c = (data >> 24);
#else
c = data;
#endif
count = 0;
while (count<100) {
MV_WRITE_CHAR(FLASH_BASE_ADDR, 3,0x10);
MV_WRITE_CHAR(FLASH_BASE_ADDR, offset + 3,c);
while(true)
{
/* Reading STATUS Register */
MV_WRITE_CHAR(FLASH_BASE_ADDR, 3,0x70);
regValue = MV_READCHAR(FLASH_BASE_ADDR, 3);
if((regValue & 0x80) == 0x80)
break; /* Write operation ended */
}
/* Reading STATUS Register for Writing Verification */
MV_WRITE_CHAR(FLASH_BASE_ADDR, 3,0x70);
regValue = MV_READCHAR(FLASH_BASE_ADDR, 3);
if((regValue & 0x10) == 0x10)
return false; /* Write failure */
count++;
mvFlashReset();
if (MV_READCHAR(FLASH_BASE_ADDR, offset+3) == c) {
break;
}
}
return true;
case 2:
if (FLASH_MODE == X16) /* Case of one X16 bit device */
{
FirstData = 0x0010; /* Data for the First Cycle */
}
else /* if (FLASH_MODE == 8) ==> Case of two X8 bit devices */
{
FirstData = 0x1010; /* Data for the First Cycle */
}
/* Writing First two Bytes */
MV_WRITE_SHORT(FLASH_BASE_ADDR,0,FirstData);
#ifdef LE
s = data;
#else
s = (data >> 16);
#endif
MV_WRITE_SHORT(FLASH_BASE_ADDR, offset,s);
if (FLASH_MODE == X16)
{
data70 = 0x0070;
data80 = 0x0080;
data10 = 0x0010;
}
else /* case of (FLASH_MODE == X8) */
{
data70 = 0x7070;
data80 = 0x8080;
data10 = 0x1010;
}
/* polling on writing action => when done break. */
while(true)
{
MV_WRITE_SHORT(FLASH_BASE_ADDR,0,data70);
regValue = MV_READSHORT(FLASH_BASE_ADDR,0);
if((regValue & data80) == data80)
break;
}
/* Reading STATUS Register for Writing Verification */
MV_WRITE_SHORT(FLASH_BASE_ADDR,0,data70);
regValue = MV_READSHORT(FLASH_BASE_ADDR,0);
if((regValue & data10) == data10)
return false; /* Write failure */
/* Writing Last two Bytes */
MV_WRITE_SHORT(FLASH_BASE_ADDR, offset + 2,FirstData);
#ifdef LE
s = (data >> 16);
#else
s = data;
#endif
MV_WRITE_SHORT(FLASH_BASE_ADDR, offset + 2,s);
/* polling on writing action => when done break. */
while(true)
{
MV_WRITE_SHORT(FLASH_BASE_ADDR, 2,data70);
regValue = MV_READSHORT(FLASH_BASE_ADDR, 2);
if((regValue & data80) == data80)
break;
}
/* Reading STATUS Register for Writing Verification */
MV_WRITE_CHAR(FLASH_BASE_ADDR,0,data70);
regValue = MV_READCHAR(FLASH_BASE_ADDR,0);
if((regValue & data10) == data10)
return false; /* Write failure */
mvFlashReset();
return true;
case 4:
case 8:
if (FLASH_MODE == X16) /* Case of one X16 bit device */
{
FirstData = 0x00100010; /* Data for the First Cycle */
}
else /* (FLASH_MODE == 8) ==> Case of two X8 bit devices */
{
FirstData = 0x10101010; /* Data for the First Cycle */
}
MV_WRITE_WORD(FLASH_BASE_ADDR, offset % FLASH_WIDTH,FirstData);
/* writing the 32-bit data to flash. */
MV_WRITE_WORD(FLASH_BASE_ADDR, offset,data);⌨️ 快捷键说明
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