📄 main.s
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;----------------------------
; CPU : uPD789166
; Clock : 4.00MHz
; System : hvft
; Date : 2005/05/26
;----------------------------
;----------------------------
; Const Table here
;----------------------------
;----------------------------
; Vector table here
;----------------------------
VtTab0 Cseg At 0000h
Dw start ;reset adress
;---------------------------
VtTab1 Cseg At 0004h
Dw start ;intwdt 0004h-0005h
Dw intp0 ;intp0 0006h-0007h
Dw intp1 ;intp1 0008h-0009h
Dw intp2 ;intp2 000ah-000bh
Dw start ;intp3 000ch-000dh
Dw start ;intsr20 000eh-000fh
Dw start ;intst20 0010h-0011h
Dw start ;intwt 0012h-0013h
Dw intwti ;intwti 0014h-0015h
Dw start ;inttm80 0016h-0017h buz
Dw inttm81 ;inttm81 0018h-0019h remo timer
Dw inttm82 ;inttm82 001ah-001bh timer
Dw inttm90 ;inttm90 001ch-001dh fan speed ctrl
;---------------------------
VtTab2 Cseg At 0022h
DW start ;intad0 00
;Vector table end here
;___________________________________
; RAM Area here
; UserRam dseg At 0fe20h
extrn _main
;___________________________________
MainPro Cseg At 0080h
start:
nop
nop
nop
nop
nop
di
PCC = #00h ; /* Page85 */
ax = #0fe20h
sp = ax
nop
nop
for (a=#0; a<#50; a++)
nop
next
nop
DI
PCC = #00h ; /* Page85 */
ax = #0fe20h
sp = ax
mov a,0fe20h ;the variable data
xor a,0fe21h
xor a,0fe22h
mov d,a
;___________________________________
movw hl,#0fd00h ;clear ram:0fd00h-0fdffh
mov a,#00h
ramclr1:
mov [hl],a
inc l
bnz $ramclr1
mov a,#00
movw hl,#0fedfh
ramclr2:
mov [hl],a
dec l
bnz $ramclr2
extrn _E2RomWork
mov a,d
mov _E2RomWork,a ;the E2PRom test data
;___________________________________
loop:
nop
nop
call !_main
nop
nop
goto loop
nop
nop
goto loop
;___________________________________
extrn _int_tm90
inttm90:
push ax
push bc
push de
push hl
call !_int_tm90
pop hl
pop de
pop bc
pop ax
reti
;___________________________________
extrn _int_wti
intwti:
push ax
push bc
push de
push hl
call !_int_wti
pop hl
pop de
pop bc
pop ax
reti
;___________________________________
extrn _int_tm81
inttm81:
push ax
push bc
push de
push hl
call !_int_tm81
pop hl
pop de
pop bc
pop ax
reti
;___________________________________
extrn _int_tm82
inttm82:
push ax
push bc
push de
push hl
call !_int_tm82
pop hl
pop de
pop bc
pop ax
reti
;___________________________________
extrn _int_p0
intp0:
push ax
push bc
push de
push hl
call !_int_p0
pop hl
pop de
pop bc
pop ax
reti
;___________________________________
extrn _int_p1
intp1:
push ax
push bc
push de
push hl
call !_int_p1
pop hl
pop de
pop bc
pop ax
reti
;___________________________________
extrn _int_p2
intp2:
push ax
push bc
push de
push hl
call !_int_p2
pop hl
pop de
pop bc
pop ax
reti
;___________________________________
;-----------------------------
; 32位/16位乘法
;入口参数:[Gao16bit+1][Gao16bit][Di16bit+1][Di16bit] / [ChuShu16bit+1][ChuShu16bit]
;结果 :[Di16bit+1][Di16bit]
;余数 :[Gao16bit+1][Gao16bit]
;extrn _divcnt
extrn _tempa
extrn _Gao16bit,_Di16bit,_ChuShu16bit
extbit _F0
public _div32_16
; [bc][de] / [hl]
_div32_16:
movw ax,_Di16bit
movw de,ax
movw ax,_Gao16bit
movw bc,ax
movw ax,_ChuShu16bit
movw hl,ax
; mov _divcnt,#16
mov _tempa,#16
mov a,c ; [bc] < [hl] ?
sub a,l
mov a,b
subc a,h
bc $divon16
set1 _F0
ret
divon16:
clr1 cy
mov a,e
rolc a,1
mov e,a
mov a,d
rolc a,1
mov d,a
mov a,c
rolc a,1
mov c,a
xch a,b
rolc a,1
xch a,b
;mov1 _F0,cy
clr1 _F0
if_bit (cy)
set1 _F0
endif
clr1 cy
sub a,l
mov x,a
mov a,b
subc a,h
bt _F0,$divsucc16
bc $ndvd32
divsucc16:
mov b,a
mov a,x
mov c,a
inc e
ndvd32:
; dec _divcnt
dec _tempa
bnz $divon16
clr1 _F0
movw ax,de
movw _Di16bit,ax
movw ax,bc
movw _Gao16bit,ax
ret
;-------------------------------
public _div16_8
;[Gao8bit][Di8bit] / [ChuShu8bit]
;[Di8bit] : result
;[Gao8bit] : remainder
extrn _Gao8bit,_Di8bit,_ChuShu8bit
_div16_8: ; word / byte
mov b,#8
mov a,_Gao8bit
sub a,_ChuShu8bit
bc $divon
set1 _F0
ret
divon:
clr1 cy
mov a,_Di8bit
rolc a,1
mov _Di8bit,a
mov a,_Gao8bit
rolc a,1
mov _Gao8bit,a
clr1 _F0
if_bit (cy)
set1 _F0
endif
clr1 cy
sub a,_ChuShu8bit
bt _F0,$divsucc
bc $ndvd1
divsucc:
mov _Gao8bit,a
inc _Di8bit
ndvd1:
dbnz b,$divon
clr1 _F0
ret
;___________________________________
end
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