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📄 ether3.c

📁 arm平台上的uclinux系统全部源代码
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/* * linux/drivers/net/ether3.c * * SEEQ nq8005 ethernet driver for Acorn/ANT Ether3 card *  for Acorn machines * * By Russell King, with some suggestions from borris@ant.co.uk * * Changelog: * 1.04	RMK	29/02/1996	Won't pass packets that are from our ethernet *				address up to the higher levels - they're *				silently ignored.  I/F can now be put into *				multicast mode.  Receiver routine optimised. * 1.05	RMK	30/02/1996	Now claims interrupt at open when part of *				the kernel rather than when a module. * 1.06	RMK	02/03/1996	Various code cleanups * 1.07	RMK	13/10/1996	Optimised interrupt routine and transmit *				routines. * 1.08	RMK	14/10/1996	Fixed problem with too many packets, *				prevented the kernel message about dropped *				packets appearing too many times a second. *				Now does not disable all IRQs, only the IRQ *				used by this card. * 1.09	RMK	10/11/1996	Only enables TX irq when buffer space is low, *				but we still service the TX queue if we get a *				RX interrupt. * 1.10	RMK	15/07/1997	Fixed autoprobing of NQ8004. * 1.11	RMK	16/11/1997	Fixed autoprobing of NQ8005A. * 1.13	RMK	29/06/1998	Fixed problem with transmission of packets. *				Chip seems to have a bug in, whereby if the *				packet starts two bytes from the end of the *				buffer, it corrupts the receiver chain, and *				never updates the transmit status correctly. * 1.14	RMK	07/01/1998	Added initial code for ETHERB addressing. * * TODO: *  When we detect a fatal error on the interface, we should restart it. */static char *version = "ether3 ethernet driver (c) 1995-1999 R.M.King v1.14\n";#include <linux/module.h>#include <linux/kernel.h>#include <linux/sched.h>#include <linux/types.h>#include <linux/fcntl.h>#include <linux/interrupt.h>#include <linux/ptrace.h>#include <linux/ioport.h>#include <linux/in.h>#include <linux/malloc.h>#include <linux/string.h>#include <linux/errno.h>#include <linux/netdevice.h>#include <linux/etherdevice.h>#include <linux/skbuff.h>#include <asm/system.h>#include <asm/bitops.h>#include <asm/ecard.h>#include <asm/delay.h>#include <asm/io.h>#include <asm/irq.h>#include "ether3.h"static unsigned int net_debug = NET_DEBUG;static const card_ids ether3_cids[] = {	{ MANU_ANT2, PROD_ANT_ETHER3 },	{ MANU_ANT,  PROD_ANT_ETHER3 },	{ MANU_ANT,  PROD_ANT_ETHERB }, /* trial - will etherb work? */	{ 0xffff, 0xffff }};static void ether3_setmulticastlist(struct device *dev);static int  ether3_rx(struct device *dev, struct dev_priv *priv, unsigned int maxcnt);static void ether3_tx(struct device *dev, struct dev_priv *priv);extern int inswb(int reg, void *buffer, int len);extern int outswb(int reg, void *buffer, int len);#define BUS_16		2#define BUS_8		1#define BUS_UNKNOWN	0/* * I'm not sure what address we should default to if the internal one * is corrupted... */unsigned char def_eth_addr[6] = {0x00, 0x01, 0x02, 0x03, 0x04, 0x05};/* --------------------------------------------------------------------------- */typedef enum {	buffer_write,	buffer_read} buffer_rw_t;/* * ether3 read/write.  Slow things down a bit... */#define ether3_outb(v,r)	{ outb((v),(r)); udelay(1); }#define ether3_outw(v,r)	{ outw((v),(r)); udelay(1); }#define ether3_inb(r)		({ unsigned int __v = inb((r)); udelay(1); __v; })#define ether3_inw(r)		({ unsigned int __v = inw((r)); udelay(1); __v; })static intether3_setbuffer(struct device *dev, buffer_rw_t read, int start){	struct dev_priv *priv = (struct dev_priv *)dev->priv;	int timeout = 1000;	ether3_outw(priv->regs.config1 | CFG1_LOCBUFMEM, REG_CONFIG1);	ether3_outw(priv->regs.command | CMD_FIFOWRITE, REG_COMMAND);	while ((ether3_inw(REG_STATUS) & STAT_FIFOEMPTY) == 0) {		if (!timeout--) {			printk("%s: setbuffer broken\n", dev->name);			priv->broken = 1;			return 1;		}		udelay(1);	}	if (read == buffer_read) {		ether3_outw(start, REG_DMAADDR);		ether3_outw(priv->regs.command | CMD_FIFOREAD, REG_COMMAND);	} else {		ether3_outw(priv->regs.command | CMD_FIFOWRITE, REG_COMMAND);		ether3_outw(start, REG_DMAADDR);	}	return 0;}/* * write data to the buffer memory */#define ether3_writebuffer(dev,data,length)			\	outswb(REG_BUFWIN, (data), (length))#define ether3_writeword(dev,data)				\	outw((data), REG_BUFWIN)#define ether3_writelong(dev,data)	{			\	unsigned long reg_bufwin = REG_BUFWIN;			\	outw((data), reg_bufwin);				\	outw((data) >> 16, reg_bufwin);				\}/* * read data from the buffer memory */#define ether3_readbuffer(dev,data,length)			\	inswb(REG_BUFWIN, (data), (length))#define ether3_readword(dev)					\	inw(REG_BUFWIN)#define ether3_readlong(dev)	 				\	inw(REG_BUFWIN) | (inw(REG_BUFWIN) << 16)/* * Switch LED off... */static voidether3_ledoff(unsigned long data){	struct device *dev = (struct device *)data;	struct dev_priv *priv = (struct dev_priv *)dev->priv;	ether3_outw(priv->regs.config2 |= CFG2_CTRLO, REG_CONFIG2);}/* * switch LED on... */static inline voidether3_ledon(struct device *dev, struct dev_priv *priv){	del_timer(&priv->timer);	priv->timer.expires = jiffies + HZ / 50; /* leave on for 1/50th second */	priv->timer.data = (unsigned long)dev;	priv->timer.function = ether3_ledoff;	add_timer(&priv->timer);	if (priv->regs.config2 & CFG2_CTRLO)		ether3_outw(priv->regs.config2 &= ~CFG2_CTRLO, REG_CONFIG2);}/* * Read the ethernet address string from the on board rom. * This is an ascii string!!! */static voidether3_addr(char *addr, struct expansion_card *ec){	struct in_chunk_dir cd;	char *s;		if (ecard_readchunk(&cd, ec, 0xf5, 0) && (s = strchr(cd.d.string, '('))) {		int i;		for (i = 0; i<6; i++) {			addr[i] = simple_strtoul(s + 1, &s, 0x10);			if (*s != (i==5?')' : ':' ))				break;		}		if (i == 6)			return;	}	/* I wonder if we should even let the user continue in this case	 *   - no, it would be better to disable the device	 */	printk(KERN_ERR "ether3: Couldn't read a valid MAC address from card.\n");	memcpy(addr, def_eth_addr, 6);}/* --------------------------------------------------------------------------- */static intether3_ramtest(struct device *dev, unsigned char byte){	unsigned char *buffer = kmalloc(RX_END, GFP_KERNEL);	int i,ret = 0;	int max_errors = 4;	int bad = -1;	if (!buffer)		return 1;	memset(buffer, byte, RX_END);	ether3_setbuffer(dev, buffer_write, 0);	ether3_writebuffer(dev, buffer, TX_END);	ether3_setbuffer(dev, buffer_write, RX_START);	ether3_writebuffer(dev, buffer + RX_START, RX_LEN);	memset(buffer, byte ^ 0xff, RX_END);	ether3_setbuffer(dev, buffer_read, 0);	ether3_readbuffer(dev, buffer, TX_END);	ether3_setbuffer(dev, buffer_read, RX_START);	ether3_readbuffer(dev, buffer + RX_START, RX_LEN);	for (i = 0; i < RX_END; i++) {		if (buffer[i] != byte) {			if (max_errors > 0 && bad != buffer[i]) {				printk("%s: RAM failed with (%02X instead of %02X) at 0x%04X",				       dev->name, buffer[i], byte, i);				ret = 2;				max_errors--;				bad = i;			}		} else {			if (bad != -1) {				if (bad != i - 1)					printk(" - 0x%04X\n", i - 1);				printk("\n");				bad = -1;			}		}	}	if (bad != -1)		printk(" - 0xffff\n");	kfree(buffer);	return ret;}/* ------------------------------------------------------------------------------- */static intether3_init_2(struct device *dev){	struct dev_priv *priv = (struct dev_priv *)dev->priv;	int i;	priv->regs.config1 = CFG1_RECVCOMPSTAT0|CFG1_DMABURST8;	priv->regs.config2 = CFG2_CTRLO|CFG2_RECVCRC|CFG2_ERRENCRC;	priv->regs.command = 0;	/*	 * Set up our hardware address	 */	ether3_outw(priv->regs.config1 | CFG1_BUFSELSTAT0, REG_CONFIG1);	for (i = 0; i < 6; i++)		ether3_outb(dev->dev_addr[i], REG_BUFWIN);	if (dev->flags & IFF_PROMISC)		priv->regs.config1 |= CFG1_RECVPROMISC;	else if (dev->flags & IFF_MULTICAST)		priv->regs.config1 |= CFG1_RECVSPECBRMULTI;	else		priv->regs.config1 |= CFG1_RECVSPECBROAD;	/*	 * There is a problem with the NQ8005 in that it occasionally loses the	 * last two bytes.  To get round this problem, we receive the CRC as	 * well.  That way, if we do loose the last two, then it doesn't matter.	 */	ether3_outw(priv->regs.config1 | CFG1_TRANSEND, REG_CONFIG1);	ether3_outw((TX_END>>8) - 1, REG_BUFWIN);	ether3_outw(priv->rx_head, REG_RECVPTR);	ether3_outw(0, REG_TRANSMITPTR);	ether3_outw(priv->rx_head >> 8, REG_RECVEND);	ether3_outw(priv->regs.config2, REG_CONFIG2);	ether3_outw(priv->regs.config1 | CFG1_LOCBUFMEM, REG_CONFIG1);	ether3_outw(priv->regs.command, REG_COMMAND);	i = ether3_ramtest(dev, 0x5A);	if(i)		return i;	i = ether3_ramtest(dev, 0x1E);	if(i)		return i;	ether3_setbuffer(dev, buffer_write, 0);	ether3_writelong(dev, 0);	return 0;}static voidether3_init_for_open(struct device *dev){	struct dev_priv *priv = (struct dev_priv *)dev->priv;	int i;	memset(&priv->stats, 0, sizeof(struct enet_statistics));	/* Reset the chip */	ether3_outw(CFG2_RESET, REG_CONFIG2);	udelay(4);	priv->regs.command = 0;	ether3_outw(CMD_RXOFF|CMD_TXOFF, REG_COMMAND);	while (ether3_inw(REG_STATUS) & (STAT_RXON|STAT_TXON));	ether3_outw(priv->regs.config1 | CFG1_BUFSELSTAT0, REG_CONFIG1);	for (i = 0; i < 6; i++)		ether3_outb(dev->dev_addr[i], REG_BUFWIN);	priv->tx_head	= 0;	priv->tx_tail	= 0;	priv->regs.config2 |= CFG2_CTRLO;	priv->rx_head	= RX_START;	ether3_outw(priv->regs.config1 | CFG1_TRANSEND, REG_CONFIG1);	ether3_outw((TX_END>>8) - 1, REG_BUFWIN);	ether3_outw(priv->rx_head, REG_RECVPTR);	ether3_outw(priv->rx_head >> 8, REG_RECVEND);	ether3_outw(0, REG_TRANSMITPTR);	ether3_outw(priv->regs.config2, REG_CONFIG2);	ether3_outw(priv->regs.config1 | CFG1_LOCBUFMEM, REG_CONFIG1);	ether3_setbuffer(dev, buffer_write, 0);	ether3_writelong(dev, 0);	priv->regs.command = CMD_ENINTRX | CMD_ENINTTX;	ether3_outw(priv->regs.command | CMD_RXON, REG_COMMAND);}static inline intether3_probe_bus_8(struct device *dev, int val){	int write_low, write_high, read_low, read_high;	write_low = val & 255;	write_high = val >> 8;	printk(KERN_DEBUG "ether3_probe: write8 [%02X:%02X]", write_high, write_low);	ether3_outb(write_low, REG_RECVPTR);	ether3_outb(write_high, REG_RECVPTR + 1);	read_low = ether3_inb(REG_RECVPTR);	read_high = ether3_inb(REG_RECVPTR + 1);	printk(", read8 [%02X:%02X]\n", read_high, read_low);	return read_low == write_low && read_high == write_high;}static inline intether3_probe_bus_16(struct device *dev, int val){	int read_val;	ether3_outw(val, REG_RECVPTR);	read_val = ether3_inw(REG_RECVPTR);	printk(KERN_DEBUG "ether3_probe: write16 [%04X], read16 [%04X]\n", val, read_val);	return read_val == val;}/* * This is the real probe routine. */static intether3_probe1(struct device *dev){	static unsigned version_printed = 0;	struct dev_priv *priv;	unsigned int i, bus_type, error = ENODEV;	if (net_debug && version_printed++ == 0)		printk(version);	if (!dev->priv) {		dev->priv = kmalloc(sizeof (struct dev_priv), GFP_KERNEL);		if (!dev->priv) {			printk(KERN_ERR "ether3_probe1: no memory\n");			return -ENOMEM;		}	}	priv = (struct dev_priv *) dev->priv;	memset(priv, 0, sizeof(struct dev_priv));	request_region(dev->base_addr, 128, "ether3");	/* Reset card...	 */	ether3_outb(0x80, REG_CONFIG2 + 1);	bus_type = BUS_UNKNOWN;	udelay(4);	/* Test using Receive Pointer (16-bit register) to find out	 * how the ether3 is connected to the bus...	 */	if (ether3_probe_bus_8(dev, 0x100) &&	    ether3_probe_bus_8(dev, 0x201))		bus_type = BUS_8;	if (bus_type == BUS_UNKNOWN &&	    ether3_probe_bus_16(dev, 0x101) &&	    ether3_probe_bus_16(dev, 0x201))		bus_type = BUS_16;	switch (bus_type) {	case BUS_UNKNOWN:		printk(KERN_ERR "%s: unable to identify podule bus width\n", dev->name);		goto failed;	case BUS_8:		printk(KERN_ERR "%s: ether3 found, but is an unsupported 8-bit card\n", dev->name);		goto failed;	default:		break;	}	printk("%s: ether3 found at %lx, IRQ%d, ether address ", dev->name, dev->base_addr, dev->irq);	for (i = 0; i < 6; i++)		printk(i == 5 ? "%2.2x\n" : "%2.2x:", dev->dev_addr[i]);	if (!ether3_init_2(dev)) {		dev->open = ether3_open;		dev->stop = ether3_close;		dev->hard_start_xmit = ether3_sendpacket;		dev->get_stats = ether3_getstats;		dev->set_multicast_list = ether3_setmulticastlist;		/* Fill in the fields of the device structure with ethernet values. */		ether_setup(dev);		return 0;	}failed:	kfree(dev->priv);	dev->priv = NULL;	release_region(dev->base_addr, 128);	return error;}static voidether3_get_dev(struct device *dev, struct expansion_card *ec){	ecard_claim(ec);	dev->base_addr = ecard_address(ec, ECARD_MEMC, 0);	dev->irq = ec->irq;	if (ec->cid.manufacturer == MANU_ANT &&	    ec->cid.product == PROD_ANT_ETHERB) {		dev->base_addr += 0x200;	}	ec->irqaddr = ioaddr(dev->base_addr);	ec->irqmask = 0xf0;	ether3_addr(dev->dev_addr, ec);}#ifndef MODULEint

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