gmac_fifo.v

一个关于以太网MAC核和介质无关接口的原代码,希望对大家有帮助!

///////////////////////////////////////////////////////////////////////////////
//
//      Project:  1 Gig Ethernet MAC FIFO Reference Design
//      Version:  2.0
//      File   :  gmac_fifo.v
//
//      Company:  Xilinx
// Contributors:  Xilinx Inc.
//
//   Disclaimer:  XILINX IS PROVIDING THIS DESIGN, CODE, OR
//                INFORMATION "AS IS" SOLELY FOR USE IN DEVELOPING
//                PROGRAMS AND SOLUTIONS FOR XILINX DEVICES.  BY
//                PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
//                ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE,
//                APPLICATION OR STANDARD, XILINX IS MAKING NO
//                REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
//                FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE
//                RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY
//                REQUIRE FOR YOUR IMPLEMENTATION.  XILINX
//                EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH
//                RESPECT TO THE ADEQUACY OF THE IMPLEMENTATION,
//                INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR
//                REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE
//                FROM CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES
//                OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
//                PURPOSE.
//
//                (c) Copyright 2003 Xilinx, Inc.
//                All rights reserved.
//
///////////////////////////////////////////////////////////////////////////////
//
// MAC gmac_fifo
// Author: Xilinx Inc.
//
// Description:  This module is the top level entity for the 1 Gig Ethernet
//               MAC FIFO Reference Design.  This top level connects together 
//               the lower hierarchial entities which create this design.
//               This is illustrated below.
//
//
//
//                            -----------------------------------------------
//                            |                                             |
//                            |       ------------------------------        |
//                            |       |   GENERIC_TRANSMIT_FIFO    |        |
//                   ---------|------>|                            |--------|------->   MAC Transmitter Interface
//                            |       |                            |        |
//                            |       ------------------------------        |
//                            |                                             |
//                            |            ---------------------            |
//                            |            | FIFO_PAUSE_CONTROL|            |
//        Client Interface    |            |                   |------------|------->	MAC Flow Control Interface
//                            |            |                   |            |
//                            |            ---------------------            |
//                            |                      |                      |
//                            |       ------------------------------        |
//                            |       |   GENERIC_RECEIVE_FIFO     |        |
//                   <--------|-------|                            |<-------|--------   MAC Receiver Interface 
//                            |       |                            |        |
//                            |       ------------------------------        |
//                            |                                             |
//                            |                                             |
//                            |                -------------                |
//                            |                | CONFIGURE |                |
//                            |                -------------                |
//                            |                      |                      |
//                            -----------------------------------------------
//                                                   |
//                                                   |
//                                          Management Interface
//
//
//
//              Functionality:
//
//              1. GENERIC_TRANSMIT_FIFO accepts 16-bit data from the client and writes this into the Transmitter 
//                 FIFO. The logic will then extract this from the FIFO and write this data to the MAC Transmitter
//                 in 8-bit words.
//
//              2. GENERIC_RECEIVE_FIFO accepts 8-bit data from the MAC Receiver and writes this into the 
//                 Receiver FIFO.  The client inferface can then read 16-bit words from this FIFO.
//   
//              3. FIFO_PAUSE_CONTROL automatically sends off "pause requests" if the Receiver FIFO reaches
//                 the configurable STATUS_NEARLY_FULL threshold.
// 
//              4. CONFIGURE contains addressable readable/writable registers that are used to configure the
//                 operation of the Reference Design.
// 
///////////////////////////////////////////////////////////////////////////////


`timescale 1 ps / 1 ps																			      
														         		   
module GMAC_FIFO
  (
     RESET,
        
     //--------------------------------------------------------------
     // MAC Transmitter Interface                                  --
     //--------------------------------------------------------------
     
     TX_CLK,
     TX_ACK,
     TX_DATA_VALID,
     TX_DATA,
     TX_UNDERRUN,

     //--------------------------------------------------------------
     // MAC Receiver Interface                                     --
     //--------------------------------------------------------------
     
     RX_CLK,              
     RX_DATA, 
     RX_DATA_VALID,
     RX_GOOD_FRAME,
     RX_BAD_FRAME, 													 

     //--------------------------------------------------------------
     // MAC Flow Control Interface                                 --
     //--------------------------------------------------------------

     PAUSE_REQ,
     PAUSE_VAL,

     //--------------------------------------------------------------
     // Client interface                                           --
     //--------------------------------------------------------------

     WrClk,                               
     RdClk,

     RdEn,
     RdAck,        
     Underflow,        
     RdData,                                   
     Empty,        
     AlmostEmpty,         
     WrData,
     WrEn,
     WrAck,
     Overflow,
     Full,
     AlmostFull,

     //--------------------------------------------------------------
     // Management Interface                                       --
     //--------------------------------------------------------------

     HOST_CLK,                               
     HOST_ADDR,   
     HOST_RD_DATA, 
     HOST_WR_DATA,  
     HOST_RNW
   );  
   
   input RESET;                 // Global Asynchronous Reset.
         
      //--------------------------------------------------------------
      // MAC Transmitter Interface                                  --
      //--------------------------------------------------------------
      
   input TX_CLK;                // MAC Transmitter clock.
   input TX_ACK;                // MAC Transmitter acknowledge.
   output TX_DATA_VALID;        // Indication of valid bytes for TX_DATA.
   output [7:0] TX_DATA;        // Data to be written to MAC Transmitter.
   output TX_UNDERRUN;          // Force MAC Transmitter to scrap current frame.

      //--------------------------------------------------------------
      // MAC Receiver Interface                                     --
      //--------------------------------------------------------------
      
   input RX_CLK;                // MAC Receiver clock.               
   input [7:0] RX_DATA;         // Data from MAC Receiver. 
   input RX_DATA_VALID;         // Indication of valid bytes for RX_DATA. 
   input RX_GOOD_FRAME;         // The previous MAC Frame contained no errors.
   input RX_BAD_FRAME;          // The previous MAC Frame contained errors. 													 

      //--------------------------------------------------------------
      // MAC Flow Control Interface                                 --
      //--------------------------------------------------------------