📄 hardware.lst
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0000BD2E 40 F0 91 BD call F_Delay
0000BD30 41 94 r2 = 0x0001
0000BD31 1A D5 12 70 [P_Watchdog_Clear] = r2
0000BD33 09 23 40 00 r1 -= 0x40
0000BD35 19 D3 17 70 [P_DAC1] = r1
0000BD37 09 43 00 80 cmp r1,0x8000
0000BD39 4C 4E jne L_RU_DownLoop
L_RD_DownEnd:
0000BD3A 0C EE jmp L_RU_End
L_RU_NormalUp:
L_RU_Loop:
0000BD3B 40 F0 91 BD call F_Delay
0000BD3D 41 94 r2 = 0x0001
0000BD3E 1A D5 12 70 [P_Watchdog_Clear] = r2
0000BD40 09 03 40 00 r1 += 0x40
0000BD42 19 D3 17 70 [P_DAC1] = r1
0000BD44 09 43 00 80 cmp r1, 0x8000
0000BD46 4C 4E jne L_RU_Loop
L_RU_End:
0000BD47 90 90 pop r1,r2 from [sp]
0000BD48 90 9A retf
.ENDP
//............................................................
_SP_RampDnDAC1: .PROC
F_SP_RampDnDAC1:
0000BD49 90 D4 push r1,r2 to [sp]
//int off
0000BD4A 11 93 17 70 r1 = [P_DAC1]
0000BD4C 09 B3 C0 FF r1 &= ~0x003F
0000BD4E 0A 5E jz L_RD_End
L_RD_Loop:
0000BD4F 40 F0 91 BD call F_Delay
0000BD51 41 94 r2 = 0x0001
0000BD52 1A D5 12 70 [P_Watchdog_Clear] = r2
0000BD54 09 23 40 00 r1 -= 0x40
0000BD56 19 D3 17 70 [P_DAC1] = r1
0000BD58 4A 4E jnz L_RD_Loop
L_RD_End:
//int fiq,irq
0000BD59 90 90 pop r1,r2 from [sp]
0000BD5A 90 9A retf
.ENDP
//..............................................................
_SP_RampUpDAC2: .PROC
F_SP_RampUpDAC2:
0000BD5B 90 D4 push r1,r2 to [sp]
0000BD5C 11 93 16 70 r1=[P_DAC2]
0000BD5E 09 B3 C0 FF r1 &= ~0x003f
0000BD60 09 43 00 80 cmp r1,0x8000
0000BD62 0E 0E jb L_RU_NormalUp_
0000BD63 5D 5E je L_RU_End
L_RU_DownLoop_:
0000BD64 40 F0 91 BD call F_Delay
0000BD66 41 94 r2 = 0x0001
0000BD67 1A D5 12 70 [P_Watchdog_Clear] = r2
0000BD69 09 23 40 00 r1 -= 0x40
0000BD6B 19 D3 16 70 [P_DAC2] = r1
0000BD6D 09 43 00 80 cmp r1,0x8000
0000BD6F 4C 4E jne L_RU_DownLoop_
L_RD_DownEnd_:
0000BD70 0C EE jmp L_RU_End_
L_RU_NormalUp_:
L_RU_Loop_:
0000BD71 40 F0 91 BD call F_Delay
0000BD73 41 94 r2 = 0x0001
0000BD74 1A D5 12 70 [P_Watchdog_Clear] = r2
0000BD76 09 03 40 00 r1 += 0x40
0000BD78 19 D3 16 70 [P_DAC2] = r1
0000BD7A 09 43 00 80 cmp r1, 0x8000
0000BD7C 4C 4E jne L_RU_Loop_
L_RU_End_:
0000BD7D 90 90 pop r1,r2 from [sp]
0000BD7E 90 9A retf
.ENDP
//.............................................................
_SP_RampDnDAC2: .PROC
F_SP_RampDnDAC2:
//int off
0000BD7F 90 D4 push r1,r2 to [sp]
0000BD80 11 93 16 70 r1 = [P_DAC2]
0000BD82 09 B3 C0 FF r1 &= ~0x003F
0000BD84 0A 5E jz L_RD_End_
L_RD_Loop_:
0000BD85 40 F0 91 BD call F_Delay
0000BD87 41 94 r2 = 0x0001
0000BD88 1A D5 12 70 [P_Watchdog_Clear] = r2
0000BD8A 09 23 40 00 r1 -= 0x40
0000BD8C 19 D3 16 70 [P_DAC2] = r1
0000BD8E 4A 4E jnz L_RD_Loop_
L_RD_End_:
0000BD8F 90 90 pop r1,r2 from [sp]
0000BD90 90 9A retf
.ENDP
//..................................................................
F_Delay:
0000BD91 88 D2 push r1 to [sp]
0000BD92 50 92 r1 = C_RampDelayTime // Ramp Up/Dn delay per step
L_D_Loop:
0000BD93 41 22 r1 -= 1
0000BD94 42 4E jnz L_D_Loop
0000BD95 88 90 pop r1 from [sp]
0000BD96 90 9A RETF
////////////////////////////////////////////////////////////////
// Function: I/O Port A configuration
// void SP_Inti_IOA(int Dir, int Data, int Attrib)
////////////////////////////////////////////////////////////////
_SP_Init_IOA: .PROC
0000BD97 88 DA PUSH BP TO [SP]
0000BD98 08 0B 01 00 BP = SP + 1
0000BD9A 88 D2 PUSH R1 TO [SP]
0000BD9B 03 92 R1 = [BP+3] // Port direction
0000BD9C 19 D3 02 70 [P_IOA_Dir] = R1
0000BD9E 04 92 R1 = [BP+4]
0000BD9F 19 D3 00 70 [P_IOA_Data] = R1
0000BDA1 05 92 R1 = [BP+5]
0000BDA2 19 D3 03 70 [P_IOA_Attrib] = R1
0000BDA4 88 90 POP R1 FROM [SP]
0000BDA5 88 98 POP BP FROM [SP]
0000BDA6 90 9A RETF
.ENDP
//////////////////////////////////////////////////////////////////
// Function: I/O Port B configuration
// void SP_Inti_IOB(int Dir, int Data, int Attrib)
//////////////////////////////////////////////////////////////////
_SP_Init_IOB: .PROC
0000BDA7 88 DA PUSH BP TO [SP]
0000BDA8 08 0B 01 00 BP = SP + 1
0000BDAA 88 D2 PUSH R1 TO [SP]
0000BDAB 03 92 R1 = [BP+3] // Port direction
0000BDAC 19 D3 07 70 [P_IOB_Dir] = R1
0000BDAE 04 92 R1 = [BP+4]
0000BDAF 19 D3 05 70 [P_IOB_Data] = R1
0000BDB1 05 92 R1 = [BP+5]
0000BDB2 19 D3 08 70 [P_IOB_Attrib] = R1
0000BDB4 88 90 POP R1 FROM [SP]
0000BDB5 88 98 POP BP FROM [SP]
0000BDB6 90 9A RETF
.ENDP
//////////////////////////////////////////////////////////////////
// Function: Get data from port
// int SP_Import(unsigned int Port)
//////////////////////////////////////////////////////////////////
_SP_Import: .PROC
0000BDB7 88 DA PUSH BP TO [SP]
0000BDB8 08 0B 01 00 BP = SP + 1
0000BDBA 03 92 R1 = [BP+3] // Port Number
0000BDBB C1 92 R1 = [R1]
0000BDBC 88 98 POP BP FROM [SP]
0000BDBD 90 9A RETF
.ENDP
_SP_Export: .PROC
0000BDBE 88 DA PUSH BP,BP TO [SP]
0000BDBF 08 0B 01 00 BP = SP + 1
0000BDC1 90 D4 PUSH R1,R2 TO [SP]
0000BDC2 03 92 R1 = [BP+3] // Port Number
0000BDC3 04 94 R2 = [BP+4] // Value
0000BDC4 C1 D4 [R1] = R2
0000BDC5 90 90 POP R1,R2 FROM [SP]
0000BDC6 88 98 POP BP,BP FROM [SP]
0000BDC7 90 9A RETF
.ENDP
//////////////////////////////////////////////////////////////////
// Function: Get data from resource(ROM area)
// int SP_GetResource(int Addr, int Page)
//////////////////////////////////////////////////////////////////
_SP_GetResource: .PROC
0000BDC8 88 DA push bp to [sp]
0000BDC9 08 0B 01 00 bp = sp + 1
0000BDCB 03 92 r1 = [bp+3] // Address
0000BDCC 04 94 r2 = [bp+4] // Page
0000BDCD 5A 95 r2 = r2 lsl 4 // Prepare Page for SR
0000BDCE 5A 95 r2 = r2 lsl 4
0000BDCF 4A 95 r2 = r2 lsl 2
0000BDD0 7F BC sr &= 0x03f // Change Page
0000BDD1 06 A5 r2 |=sr //
0000BDD2 02 9D sr = r2 //
0000BDD3 E1 92 r1 = D:[r1] // Get data
0000BDD4 88 98 pop bp from [sp]
0000BDD5 90 9A retf
.ENDP
//........................................
F_SP_GetResource:
0000BDD6 5A 95 r2 = r2 lsl 4 // Prepare Page for SR
0000BDD7 5A 95 r2 = r2 lsl 4
0000BDD8 4A 95 r2 = r2 lsl 2
0000BDD9 7F BC sr &= 0x03f // Change Page
0000BDDA 06 A5 r2 |=sr //
0000BDDB 02 9D sr = r2 //
0000BDDC E1 92 r1 = D:[r1] // Get data
0000BDDD 90 9A retf
//////////////////////////////////////////////////////////////////
// Functions: Reserve old defintion
// Note: 1. Some user who use old library may use the old name
// 2. Have to be put at the end of this file
//////////////////////////////////////////////////////////////////
.DEFINE F_RampUpDAC1 F_SP_RampUpDAC1
.DEFINE F_RampDnDAC1 F_SP_RampDnDAC1
.DEFINE F_RampUpDAC2 F_SP_RampUpDAC2
.DEFINE F_RampDnDAC2 F_SP_RampDnDAC2
.DEFINE _STD_RampUpDAC1 _SP_RampUpDAC1
.DEFINE _STD_RampDnDAC1 _SP_RampDnDAC1
.DEFINE _STD_RampUpDAC2 _SP_RampUpDAC2
.DEFINE _STD_RampDnDAC2 _SP_RampDnDAC2
///////////////////////////////////////////////////////////////////
//========================================================================================
// End of hardware.asm
//========================================================================================
0 error(s), 0 warning(s).
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