📄 hardware.lst
字号:
//
// Ex: F_SACM_A2000_Initial:
// ...
// call F_SP_SACM_A2000_Init_ : S480/S240/MS01 is same
// ...
// retf
////////////////////////////////////////////////////////////////////////////////
F_SP_SACM_A2000_Init_:
0000BC50 40 92 R1=0x0000; // 24MHz, Fcpu=Fosc
0000BC51 19 D3 13 70 [P_SystemClock]=R1 // Frequency 20MHz
0000BC53 70 92 R1 = 0x0030 // TimerA CKA=Fosc/2 CKB=1 Tout:off
0000BC54 19 D3 0B 70 [P_TimerA_Ctrl] = R1 // Initial Timer A
0000BC56 09 93 00 FD R1 = 0xfd00 // 16K
0000BC58 19 D3 0A 70 [P_TimerA_Data] = R1
0000BC5A 09 93 A8 00 R1 = 0x00A8 // Set the DAC Ctrl
0000BC5C 19 D3 2A 70 [P_DAC_Ctrl] = R1
0000BC5E 09 93 FF FF R1 = 0xffff
0000BC60 19 D3 11 70 [P_INT_Clear] = R1 // Clear interrupt occuiped events
0000BC62 40 92 R1 =0x0000 //
0000BC63 11 93 9B 04 R1 = [R_InterruptStatus] //
0000BC65 09 A3 00 20 R1 |= C_FIQ_TMA // Enable Timer A FIQ
//R1 |= C_IRQ4_1KHz
0000BC67 19 D3 9B 04 [R_InterruptStatus] = R1 //
0000BC69 19 D3 10 70 [P_INT_Ctrl] = R1 //
0000BC6B 90 9A RETF
//////////////////////////////////////////////////////////////////
// Function: The partial code of hardware setting of SACM_S480_Initial()
// or F_SACM_S480_Initial:
//////////////////////////////////////////////////////////////////
F_SP_SACM_S480_Init_:
0000BC6C 40 92 R1 = 0x0000 // 24MHz Fosc
0000BC6D 19 D3 13 70 [P_SystemClock]=R1 // Initial System Clock
0000BC6F 70 92 R1=0x0030 // TimerA CKA=Fosc/2 CKB=1 Tout:off
0000BC70 19 D3 0B 70 [P_TimerA_Ctrl]=R1 // Initial Timer A
//R1 = 0xfd00 // 16K
0000BC72 09 93 ED FC R1 = 0xfced // 15.625K
0000BC74 19 D3 0A 70 [P_TimerA_Data]=R1
0000BC76 09 93 A8 00 R1 = 0x00A8 //
0000BC78 19 D3 2A 70 [P_DAC_Ctrl] = R1 //
0000BC7A 09 93 FF FF R1 = 0xffff
0000BC7C 19 D3 11 70 [P_INT_Clear] = R1 // Clear interrupt occuiped events
0000BC7E 11 93 9B 04 R1 = [R_InterruptStatus] //
0000BC80 09 A3 00 20 R1 |= C_FIQ_TMA // Enable Timer A FIQ
//R1 |= C_IRQ4_1KHz // Enable 1KHz IRQ4 for S480 decoder
0000BC82 19 D3 9B 04 [R_InterruptStatus] = R1 //
0000BC84 19 D3 10 70 [P_INT_Ctrl] = R1 //
0000BC86 90 9A RETF
//////////////////////////////////////////////////////////////////
// Function: The partial code of hardware setting of SACM_S240_Initial()
// or F_SACM_S240_Initial:
//////////////////////////////////////////////////////////////////
F_SP_SACM_S240_Init_:
0000BC87 60 92 R1=0x0020;
0000BC88 19 D3 13 70 [P_SystemClock]=R1
0000BC8A 09 93 A8 00 R1 = 0x00A8; //
0000BC8C 19 D3 2A 70 [P_DAC_Ctrl]= R1
0000BC8E 70 92 R1 = 0x0030; // TimerA CKA=Fosc/2 CKB=1 Tout:off
0000BC8F 19 D3 0B 70 [P_TimerA_Ctrl] = R1;
0000BC91 09 93 00 FE R1 = 0xfe00; // 24K
0000BC93 19 D3 0A 70 [P_TimerA_Data] = R1;
0000BC95 09 93 FF FF R1 = 0xffff
0000BC97 19 D3 11 70 [P_INT_Clear] = R1 // Clear interrupt occuiped events
0000BC99 11 93 9B 04 R1 = [R_InterruptStatus] //
0000BC9B 09 A3 00 20 R1 |= C_FIQ_TMA // Enable Timer A FIQ
0000BC9D 19 D3 9B 04 [R_InterruptStatus] = R1 //
0000BC9F 19 D3 10 70 [P_INT_Ctrl] = R1 //
0000BCA1 90 9A RETF
//////////////////////////////////////////////////////////////////
// Function: The partial code of hardware setting of SACM_MS01_Initial()
// or F_SACM_MS01_Initial:
//
// Ex: F_SACM_MS01_Initial:
// ...
// call F_SP_SACM_MS01_Init_
// call F_SP_Play_Mode0/1/2/3 ->0,1,2,3 depending on the para1
// ...
// retf
//////////////////////////////////////////////////////////////////
F_SP_SACM_MS01_Init_:
0000BCA2 40 92 R1 = 0x0000; // 24MHz, Fcpu=Fosc
0000BCA3 19 D3 13 70 [P_SystemClock] = R1; // Initial System Clock
0000BCA5 70 92 R1 = 0x0030; // TimerA CKA=Fosc/2 CKB=1 Tout:off
0000BCA6 19 D3 0B 70 [P_TimerA_Ctrl] = R1 // Initial Timer A
//R1 = 0x0003 // 8K
0000BCA8 40 92 R1 = 0x0000 // Fosc/2
0000BCA9 19 D3 0D 70 [P_TimerB_Ctrl] = R1; // Initial Timer B -> 8192
//R1 = 0xFFFF
0000BCAB 09 93 00 FA R1 = 0xFA00 // Any time for ADPCM channel 0,1
0000BCAD 19 D3 0C 70 [P_TimerB_Data] = R1 // 8K sample rate
0000BCAF 09 93 FF FF R1 = 0xffff
0000BCB1 19 D3 11 70 [P_INT_Clear] = R1 // Clear interrupt occuiped events
0000BCB3 90 9A RETF
//........................................
F_SP_PlayMode0_: // with F_SP_SACM_MS01_Initial
0000BCB4 46 92 R1 = 0x0006
0000BCB5 19 D3 2A 70 [P_DAC_Ctrl] = R1
0000BCB7 09 93 00 FE R1 = 0xFE00
0000BCB9 19 D3 0A 70 [P_TimerA_Data] = R1 //
0000BCBB 11 93 9B 04 R1 = [R_InterruptStatus] //
0000BCBD 09 A3 10 84 R1 |= C_FIQ_PWM+C_IRQ2_TMB+C_IRQ4_1KHz
0000BCBF 19 D3 9B 04 [R_InterruptStatus] = R1 //
0000BCC1 19 D3 10 70 [P_INT_Ctrl] = R1 //
0000BCC3 90 9A RETF
F_SP_PlayMode1_: // with F_SP_SACM_MS01_Initial
0000BCC4 09 93 A8 00 R1 = 0x00A8
0000BCC6 19 D3 2A 70 [P_DAC_Ctrl] = R1
0000BCC8 09 93 00 FE R1 = 0xFE00
0000BCCA 19 D3 0A 70 [P_TimerA_Data] = R1 //
0000BCCC 11 93 9B 04 R1 = [R_InterruptStatus] //
0000BCCE 09 A3 10 24 R1 |= C_FIQ_TMA+C_IRQ2_TMB+C_IRQ4_1KHz
0000BCD0 19 D3 9B 04 [R_InterruptStatus] = R1 //
0000BCD2 19 D3 10 70 [P_INT_Ctrl] = R1 //
0000BCD4 90 9A RETF
F_SP_PlayMode2_: // with F_SP_SACM_MS01_Initial
0000BCD5 09 93 A8 00 R1 = 0x00A8
0000BCD7 19 D3 2A 70 [P_DAC_Ctrl] = R1
0000BCD9 09 93 9A FD R1 = 0xFD9A
0000BCDB 19 D3 0A 70 [P_TimerA_Data] = R1 //
0000BCDD 11 93 9B 04 R1 = [R_InterruptStatus] //
0000BCDF 09 A3 10 24 R1 |= C_FIQ_TMA+C_IRQ2_TMB+C_IRQ4_1KHz
0000BCE1 19 D3 9B 04 [R_InterruptStatus] = R1 //
0000BCE3 19 D3 10 70 [P_INT_Ctrl] = R1 //
0000BCE5 90 9A RETF
F_SP_PlayMode3_: // with F_SP_SACM_MS01_Initial
0000BCE6 09 93 A8 00 R1 = 0x00A8
0000BCE8 19 D3 2A 70 [P_DAC_Ctrl] = R1
0000BCEA 09 93 00 FD R1 = 0xFD00
0000BCEC 19 D3 0A 70 [P_TimerA_Data] = R1 //
0000BCEE 11 93 9B 04 R1 = [R_InterruptStatus] //
0000BCF0 09 A3 10 24 R1 |= C_FIQ_TMA+C_IRQ2_TMB+C_IRQ4_1KHz
0000BCF2 19 D3 9B 04 [R_InterruptStatus] = R1 //
0000BCF4 19 D3 10 70 [P_INT_Ctrl] = R1 //
0000BCF6 90 9A RETF
///////////////////////////////////////////////////////////////////////////////
// Function: The partial code of hardware setting of SACM_MS01_Initial()
// or F_SACM_MS01_Initial:
//
// Ex: F_SACM_DVR_Initial:
// ...
// call F_SP_SACM_DVR_Init_
// call F_SP_Play_Mode0/1/2/3 ->0,1,2,3 depending on the para1
// ...
// retf
// Ex1:
// F_SACM_DVR_Record: (or F_SACM_DVR_InitEncoder)
// ...
// call F_SP_SACM_DVR_Rec_Init
// ...
// retf
// Ex2:
// F_SACM_DVR_Play: (or F_SACM_DVR_InitDecoder)
// ...
// call F_SP_SACM_DVR_Play_Init_
// ...
// retf
///////////////////////////////////////////////////////////////////////////////
F_SP_SACM_DVR_Init_:
0000BCF7 40 92 r1 = 0x0000; // 24MHz, Fcpu=Fosc
0000BCF8 19 D3 13 70 [P_SystemClock] = r1; // Frequency 20MHz
0000BCFA 70 92 r1 = 0x0030; // TimerA CKA=Fosc/2 CKB=1 Tout:off
0000BCFB 19 D3 0B 70 [P_TimerA_Ctrl] = r1;
0000BCFD 09 93 00 FA r1 = 0xfa00; // 8K @ 24.576MHz
//r1 = 0xfb1d; // 8K @ 20MHz
0000BCFF 19 D3 0A 70 [P_TimerA_Data] = r1;
0000BD01 75 92 r1 = 0x0035; // ADINI should be open (107)
0000BD02 19 D3 15 70 [P_ADC_Ctrl] = r1;
0000BD04 09 93 A8 00 r1 = 0x00A8; // Set the DA Ctrl
0000BD06 19 D3 2A 70 [P_DAC_Ctrl] = r1;
0000BD08 09 93 FF FF r1 = 0xffff;
0000BD0A 19 D3 11 70 [P_INT_Clear] = r1; // Clear interrupt occuiped events
0000BD0C 11 93 9B 04 R1 = [R_InterruptStatus] //
0000BD0E 09 A3 00 20 R1 |= C_FIQ_TMA // Enable Timer A FIQ
0000BD10 19 D3 9B 04 [R_InterruptStatus] = R1 //
0000BD12 19 D3 10 70 [P_INT_Ctrl] = R1 //
0000BD14 90 9A RETF
F_SP_SACM_DVR_Rec_Init_: // call by SACM_DVR_Record / SACM_DVR_InitEncoder
0000BD15 75 92 r1 = 0x0035; //mic input
//r1 = 0x0037 //line_in input
0000BD16 19 D3 15 70 [P_ADC_Ctrl] = r1; //enable ADC
0000BD18 09 93 00 FE R1=0xfe00; //24K @ 24.576MHz
0000BD1A 19 D3 0A 70 [P_TimerA_Data] = r1
0000BD1C 90 9A RETF
F_SP_SACM_DVR_Play_Init_:
0000BD1D 40 92 r1 = 0x0000 // call by SACM_DVR_Stop / SACM_DVR_Play
0000BD1E 19 D3 15 70 [P_ADC_Ctrl] = r1; // Disable ADC
0000BD20 09 93 00 FD r1 = 0xfd00; // 16K @ 24.576MHz
0000BD22 19 D3 0A 70 [P_TimerA_Data] = r1;
0000BD24 90 9A RETF
///////////////////////////////////////////////////////////////////////////////
// Function: Extra Functions provided by Sunplus
// Type:
// 1. DAC Ramp up/down
// 2. IO config/import/export
// 3. Get resource data
//
//
///////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////
// Function: Ramp Up/Down to avoid speaker "pow" noise
// Destory: R1,R2
////////////////////////////////////////////////////////
_SP_RampUpDAC1: .PROC
F_SP_RampUpDAC1:
0000BD25 90 D4 push r1,r2 to [sp]
0000BD26 11 93 17 70 r1=[P_DAC1]
0000BD28 09 B3 C0 FF r1 &= ~0x003f
0000BD2A 09 43 00 80 cmp r1,0x8000
0000BD2C 0E 0E jb L_RU_NormalUp
0000BD2D 19 5E je L_RU_End
L_RU_DownLoop:
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -