avr32.lst

avr32 驱动320X64 LCD 屏代码。 对液晶驱动或学习avr的朋友有帮助。

__text_start:
__start:
    002A E5CF      LDI	R28,0x5F
    002B E0D8      LDI	R29,0x8
    002C BFCD      OUT	0x3D,R28
    002D BFDE      OUT	0x3E,R29
    002E 51C0      SUBI	R28,0x10
    002F 40D0      SBCI	R29,0
    0030 EA0A      LDI	R16,0xAA
    0031 8308      STD	Y+0,R16
    0032 2400      CLR	R0
    0033 E6E0      LDI	R30,0x60
    0034 E0F0      LDI	R31,0
    0035 E010      LDI	R17,0
    0036 36E0      CPI	R30,0x60
    0037 07F1      CPC	R31,R17
    0038 F011      BEQ	0x003B
    0039 9201      ST	R0,Z+
    003A CFFB      RJMP	0x0036
    003B 8300      STD	Z+0,R16
    003C E5E4      LDI	R30,0x54
    003D E0F0      LDI	R31,0
    003E E6A0      LDI	R26,0x60
    003F E0B0      LDI	R27,0
    0040 E010      LDI	R17,0
    0041 35E4      CPI	R30,0x54
    0042 07F1      CPC	R31,R17
    0043 F021      BEQ	0x0048
    0044 95C8      LPM
    0045 9631      ADIW	R30,1
    0046 920D      ST	R0,X+
    0047 CFF9      RJMP	0x0041
    0048 940E008C  CALL	_main
_exit:
    004A CFFF      RJMP	_exit
FILE: D:\AVR\Mega32_160X64Lcd\main.c
(0001) //ICC-AVR application builder : 2006-12-29 13:02:24
(0002) // Target : M32
(0003) // Crystal: 7.3728Mhz
(0004) 
(0005) #include "define.h"
(0006) 
(0007) extern void Init_Lcd(void) ;
(0008) 
(0009) void port_init(void)
(0010) {
(0011)  PORTA = 0x00;
_port_init:
    004B 2422      CLR	R2
    004C BA2B      OUT	0x1B,R2
(0012)  DDRA  = 0xFF;
    004D EF8F      LDI	R24,0xFF
    004E BB8A      OUT	0x1A,R24
(0013)  PORTB = 0x07;
    004F E087      LDI	R24,7
    0050 BB88      OUT	0x18,R24
(0014)  DDRB  = 0xF8;
    0051 EF88      LDI	R24,0xF8
    0052 BB87      OUT	0x17,R24
(0015)  PORTC = 0xFF; 
    0053 EF8F      LDI	R24,0xFF
    0054 BB85      OUT	0x15,R24
(0016)  DDRC  = 0x00;
    0055 BA24      OUT	0x14,R2
(0017)  PORTD = 0x7F;
    0056 E78F      LDI	R24,0x7F
    0057 BB82      OUT	0x12,R24
(0018)  DDRD  = 0x80;
    0058 E880      LDI	R24,0x80
    0059 BB81      OUT	0x11,R24
(0019) }
    005A 9508      RET
(0020) 
(0021) //Watchdog initialisation
(0022) // prescale: 2048K cycles
(0023) void watchdog_init(void)
(0024) {
(0025)  WDR(); //this prevents a timout on enabling
_watchdog_init:
    005B 95A8      WDR
(0026)  WDTCR = 0x0F; //WATCHDOG ENABLED - dont forget to issue WDRs
    005C E08F      LDI	R24,0xF
    005D BD81      OUT	0x21,R24
(0027) }
    005E 9508      RET
(0028) 
(0029) //TIMER0 initialisation - prescale:1024
(0030) // WGM: Normal
(0031) // desired value: 100Hz
(0032) // actual value: 101.408Hz (1.4%)
(0033) void timer0_init(void)
(0034) {
(0035)  TCCR0 = 0x00; //stop
_timer0_init:
    005F 2422      CLR	R2
    0060 BE23      OUT	0x33,R2
(0036)  TCNT0 = 0xB9; //set count
    0061 EB89      LDI	R24,0xB9
    0062 BF82      OUT	0x32,R24
(0037)  OCR0  = 0x47;  //set compare
    0063 E487      LDI	R24,0x47
    0064 BF8C      OUT	0x3C,R24
(0038)  TCCR0 = 0x05; //start timer
    0065 E085      LDI	R24,5
    0066 BF83      OUT	0x33,R24
(0039) }
    0067 9508      RET
_timer0_ovf_isr:
    0068 938A      ST	R24,-Y
    0069 B78F      IN	R24,0x3F
    006A 938A      ST	R24,-Y
(0040) 
(0041) #pragma interrupt_handler timer0_ovf_isr:12
(0042) void timer0_ovf_isr(void)
(0043) {
(0044)  TCNT0 = 0xB9; //reload counter value
    006B EB89      LDI	R24,0xB9
    006C BF82      OUT	0x32,R24
(0045) }
    006D 9189      LD	R24,Y+
    006E BF8F      OUT	0x3F,R24
    006F 9189      LD	R24,Y+
    0070 9518      RETI
(0046) 
(0047) //UART0 initialisation
(0048) // desired baud rate: 38400
(0049) // actual: baud rate:38400 (0.0%)
(0050) // char size: 8 bit
(0051) // parity: Disabled
(0052) void uart0_init(void)
(0053) {
(0054)  UCSRB = 0x00; //disable while setting baud rate
_uart0_init:
    0071 2422      CLR	R2
    0072 B82A      OUT	0x0A,R2
(0055)  UCSRA = 0x00;
    0073 B82B      OUT	0x0B,R2
(0056)  UCSRC = 0x06;
    0074 E086      LDI	R24,6
    0075 BD80      OUT	0x20,R24
(0057)  UBRRL = 0x0B; //set baud rate lo
    0076 E08B      LDI	R24,0xB
    0077 B989      OUT	0x09,R24
(0058)  UBRRH = 0x00; //set baud rate hi
    0078 BC20      OUT	0x20,R2
(0059)  UCSRB = 0xB0;
    0079 EB80      LDI	R24,0xB0
    007A B98A      OUT	0x0A,R24
(0060) }
    007B 9508      RET
(0061) 
(0062) #pragma interrupt_handler uart0_rx_isr:14
(0063) void uart0_rx_isr(void)
(0064) {
(0065)  //uart has received a character in UDR
(0066) }
_uart0_rx_isr:
    007C 9518      RETI
(0067) #pragma interrupt_handler uart0_udre_isr:15
(0068) void uart0_udre_isr(void)
(0069) {
(0070)  //character transferred to shift register so UDR is now empty
(0071) }
_uart0_udre_isr:
    007D 9518      RETI
(0072) 
(0073) #pragma interrupt_handler int1_isr:3
(0074) void int1_isr(void)
(0075) {
(0076)  //external interupt on INT1
(0077) }
_int1_isr:
    007E 9518      RETI
(0078) 
(0079) //call this routine to initialise all peripherals
(0080) void init_devices(void)
(0081) {
(0082)  //stop errant interrupts until set up
(0083)  CLI(); //disable all interrupts
_init_devices:
    007F 94F8      BCLR	7
(0084)  port_init();
    0080 DFCA      RCALL	_port_init
(0085)  watchdog_init();
    0081 DFD9      RCALL	_watchdog_init
(0086)  timer0_init();
    0082 DFDC      RCALL	_timer0_init
(0087)  uart0_init();
    0083 DFED      RCALL	_uart0_init
(0088) 
(0089)  MCUCR = 0x08;
    0084 E088      LDI	R24,0x8
    0085 BF85      OUT	0x35,R24
(0090)  GICR  = 0x80;
    0086 E880      LDI	R24,0x80
    0087 BF8B      OUT	0x3B,R24
(0091)  TIMSK = 0x01; //timer interrupt sources
    0088 E081      LDI	R24,1
    0089 BF89      OUT	0x39,R24
(0092)  SEI(); //re-enable interrupts
    008A 9478      BSET	7
(0093)  //all peripherals are now initialised
(0094) }
    008B 9508      RET
(0095) 
(0096) void main(void)
(0097) {
(0098)  init_devices();
_main:
    008C DFF2      RCALL	_init_devices
(0099)  Init_Lcd();
(0100) }
    008D 940C008F  JMP	_Init_Lcd
FILE: D:\AVR\Mega32_160X64Lcd\Lcd.c
(0001) //ICC-AVR application builder : 2006-12-29 13:02:24
(0002) // Target : M32
(0003) // Crystal: 7.3728Mhz
(0004) 
(0005) #include "define.h"
(0006) 
(0007) void Init_Lcd(void)
(0008) {
(0009)  Lcd_Port =0;
    008F 2422      CLR	R2
    0090 BA2B      OUT	0x1B,R2
(0010)  
(0011) }
FILE: <library>
    0091 9508      RET