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📄 spca561.h

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#ifndef SPCA561_INIT_H#define SPCA561_INIT_H  /****************************************************************************#	 	Sunplus spca561 library                                     ## 		Copyright (C) 2004 Michel Xhaard   mxhaard@magic.fr         ##                                                                           ## This program is free software; you can redistribute it and/or modify      ## it under the terms of the GNU General Public License as published by      ## the Free Software Foundation; either version 2 of the License, or         ## (at your option) any later version.                                       ##                                                                           ## This program is distributed in the hope that it will be useful,           ## but WITHOUT ANY WARRANTY; without even the implied warranty of            ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the             ## GNU General Public License for more details.                              ##                                                                           ## You should have received a copy of the GNU General Public License         ## along with this program; if not, write to the Free Software               ## Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA ##                                                                           #****************************************************************************//* Initialization data   I'm not very sure how to split initialization from open data   chunks. For now, we'll consider everything as initialization *//* Frame packet header offsets for the spca561 */#define SPCA561_OFFSET_SNAP 1#define SPCA561_OFFSET_TYPE 2#define SPCA561_OFFSET_COMPRESS 3#define SPCA561_OFFSET_FRAMSEQ   4#define SPCA561_OFFSET_GPIO 5#define SPCA561_OFFSET_USBBUFF 6#define SPCA561_OFFSET_WIN2GRAVE 7#define SPCA561_OFFSET_WIN2RAVE 8#define SPCA561_OFFSET_WIN2BAVE 9#define SPCA561_OFFSET_WIN2GBAVE 10#define SPCA561_OFFSET_WIN1GRAVE 11#define SPCA561_OFFSET_WIN1RAVE 12#define SPCA561_OFFSET_WIN1BAVE 13#define SPCA561_OFFSET_WIN1GBAVE 14#define SPCA561_OFFSET_FREQ 15#define SPCA561_OFFSET_VSYNC 16#define SPCA561_OFFSET_DATA 17#define SPCA561_INDEX_I2C_BASE 0x8800#define SPCA561_SNAPBIT 0x20#define SPCA561_SNAPCTRL 0x40static int spca561_init(struct usb_spca50x *spca50x);static void spca561_start(struct usb_spca50x *spca50x);static void spca561_stop(struct usb_spca50x *spca50x);static __u16 spca561_setbrightness(struct usb_spca50x *spca50x);static __u16 spca561_getbrightness(struct usb_spca50x *spca50x);static __u16 spca561_setcontrast(struct usb_spca50x *spca50x);static __u16 spca561_getcontrast(struct usb_spca50x *spca50x);/******************************************************************/static void spca561_InitI2c(struct usb_spca50x *spca50x,__u8 mode){	spca5xxRegWrite(spca50x->dev,0x00,0x92,0x8804 ,NULL ,0 );	spca5xxRegWrite(spca50x->dev,0x00,mode,0x8802 ,NULL ,0 );}static void spca561_WriteI2c(struct usb_spca50x *spca50x,__u16 valeur,__u16 registre){	int  retry = 60;	__u8 DataLow = 0;	__u8 DataHight = 0;	__u8 Data = 0;	DataLow = valeur & 0xFF ;	DataHight = (valeur >> 8) & 0xFF;	spca5xxRegWrite(spca50x->dev,0x00,registre ,0x8801 ,NULL ,0 );	spca5xxRegWrite(spca50x->dev,0x00,DataLow ,0x8805 ,NULL ,0 );	spca5xxRegWrite(spca50x->dev,0x00,DataHight ,0x8800 ,NULL ,0 );	while (retry--) {		spca5xxRegRead(spca50x->dev,0x00 ,0 ,0x8803 , &Data ,1);	if (!Data) 		break;	}}#if 0/****************** not in use **********************************/static int spca561_ReadI2c(struct usb_spca50x *spca50x, __u16 registre,__u8 mode){	int  retry = 60;		unsigned char value = 0;	__u8 Data = 0;	spca5xxRegWrite(spca50x->dev,0x00,0x92,0x8804 ,NULL ,0 );	spca5xxRegWrite(spca50x->dev,0x00,registre ,0x8801 ,NULL ,0 );	spca5xxRegWrite(spca50x->dev,0x00,(mode | 0x01),0x8802 ,NULL ,0 );	while (retry--) {		spca5xxRegRead(spca50x->dev,0x00 ,0 ,0x8803 ,&Data ,1);	if (!Data) 		break;	}	if (retry == 0) return -1;	spca5xxRegRead(spca50x->dev,0x00 ,0 ,0x8800 , &value ,1);	return (int) value;}static int spca561_readEEpromid(struct usb_spca50x *spca50x){int release_number = 0;__u8 val =0;	spca5xxRegWrite(spca50x->dev,0x00,0x02,0x8201 ,NULL ,0 );	spca5xxRegWrite(spca50x->dev,0x00,0x08,0x8200 ,NULL ,0 );	spca5xxRegWrite(spca50x->dev,0x00,0x01,0x8200 ,NULL ,0 );	spca5xxRegRead(spca50x->dev,0x00,0x00,0x8205 ,&val ,1 );	release_number = val;	spca5xxRegRead(spca50x->dev,0x00,0x00,0x8206 ,&val ,1 );	release_number = (release_number << 8) | val;	spca5xxRegWrite(spca50x->dev,0x00,0x07,0x8201 ,NULL ,0 );	spca5xxRegWrite(spca50x->dev,0x00,0x08,0x8200 ,NULL ,0 );	spca5xxRegWrite(spca50x->dev,0x00,0x01,0x8200 ,NULL ,0 );	spca5xxRegRead(spca50x->dev,0x00,0x00,0x8205 ,&val ,1 );	release_number = (release_number << 8) | val;	spca5xxRegRead(spca50x->dev,0x00,0x00,0x8206 ,&val ,1 );	release_number = (release_number << 8) | val; // should find 0x00010080 for the 0x403b}static __u16 Pb100_init_0561_1[][2]={	/*reg,  value */	{0x0001,0x000d},	{0x0002,0x0018},	{0x0004,0x0165},	{0x0005,0x0025},	{0x0007,0x00aa},	{0x0020,0x1504},	{0x0039,0x0002},	{0x0035,0x0010},	{0x0009,0x1049},	{0x0028,0x000b},	{0x003b,0x000f},	{0x003c,0x0000},	{0,0}};static __u16 Pb100_init_0561_2[][2]={	{0x0003,0x0121},	{0x0004,0x0165},	{0x0005,0x002f},	{0x0006,0x0000},	{0x000a,0x0001},	{0x0009,0x0861},	{0x0035,0x0014},	{0,0}};static __u16 Pb100_init_403b_1[][2]={	{0x0003,0x0125},	{0x0004,0x0169},	{0x0005,0x003a},	{0x002f,0x0f00},	{0x0020,0x3304},	{0x0006,0x0000},	{0x0007,0x00aa},	{0x0039,0x000b},	{0x0035,0x0010},	{0x0009,0x23ff},	{0x0028,0x000b},	{0x003b,0x000f},	{0x003c,0x0000},	{0,0}};static __u16 Pb100_init_403b_2[][2]={	{0x0001,0x0003},	{0x0002,0x000e},	{0,0}};/******************** End not in use **********************/#endif static __u16 spca561_init_data[][3]={	{ 0 , 0x0000 , 0x8114 }, // Software GPIO output data	{ 0 , 0x0001 , 0x8114 }, // Software GPIO output data	{ 0 , 0x0000 , 0x8112 }, // Some kind of reset	{ 0 , 0x0003 , 0x8701 }, // PCLK clock delay adjustment	{ 0 , 0x0001 , 0x8703 }, // HSYNC from cmos inverted	{ 0 , 0x0011 , 0x8118 }, // Enable and conf sensor	{ 0 , 0x0001 , 0x8118 }, // Conf sensor	{ 0 , 0x0092 , 0x8804 }, // I know nothing about these	{ 0 , 0x0010 , 0x8802 }, // 0x88xx registers, so I won't	/*********************/	{ 0 , 0x000d , 0x8805 }, // sensor default setting	{ 0 , 0x0001 , 0x8801 }, // 1 <- 0x0d	{ 0 , 0x0000 , 0x8800 },	{ 0 , 0x0018 , 0x8805 },	{ 0 , 0x0002 , 0x8801 }, // 2 <- 0x18	{ 0 , 0x0000 , 0x8800 },	{ 0 , 0x0065 , 0x8805 },	{ 0 , 0x0004 , 0x8801 }, // 4 <- 0x01 0x65	{ 0 , 0x0001 , 0x8800 },	{ 0 , 0x0021 , 0x8805 },	{ 0 , 0x0005 , 0x8801 }, // 5 <- 0x21	{ 0 , 0x0000 , 0x8800 },	{ 0 , 0x00aa , 0x8805 },	{ 0 , 0x0007 , 0x8801 }, // 7 <- 0xaa	{ 0 , 0x0000 , 0x8800 },	{ 0 , 0x0004 , 0x8805 },	{ 0 , 0x0020 , 0x8801 }, // 0x20 <- 0x15 0x04	{ 0 , 0x0015 , 0x8800 }, 	{ 0 , 0x0002 , 0x8805 },	{ 0 , 0x0039 , 0x8801 }, // 0x39 <- 0x02	{ 0 , 0x0000 , 0x8800 },	{ 0 , 0x0010 , 0x8805 },	{ 0 , 0x0035 , 0x8801 }, // 0x35 <- 0x10	{ 0 , 0x0000 , 0x8800 },	{ 0 , 0x0049 , 0x8805 },	{ 0 , 0x0009 , 0x8801 }, // 0x09 <- 0x10 0x49	{ 0 , 0x0010 , 0x8800 },	{ 0 , 0x000b , 0x8805 },	{ 0 , 0x0028 , 0x8801 }, // 0x28 <- 0x0b	{ 0 , 0x0000 , 0x8800 },	{ 0 , 0x000f , 0x8805 },	{ 0 , 0x003b , 0x8801 }, // 0x3b <- 0x0f	{ 0 , 0x0000 , 0x8800 },	{ 0 , 0x0000 , 0x8805 },	{ 0 , 0x003c , 0x8801 }, // 0x3c <- 0x00	{ 0 , 0x0000 , 0x8800 },	/**********************/	{ 0 , 0x0018 , 0x8601 }, // Pixel/line selection for color separation	{ 0 , 0x0000 , 0x8602 }, // Optical black level for user setting	{ 0 , 0x0060 , 0x8604 }, // Optical black horizontal offset	{ 0 , 0x0002 , 0x8605 }, // Optical black vertical offset	{ 0 , 0x0000 , 0x8603 }, // Non-automatic optical black level	{ 0 , 0x0002 , 0x865b }, // Horizontal offset for valid pixels	{ 0 , 0x0000 , 0x865f }, // Vertical valid pixels window (x2)	{ 0 , 0x00b0 , 0x865d }, // Horizontal valid pixels window (x2)	{ 0 , 0x0090 , 0x865e }, // Vertical valid lines window (x2)	{ 0 , 0x00e0 , 0x8406 }, // Memory buffer threshold	{ 0 , 0x0000 , 0x8660 }, // Compensation memory stuff	{ 0 , 0x0002 , 0x8201 }, // Output address for r/w serial EEPROM	{ 0 , 0x0008 , 0x8200 }, // Clear valid bit for serial EEPROM	{ 0 , 0x0001 , 0x8200 }, // OprMode to be executed by hardware	{ 0 , 0x0007 , 0x8201 }, // Output address for r/w serial EEPROM	{ 0 , 0x0008 , 0x8200 }, // Clear valid bit for serial EEPROM	{ 0 , 0x0001 , 0x8200 }, // OprMode to be executed by hardware	{ 0 , 0x0010 , 0x8660 }, // Compensation memory stuff	{ 0 , 0x0018 , 0x8660 }, // Compensation memory stuff		{ 0 , 0x0004 , 0x8611 }, // R offset for white balance	{ 0 , 0x0004 , 0x8612 }, // Gr offset for white balance	{ 0 , 0x0007 , 0x8613 }, // B offset for white balance	{ 0 , 0x0000 , 0x8614 }, // Gb offset for white balance	{ 0 , 0x008c , 0x8651 }, // R gain for white balance	{ 0 , 0x008c , 0x8652 }, // Gr gain for white balance	{ 0 , 0x00b5 , 0x8653 }, // B gain for white balance	{ 0 , 0x008c , 0x8654 }, // Gb gain for white balance	{ 0 , 0x0002 , 0x8502 }, // Maximum average bit rate stuff		{ 0 , 0x0011 , 0x8802 },	{ 0 , 0x0087 , 0x8700 }, // Set master clock (96Mhz????)	{ 0 , 0x0081 , 0x8702 }, // Master clock output enable		{ 0 , 0x0000 , 0x8500 }, // Set image type (352x288 no compression)				 // Originally was 0x0010 (352x288 compression)		{ 0 , 0x0002 , 0x865b }, // Horizontal offset for valid pixels	{ 0 , 0x0003 , 0x865c }, // Vertical offset for valid lines	/*************************/ // sensor active	{ 0 , 0x0003 , 0x8801 }, // 0x03 <- 0x01 0x21 //289	{ 0 , 0x0021 , 0x8805 },	{ 0 , 0x0001 , 0x8800 },	{ 0 , 0x0004 , 0x8801 }, // 0x04 <- 0x01 0x65 //357	{ 0 , 0x0065 , 0x8805 },	{ 0 , 0x0001 , 0x8800 },	{ 0 , 0x0005 , 0x8801 }, // 0x05 <- 0x2f	{ 0 , 0x002f , 0x8805 },	{ 0 , 0x0000 , 0x8800 },	{ 0 , 0x0006 , 0x8801 }, // 0x06 <- 0	{ 0 , 0x0000 , 0x8805 },	{ 0 , 0x0000 , 0x8800 },	{ 0 , 0x000a , 0x8801 }, // 0x0a <- 2	{ 0 , 0x0002 , 0x8805 },	{ 0 , 0x0000 , 0x8800 },	{ 0 , 0x0009 , 0x8801 }, // 0x09 <- 0x1061	{ 0 , 0x0061 , 0x8805 },	{ 0 , 0x0010 , 0x8800 },	{ 0 , 0x0035 , 0x8801 }, // 0x35 <-0x14	{ 0 , 0x0014 , 0x8805 },	{ 0 , 0x0000 , 0x8800 },	{ 0 , 0x0030 , 0x8112 }, // ISO and drop packet enable	{ 0 , 0x0000 , 0x8112 }, // Some kind of reset ????	{ 0 , 0x0009 , 0x8118 }, // Enable sensor and set standby	{ 0 , 0x0000 , 0x8114 }, // Software GPIO output data	{ 0 , 0x0000 , 0x8114 }, // Software GPIO output data	{ 0 , 0x0001 , 0x8114 }, // Software GPIO output data	{ 0 , 0x0000 , 0x8112 }, // Some kind of reset ???	{ 0 , 0x0003 , 0x8701 }, 	{ 0 , 0x0001 , 0x8703 },	{ 0 , 0x0011 , 0x8118 },	{ 0 , 0x0001 , 0x8118 },	/**************************/	{ 0 , 0x0092 , 0x8804 },	{ 0 , 0x0010 , 0x8802 },	{ 0 , 0x000d , 0x8805 },	{ 0 , 0x0001 , 0x8801 },	{ 0 , 0x0000 , 0x8800 },	{ 0 , 0x0018 , 0x8805 },	{ 0 , 0x0002 , 0x8801 },	{ 0 , 0x0000 , 0x8800 },	{ 0 , 0x0065 , 0x8805 },	{ 0 , 0x0004 , 0x8801 },	{ 0 , 0x0001 , 0x8800 },	{ 0 , 0x0021 , 0x8805 },	{ 0 , 0x0005 , 0x8801 },	{ 0 , 0x0000 , 0x8800 },	{ 0 , 0x00aa , 0x8805 },	{ 0 , 0x0007 , 0x8801 }, // mode 0xaa	{ 0 , 0x0000 , 0x8800 },	{ 0 , 0x0004 , 0x8805 },	{ 0 , 0x0020 , 0x8801 },	{ 0 , 0x0015 , 0x8800 }, //mode 0x0415	{ 0 , 0x0002 , 0x8805 },	{ 0 , 0x0039 , 0x8801 },	{ 0 , 0x0000 , 0x8800 },	{ 0 , 0x0010 , 0x8805 },	{ 0 , 0x0035 , 0x8801 },	{ 0 , 0x0000 , 0x8800 },	{ 0 , 0x0049 , 0x8805 },	{ 0 , 0x0009 , 0x8801 },	{ 0 , 0x0010 , 0x8800 },	{ 0 , 0x000b , 0x8805 },	{ 0 , 0x0028 , 0x8801 },	{ 0 , 0x0000 , 0x8800 },	{ 0 , 0x000f , 0x8805 },	{ 0 , 0x003b , 0x8801 },	{ 0 , 0x0000 , 0x8800 },	{ 0 , 0x0000 , 0x8805 },	{ 0 , 0x003c , 0x8801 },	{ 0 , 0x0000 , 0x8800 },	{ 0 , 0x0002 , 0x8502 },	{ 0 , 0x0039 , 0x8801 },	{ 0 , 0x0000 , 0x8805 },	{ 0 , 0x0000 , 0x8800 },	{ 0 , 0x0087 , 0x8700 }, //overwrite by start	{ 0 , 0x0081 , 0x8702 },	{ 0 , 0x0000 , 0x8500 },//	{ 0 , 0x0010 , 0x8500 },  -- Previous line was this	{ 0 , 0x0002 , 0x865b },	{ 0 , 0x0003 , 0x865c },	/************************/		{ 0 , 0x0003 , 0x8801 }, // 0x121-> 289	{ 0 , 0x0021 , 0x8805 },	{ 0 , 0x0001 , 0x8800 },	{ 0 , 0x0004 , 0x8801 }, //0x165 -> 357	{ 0 , 0x0065 , 0x8805 },	{ 0 , 0x0001 , 0x8800 },	{ 0 , 0x0005 , 0x8801 }, //0x2f //blanking control colonne	{ 0 , 0x002f , 0x8805 },	{ 0 , 0x0000 , 0x8800 },	{ 0 , 0x0006 , 0x8801 }, //0x00 //blanking mode row	{ 0 , 0x0000 , 0x8805 },	{ 0 , 0x0000 , 0x8800 },	{ 0 , 0x000a , 0x8801 }, //0x01 //0x02	{ 0 , 0x0001 , 0x8805 },	{ 0 , 0x0000 , 0x8800 },	{ 0 , 0x0009 , 0x8801 },// 0x1061 // setexposure times && pixel clock 0001 0 | 000 0110 0001	{ 0 , 0x0061 , 0x8805 },//61 31	{ 0 , 0x0008 , 0x8800 },// 10	{ 0 , 0x0035 , 0x8801 },// 0x14 // set gain general	{ 0 , 0x0014 , 0x8805 },	{ 0 , 0x0000 , 0x8800 },	{ 0 , 0x0030 , 0x8112 },	{ 0 , 0 , 0 }} ;/***************** Vista stuff ******************************/static __u16 spca561_vista_data[][3]={/***********************/ { 0x00, 0xC8, 0x8631}, { 0x00, 0xC8, 0x8634}, { 0x00, 0x00, 0x8112}, /********************/ { 0x00, 0x01, 0x8114}, { 0x00, 0x21, 0x8118}, /********************/ { 0x00, 0x92, 0x8804}, { 0x00, 0x14, 0x8802}, //0x04  { 0x00, 0x03, 0x8801}, { 0x00, 0x25, 0x8805}, { 0x00, 0x01, 0x8800},  { 0x00, 0x04, 0x8801}, { 0x00, 0x69, 0x8805}, { 0x00, 0x01, 0x8800},  { 0x00, 0x05, 0x8801}, { 0x00, 0x3A, 0x8805}, { 0x00, 0x00, 0x8800},  { 0x00, 0x2F, 0x8801}, { 0x00, 0x00, 0x8805}, { 0x00, 0x0F, 0x8800},  { 0x00, 0x20, 0x8801}, { 0x00, 0x04, 0x8805}, { 0x00, 0x33, 0x8800},  { 0x00, 0x00, 0x8805}, { 0x00, 0x06, 0x8801}, { 0x00, 0x00, 0x8800},  { 0x00, 0xAA, 0x8805}, { 0x00, 0x07, 0x8801}, { 0x00, 0x00, 0x8800},  { 0x00, 0x0B, 0x8805}, { 0x00, 0x39, 0x8801}, { 0x00, 0x00, 0x8800},  { 0x00, 0x10, 0x8805}, //10 { 0x00, 0x35, 0x8801}, { 0x00, 0x00, 0x8800},  { 0x00, 0xff, 0x8805}, //00 31 { 0x00, 0x09, 0x8801}, // 0010 0 010 0000 0000 { 0x00, 0x23, 0x8800}, //22 08  { 0x00, 0x0B, 0x8805}, { 0x00, 0x28, 0x8801}, { 0x00, 0x00, 0x8800}, 

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