a86_adsu16_generic.v

intel 8088 架构的verilog代码

// http://gforge.openchip.org/projects/a86


//
// ADD/SUB with carry in/out and Overflow
// Generic vendor neutral implementation
//

`ifdef a86_vendor_generic

module a86_ADSU16_GENERIC(A, ADD, B, CI, CO, OFL, S);

input [15:0] A;
input ADD;
input [15:0] B;
input CI;
output CO;
output OFL;
output [15:0] S;



endmodule

`endif