at_hw.h

Linux* Base Driver for the Attansic(R) L1 Gigabit Ethernet Adapter

        uint32_t            tx_sz_64;               // The number of good and bad packets transmitted that are 64 byte long.
        uint32_t            tx_sz_65_127;           // The number of good and bad packets transmitted that are between 65 and 127-byte long.
        uint32_t            tx_sz_128_255;          // The number of good and bad packets transmitted that are between 128 and 255-byte long.
        uint32_t            tx_sz_256_511;          // The number of good and bad packets transmitted that are between 256 and 511-byte long.
        uint32_t            tx_sz_512_1023;         // The number of good and bad packets transmitted that are between 512 and 1023-byte long.
        uint32_t            tx_sz_1024_1518;        // The number of good and bad packets transmitted that are between 1024 and 1518-byte long.
        uint32_t            tx_sz_1519_max;         // The number of good and bad packets transmitted that are between 1519-byte and MTU.
        uint32_t            tx_1_col;               // The number of packets subsequently transmitted successfully with a single prior collision.
        uint32_t            tx_2_col;               // The number of packets subsequently transmitted successfully with multiple prior collisions.
        uint32_t            tx_late_col;            // The number of packets transmitted with late collisions.
        uint32_t            tx_abort_col;           // The number of transmit packets aborted due to excessive collisions.
        uint32_t            tx_underrun;            // The number of transmit packets aborted due to transmit FIFO underrun, or TRD FIFO underrun
        uint32_t            tx_rd_eop;              // The number of times that read beyond the EOP into the next frame area when TRD was not written timely
        uint32_t            tx_len_err;             // The number of transmit packets with length field does NOT match the actual frame size.
        uint32_t            tx_trunc;               // The number of transmit packets truncated due to size exceeding MTU.
        uint32_t            tx_bcast_byte;          // The byte count of broadcast packet transmitted, excluding FCS.
        uint32_t            tx_mcast_byte;          // The byte count of multicast packet transmitted, excluding FCS.
        uint32_t            smb_updated;            // 1: SMB Updated. This is used by software as the indication of the statistics update. 
                                                    // Software should clear this bit as soon as retrieving the statistics information.
} _AT_ATTRIB_PACK_ stats_msg_block_t;  

/* Coalescing Message Block */ 
typedef struct coals_msg_block {                 
        uint32_t            int_stats;              // interrupt status
        uint16_t            rrd_prod_idx;           // TRD Producer Index.
        uint16_t            rfd_cons_idx;           // RFD Consumer Index.
        uint16_t            update;                 // Selene sets this bit every time it DMA the CMB to host memory. 
                                                    // Software supposes to clear this bit when CMB information is processed.
        uint16_t            tpd_cons_idx;           // TPD Consumer Index.
} _AT_ATTRIB_PACK_  coals_msg_block_t;                                
                                                
                                                
/* RRD descriptor */                            
typedef struct rx_return_desc {                         
        uint8_t             num_buf;                // Number of RFD buffers used by the received packet
        uint8_t             resved;
        uint16_t            buf_indx;               // RFD Index of the first buffer
	union {
		uint32_t    valid;
		struct {
                    uint16_t    rx_chksum;
		    uint16_t    pkt_size;         
		} xsum_sz;
	}           xsz;
      
      	uint16_t    pkt_flg;                // Packet flags
        uint16_t    err_flg;                // Error flags
        uint16_t            resved2;
        uint16_t            vlan_tag;               // VLAN TAG
} _AT_ATTRIB_PACK_ rx_return_desc_t ;  

#define PACKET_FLAG_ETH_TYPE        0x0080
#define PACKET_FLAG_VLAN_INS        0x0100
#define PACKET_FLAG_ERR             0x0200
#define PACKET_FLAG_IPV4            0x0400
#define PACKET_FLAG_UDP             0x0800
#define PACKET_FLAG_TCP             0x1000
#define PACKET_FLAG_BCAST           0x2000
#define PACKET_FLAG_MCAST           0x4000
#define PACKET_FLAG_PAUSE           0x8000
                           
 

#define ERR_FLAG_CRC                0x0001
#define ERR_FLAG_CODE               0x0002
#define ERR_FLAG_DRIBBLE            0x0004   
#define ERR_FLAG_RUNT               0x0008
#define ERR_FLAG_OV                 0x0010
#define ERR_FLAG_TRUNC              0x0020
#define ERR_FLAG_IP_CHKSUM          0x0040
#define ERR_FLAG_L4_CHKSUM          0x0080
#define ERR_FLAG_LEN                0x0100
#define ERR_FLAG_DES_ADDR           0x0200                          
                                           
/* RFD descriptor */                            
typedef struct rx_free_desc {                           
        uint64_t            buffer_addr;            // Address of the descriptor's data buffer */
        uint16_t            buf_len;                // Size of the receive buffer in host memory, in byte
        uint16_t            coalese;                // Update consumer index to host after the reception of this frame
} _AT_ATTRIB_PACK_ rx_free_desc_t;  
       
/* TPD descriptor */

typedef struct tso_param  {
        unsigned buf_len                : 14 ; 
        unsigned dma_int                : 1  ;  
        unsigned pkt_int                : 1  ; 
        uint16_t valan_tag                   ;     
        unsigned eop                    : 1  ;
        /* command */                                   
        unsigned coalese                : 1  ;
        unsigned ins_vlag               : 1  ;
        unsigned custom_chksum          : 1  ;
        unsigned segment                : 1  ;
        unsigned ip_chksum              : 1  ;
        unsigned tcp_chksum             : 1  ;
        unsigned udp_chksum             : 1  ;
        /* packet state */                              
        unsigned vlan_tagged            : 1  ;    
        unsigned eth_type               : 1  ;   
        unsigned iphl                   : 4  ;
        unsigned tcp_hdrlen             : 4  ;   
        unsigned hdr_flg                : 1  ;
        unsigned mss                    : 13 ;
} _AT_ATTRIB_PACK_ tso_param_t ;

typedef struct csum_param  {
        unsigned buf_len                : 14 ; 
        unsigned dma_int                : 1  ;  
        unsigned pkt_int                : 1  ; 
        uint16_t valan_tag               ;     
        unsigned eop                    : 1  ;
        /* command */                                   
        unsigned coalese                : 1  ;
        unsigned ins_vlag               : 1  ;
        unsigned custom_chksum          : 1  ;
        unsigned segment                : 1  ;
        unsigned ip_chksum              : 1  ;
        unsigned tcp_chksum             : 1  ;
        unsigned udp_chksum             : 1  ;
        /* packet state */                              
        unsigned vlan_tagged            : 1  ;    
        unsigned eth_type               : 1  ;   
        unsigned iphl                   : 4  ;
        unsigned                        : 2  ;            
        unsigned payload_offset         : 8  ;
        unsigned xsum_offset            : 8  ;
} _AT_ATTRIB_PACK_ csum_param_t ;

typedef union tpd_descr {
    uint64_t        data ;
    csum_param_t    csum ;
    tso_param_t     tso  ;
} _AT_ATTRIB_PACK_  tpd_descr_t;

typedef struct tx_packet_desc {
        uint64_t    buffer_addr; 
        tpd_descr_t desc;
} _AT_ATTRIB_PACK_  tx_packet_desc_t;


/* DMA Order Settings */
typedef enum {
    at_dma_ord_in = 1,
    at_dma_ord_enh = 2,
    at_dma_ord_out = 4
} at_dma_order;

typedef enum {
    at_rcb_64 = 0,
    at_rcb_128 = 1
} at_dma_rcb;

typedef enum {
    at_dma_req_128 = 0,
    at_dma_req_256 = 1,
    at_dma_req_512 = 2,
    at_dam_req_1024 = 3,
    at_dam_req_2048 = 4,
    at_dma_req_4096 = 5
} at_dma_req_block;

typedef enum {
    at_10_half = 0,
    at_10_full = 1,
    at_100_half = 2,
    at_100_full = 3
} at_speed_duplex_type;



typedef struct _spi_flash_dev {
    const char*     manu_name;  // manufacturer id
    // op-code
    uint8_t    cmdWRSR;
    uint8_t    cmdREAD;
    uint8_t    cmdPROGRAM;
    uint8_t    cmdWREN;
    uint8_t    cmdWRDI;
    uint8_t    cmdRDSR;
    uint8_t    cmdRDID;
    uint8_t    cmdSECTOR_ERASE;
    uint8_t    cmdCHIP_ERASE;
} spi_flash_dev;


/* Structure containing variables used by the shared code (e1000_hw.c) */
struct at_hw {
    uint8_t *hw_addr;           //
    void *back;                 //

    at_dma_order dma_ord;
    at_dma_rcb rcb_value;
    at_dma_req_block dmar_block;
    at_dma_req_block dmaw_block;
        
    uint8_t preamble_len;
    uint8_t max_retry;          // Retransmission maximum , afterwards the packet will be discarded.
    uint8_t jam_ipg;            // IPG to start JAM for collision based flow control in half-duplex mode. In unit of 8-bit time.
    uint8_t ipgt;               // Desired back to back inter-packet gap. The default is 96-bit time.
    uint8_t min_ifg;            // Minimum number of IFG to enforce in between RX frames. Frame gap below such IFP is dropped.
    uint8_t ipgr1;              // 64bit Carrier-Sense window
    uint8_t ipgr2;              // 96-bit IPG window
                                
    uint8_t tpd_burst;          // Number of TPD to prefetch in a cache-aligned burst. Each TPD is 16-byte in length.
    uint8_t rfd_burst;          // Number of RFD to prefetch in a cache-aligned burst. Each RFD is 12-byte in length.
    uint8_t rfd_fetch_gap;      // 
    uint8_t rrd_burst;          // Threshold of number of RRDs can be retired in a burst. Each RRD is 16-byte in length.
    uint8_t tpd_fetch_th;       //
    uint8_t tpd_fetch_gap;
    uint16_t tx_jumbo_task_th;
    uint16_t txf_burst;         // Number of data byte to read in a cache-aligned burst. Each SRAM entry is 8-byte in length.
    uint16_t rx_jumbo_th;       // Jumbo packet size for non-VLAN packet. VLAN packet should add 4-byte
    uint16_t rx_jumbo_lkah;
    uint16_t rrd_ret_timer;     // RRD retirement timer. Decrement by 1 after every 512ns passes.
    uint16_t lcol;              // Collision Window

    uint16_t cmb_tpd;
    uint16_t cmb_rrd;
    uint16_t cmb_rx_timer;     
    uint16_t cmb_tx_timer;      
    uint32_t smb_timer;
    uint16_t MediaType;
    uint16_t autoneg_advertised;
    uint16_t pci_cmd_word;

    uint16_t mii_autoneg_adv_reg;
    uint16_t mii_1000t_ctrl_reg;
    
    uint32_t mem_rang;
    uint32_t txcw;
    uint32_t max_frame_size;    //
    uint32_t min_frame_size;    //
    uint32_t mc_filter_type;
    uint32_t num_mc_addrs;
    uint32_t collision_delta;
    uint32_t tx_packet_delta;
    uint16_t phy_spd_default;
    
    uint16_t dev_rev; 
    uint16_t device_id;         //
    uint16_t vendor_id;         //
    uint16_t subsystem_id;      //
    uint16_t subsystem_vendor_id;//
    uint8_t revision_id;        //

    
    // spi flash
    uint8_t flash_vendor;
    
    uint8_t dma_fairness;
    uint8_t mac_addr[NODE_ADDRESS_SIZE];//
    uint8_t perm_mac_addr[NODE_ADDRESS_SIZE];//

//    boolean_t phy_preamble_sup;
    boolean_t phy_configured;
 
};

#endif//_ATTANSIC_HW_H__