📄 mytest.ab0
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module mytest
pa7 PIN 21; "Latched address out
pa6 PIN 22; "Latched address out
pa5 PIN 24; "Latched address out
pa4 PIN 26; "Latched address out
pa3 PIN 28; "Latched address out
pa2 PIN 32; "Latched address out
pa1 PIN 34; "Latched address out
pa0 PIN 35 istype 'reg';
cs0 PIN 66;
cs1 PIN 67;
cs2 PIN 72;
ma0 PIN 73;
pb1 PIN 78;
tdo PIN 6; "TDO
tdi PIN 7; "TDI
tck PIN 16; "TCK
tms PIN 20; "TMS
ale PIN 4; "ALE output
Tmr1_Gate PIN 2; "Int1 or Timer1 Gate
Tmr0_Gate PIN 79; "Int0 or Timer0 Gate
TxD PIN 77; "UART1 TxD
RxD PIN 75; "UART1 RxD
dog PIN 60; "GP I/O
led PIN 59; "GP I/O
TxD2 PIN 58; "UART2 TxD
RxD2 PIN 56; "UART2 RxD
p1_0 PIN 52; "GP I/O
a11 PIN 57; "Address line
a10 PIN 55; "Address line
a9 PIN 53; "Address line
a8 PIN 51; "Address line
a7 PIN 47; "Data/address bus line
a6 PIN 45; "Data/address bus line
a5 PIN 43; "Data/address bus line
a4 PIN 41; "Data/address bus line
a3 PIN 39; "Data/address bus line
a2 PIN 38; "Data/address bus line
a1 PIN 37; "Data/address bus line
a0 PIN 36; "Data/address bus line
_Reset_In PIN 68;
VREF PIN 70; "VREF input
_rd PIN 62;
_psen PIN 63;
_wr PIN 65;
USB_minus PIN 8; "USB- bus
USB_plus PIN 10; "USB+ bus
Xtal1 PIN 48; "Xtal1
Xtal2 PIN 49; "Xtal2
rs0 node;
csiop node;
fs0 node;
fs1 node;
fs2 node;
fs3 node;
fs4 node;
fs5 node;
fs6 node;
fs7 node;
csboot0 node;
csboot1 node;
csboot2 node;
csboot3 node;
_reset node 543;
a12 node 512;
a13 node 513;
a14 node 514;
a15 node 515;
pgr2..pgr0 node;
X = .x.;
address = [a15..a0];
page = [pgr2..pgr0];
Vcc = 1;
Gnd = 0;
// Begin user preserved declarations (not affected by iterations of DA usage) ===================
// End user preserved declarations (not affected by iterations of DA usage) ===================
equations
rs0 = ((address >= ^h0000) & (address <= ^h7EFF));
csiop = ((address >= ^h7F00) & (address <= ^h7FFF));
fs0 = ((page == 0) & (address >= ^h8000) & (address <= ^hFFFF));
fs1 = ((page == 1) & (address >= ^h8000) & (address <= ^hFFFF));
fs2 = ((page == 2) & (address >= ^h8000) & (address <= ^hFFFF));
fs3 = ((page == 3) & (address >= ^h8000) & (address <= ^hFFFF));
fs4 = ((page == 4) & (address >= ^h8000) & (address <= ^hFFFF));
fs5 = ((page == 5) & (address >= ^h8000) & (address <= ^hFFFF));
fs6 = ((page == 6) & (address >= ^h8000) & (address <= ^hFFFF));
fs7 = ((page == 7) & (address >= ^h8000) & (address <= ^hFFFF));
csboot0 = ((address >= ^h0000) & (address <= ^h1FFF));
csboot1 = ((address >= ^h2000) & (address <= ^h3FFF));
csboot2 = ((address >= ^h4000) & (address <= ^h5FFF));
csboot3 = ((address >= ^h6000) & (address <= ^h7FFF));
! cs0 = ((address >= ^h8000) & (address <= ^h8FFF) & (!_wr))
# ((address >= ^h8000) & (address <= ^h8FFF) & (!_rd));
! cs1 = ((address >= ^h9000) & (address <= ^h9FFF) & (!_wr))
# ((address >= ^h9000) & (address <= ^h9FFF) & (!_rd));
! cs2 = ((address >= ^hA000) & (address <= ^hAFFF));
ma0 = pa0;
pa0.le = ale; "latched by ale
// Begin user preserved equations (not affected by iterations of DA usage) ===================
// End user preserved equations (not affected by iterations of DA usage) ===================
end mytest
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