u_c33cpu.h

The combined demo is dedicated for S1C33L05, so DMT33L05 should be used to load and run the demo. F

//****************************************************************************
//
//  Copyright (C) SEIKO EPSON CORP. 1999
//
//  File name: c33208.h
//    This is C33208 symbol definition file.
//
//  Revision history
//      1999.07.29  T.Mineshima start c33208 structure and define
//      1999.08.04  T.Mineshima change define name.
//
//****************************************************************************

#ifndef C33208_H
#define C33208_H

#include "u_macro.h"

extern volatile struct c_IOtag *plc_IO;
/****************************************************************/
/*  c33208.h    : C33208 symbol definition file     */
/****************************************************************/

/****************************************************************/
/* [8-bit timer clock select register] c_CLKSEL         */
/****************************************************************/
union c_CLKSELtag {
    volatile struct {
        unsigned char   P8TPCK0 : 1;        /* 8-bit timer0 clock division ratio selection */
        unsigned char   P8TPCK1 : 1;        /* 8-bit timer1 clock division ratio selection */
        unsigned char   P8TPCK2 : 1;        /* 8-bit timer2 clock division ratio selection */
        unsigned char   P8TPCK3 : 1;        /* 8-bit timer3 clock division ratio selection */
    } bCTL;
    volatile unsigned char  ucCTL;
};

/****************************************************************/
/* [Clock control register] c_CLKCTL                */
/****************************************************************/
union c_CLKCTLtag {
    volatile struct {
        unsigned char   TSA : 3;        /* Clock A clock division ratio selection */
        unsigned char   TONA    : 1;        /* Clock A clock control */
        unsigned char   TSB : 3;        /* Clock B clock division ratio selection */
        unsigned char   TONB    : 1;        /* Clock B clock control */
    } bCTL;
    volatile unsigned char  ucCTL;
};

/****************************************************************/
/* [Clock timer] c_TIMER                    */
/****************************************************************/
struct c_TIMERtag {
    union {                     /* Clock timer Run/Stop register */
        volatile struct {
            unsigned char   TCRUN   : 1;    /* Clock timer Run/Stop control */
            unsigned char   TCRST   : 1;    /* Clock timer Reset */
        } bCTL;
        volatile unsigned char  ucCTL;
    } rTCR;

    union {                     /* Clock timer interrupt control register */
        volatile struct {
            unsigned char   TCAF    : 1;    /* Alarm factor generation flag */
            unsigned char   TCIF    : 1;    /* Interrupt factor generation flag */
            unsigned char   TCASE   : 3;    /* Clock timer alarm factor selection */
            unsigned char   TCISE   : 3;    /* Clock timer interrupt factor selection */
        } bCTL;
        volatile unsigned char  ucCTL;
    } rTCI;

    volatile unsigned char  rTCD;           /* Clock timer data */
    volatile unsigned char  rTCMD;          /* Clock timer second counter data */
    volatile unsigned char  rTCHD;          /* Clock timer minute counter data */
    volatile unsigned char  rTCDD;          /* Clock timer hour counter data */
    volatile unsigned char  rTCNDL;         /* Clock timer day counter data (low-order 8-bits) */
    volatile unsigned char  rTCNDH;         /* Clock timer day counter data (high-order 8-bits) */
    volatile unsigned char  rTCCH;          /* Clock timer minute comparison data */
    volatile unsigned char  rTCCD;          /* Clock timer hour comparison data */
    volatile unsigned char  rTCCN;          /* Clock timer day comparison data */
};

/****************************************************************/
/* [8-bit timer] c_T8                       */
/****************************************************************/
struct c_T8tag {
    union {                     /* 8-bit timer control register */
        volatile struct {
            unsigned char   PTRUN   : 1;    /* 8-bit timer Run/Stop control */
            unsigned char   PSET    : 1;    /* 8-bit timer preset */
            unsigned char   PTOUT   : 1;    /* 8-bit timer clock output control */
        } bCTL;
        volatile unsigned char  ucCTL;
    } rT8CTL;
    volatile unsigned char  rRLD;           /* 8-bit timer reload data register */
    volatile unsigned char  rPTD;           /* 8-bit timer counter data register */
    unsigned char   Dummy;
};

/****************************************************************/
/* [Watchdog timer] c_WDT                   */
/****************************************************************/
struct c_WDTtag {
    union {                     /* Watchdog timer write protect register */
        volatile struct {
            unsigned char   Dummy   : 7;
            unsigned char   WRWD    : 1;    /* EWD write protection */
        } bCTL;
        volatile unsigned char  ucCTL;
    } rWRWD;

    union {
        volatile struct {           /* Watchdog timer enable register */
            unsigned char   Dummy   : 1;
            unsigned char   EWD : 1;    /* Watchdog timer enable */
        } bCTL;
        volatile unsigned char  ucCTL;
    } rEWD;
};

/****************************************************************/
/* [Power control] c_PWRCTL                 */
/****************************************************************/
struct c_PWRCTLtag {
    union {                     /* Power control register */
        volatile struct {
            unsigned char   SOSC1   : 1;    /* Low-speed (OSC1) oscillation On/Off */
            unsigned char   SOSC3   : 1;    /* High-speed (OSC3) oscillation On/Off */
            unsigned char   CLKCHG  : 1;    /* CPU operating clock switch */
            unsigned char   Dummy   : 2;    /* D4-3 reserved */
            unsigned char   PSCON   : 1;    /* Prescaler On/Off control */
            unsigned char   CLKDT   : 2;    /* System clock division ratio selection */
        } bCTL;
        volatile unsigned char  ucCTL;
    } rPWRCTL;

    union {                     /* Prescaler clock select control register */
        volatile struct {
            unsigned char   PSCDT0  : 1;    /* Prescaler clock selection */
        } bCTL;
        volatile unsigned char  ucCTL;
    } rCLKSEL;

    unsigned char   Dummy1[14];         /* 0x4018f - 0x40182 */

    union {                     /* Clock option register */
        volatile struct {
            unsigned char   PF1ON   : 1;    /* OSC1 external output control */
            unsigned char   Dummy   : 1;    /* D1 reserved */
            unsigned char   P8T1ON  : 1;    /* OSC3-stabilize waiting function */
            unsigned char   HLT2OP  : 1;    /* HALT clock option */
        } bCTL;
        volatile unsigned char  ucCTL;
    } rCLKOPT;

    unsigned char   Dummy2[13];         /* 0x4019d - 0x40191 */

    volatile unsigned char  rPWRPRT;        /* Power control protect register */
};

/****************************************************************/
/* [Serial I/F] c_SIF                       */
/****************************************************************/
struct c_SIFtag {
    volatile unsigned char  rTXD;           /* Serial I/F transmit data register */
    volatile unsigned char  rRXD;           /* Serial I/F receive data register */

    union {                     /* Serial I/F status register */
        volatile struct {
            unsigned char   RDBF    : 1;    /* Receive data buffer full */
            unsigned char   TDBE    : 1;    /* Transmit data buffer empty */
            unsigned char   OER : 1;    /* Overrun error flag */
            unsigned char   PER : 1;    /* Parity error flag */
            unsigned char   FER : 1;    /* Flaming error flag */
            unsigned char   TEND    : 1;    /* Transmit end flag */
        } bCTL;
        volatile unsigned char  ucCTL;
    } rSTATUS;

    union {                     /* Serial I/F control register */
        volatile struct {
            unsigned char   SMD : 2;    /* Transmit mode selection */
            unsigned char   SSCK    : 1;    /* Input clock selection */
            unsigned char   STPB    : 1;    /* Stop bit selection */
            unsigned char   PMD : 1;    /* Parity mode selection */
            unsigned char   EPR : 1;    /* Parity enable */
            unsigned char   RXEN    : 1;    /* Receive enable */
            unsigned char   TXEN    : 1;    /* Transmit enable */
        } bCTL;
        volatile unsigned char  ucCTL;
    } rCONTROL;

    union {                     /* Serial I/F IrDA register */
        volatile struct {
            unsigned char   IRMD    : 2;    /* Interface mode selection */
            unsigned char   IRRL    : 1;    /* I/F input logic inversion */
            unsigned char   IRTL    : 1;    /* I/F output logic inversion */
            unsigned char   DIVMD   : 1;    /* Async. clock division ratio */
        } bCTL;
        volatile unsigned char  ucCTL;
    } rIRDA;
};

/****************************************************************/
/* [A/D converter] c_AD                     */
/****************************************************************/
struct c_ADtag {
    volatile unsigned short rADD;           /* A/D conversion result register */

    union {                     /* A/D trigger register */
        volatile struct {
            unsigned char   CH  : 3;    /* A/D conversion channel status */
            unsigned char   TS  : 2;    /* A/D conversion trigger selection */
            unsigned char   MS  : 1;    /* A/D conversion mode selection */
        } bCTL;
        volatile unsigned char  ucCTL;
    } rTRIG;

    union {                     /* A/D channel register */
        volatile struct {
            unsigned char   CS  : 3;    /* A/D converter start channel selection */
            unsigned char   CE  : 3;    /* A/D converter end channel selection */
        } bCTL;
        volatile unsigned char  ucCTL;
    } rCHNL;

    union {                     /* A/D enable register */
        volatile struct {
            unsigned char   OWE : 1;    /* Overwrite error flag */
            unsigned char   ADST    : 1;    /* A/D conversion control/status */
            unsigned char   ADE : 1;    /* A/D enable */
            unsigned char   ADF : 1;    /* Conversion-complete flag */
        } bCTL;
        volatile unsigned char  ucCTL;
    } rENBL;

    union {                     /* A/D sampling register */
        volatile struct {
            unsigned char   ST  : 2;    /* Input sampling time setup */
        } bCTL;
        volatile unsigned char  ucCTL;
    } rSMPL;
};

/****************************************************************/
/* [Interrupt controller] c_INTC                */
/****************************************************************/
struct c_INTCtag {
    union {                     /* Port input 0/1 interrupt priority register */
        volatile struct {
            unsigned char   PP0L    : 3;    /* Port input 0 interrupt priority level */
            unsigned char   Dummy   : 1;
            unsigned char   PP1L    : 3;    /* Port input 1 interrupt priority level */
        } bPP01L;
        volatile unsigned char  ucPP01L;
    } rPP01L;

    union {                     /* Port input 2/3 interrupt priority register */
        volatile struct {
            unsigned char   PP2L    : 3;    /* Port input 2 interrupt priority level */
            unsigned char   Dummy   : 1;
            unsigned char   PP3L    : 3;    /* Port input 3 interrupt priority level */
        } bPP23L;
        volatile unsigned char  ucPP23L;
    } rPP23L;