smt_ctl.h

The combined demo is dedicated for S1C33L05, so DMT33L05 should be used to load and run the demo. F

/********************************************************************************/
/*																				*/
/*	Copyright (C) SEIKO EPSON CORP. 2000										*/
/*																				*/
/*	File name : smt_ctl.h														*/
/*		This is smart media control library header file.						*/
/*																				*/
/*	Revision history															*/
/*		2000.03.16	H.Ogura		start											*/
/*		2002.01.08	A.Saito		Append macro SMT_M_INTDISABLE, 					*/
/*								Append macro SMT_M_INTENABLE					*/
/*		2002.08.01	A.Saito		Append prototype smtEraseChk()					*/
/*		2002.10.16	A.Saito		Modify define SMT_AVERAGE						*/
/*								Remove define SMT_CPUCLK						*/
/*		2003.03.25	A.Saito		Add new union "SMT_PROLIX_BUFF"					*/
/*		2003.06.05	A.Saito		Modify Comment									*/
/*		2004.03.01	David.Ji	Add DMA, ECC support for C33L05					*/
/*																				*/
/********************************************************************************/
/********************************************************************************/
/*		The tab size of this file is 4. 										*/
/********************************************************************************/


#ifndef	__SMART_MEDIA_CONTROL_LIBRARY__
#define	__SMART_MEDIA_CONTROL_LIBRARY__

/********************************************************/
/*	CONSTANT DEFINE										*/
/********************************************************/
/*------------------------------------------------------*/
/*	SMART MEDIA TYPE									*/
/*------------------------------------------------------*/
#define		SMT_T_FLASH	0				// Flash Memory Type
#define		SMT_T_MASK	1				// MASK ROM Type

/*------------------------------------------------------*/
/*	SMART MEDIA DATA SIZE								*/
/*------------------------------------------------------*/
#define		SMT_S_DATA		512				// Data Size
#define		SMT_S_PROLIX	16				// Prolix Size
#define		SMT_S_ZONE		1024			// Zone Size

/*------------------------------------------------------*/
/*	I/O PORT REGISTER									*/
/*------------------------------------------------------*/
#define		SMT_R_P0PORT	0x00402d1L
#define		SMT_R_P1PORT	0x00402d5L
#define		SMT_R_P2PORT	0x00402d9L
#define		SMT_R_P3PORT	0x00402ddL
#define		SMT_R_P4PORT	0x0300020L
#define		SMT_R_P5PORT	0x0300022L
#define		SMT_R_PDPORT	0x0300f46L
#define		SMT_R_K6PORT	0x00402c4L
#define		SMT_R_KIOPORT	0x0300f46L

#define		SMT_R_AREA07	0x0400000L
#define		SMT_R_AREA13	023000000L
#define		SMT_R_AREA14	0x3000000L
#define		SMT_R_AREA15	0x4000000L



#ifdef	L05DMT
	#define		SMT_R_CD	0x0
	#define		SMT_R_CE	(((volatile union SMT_BITCTL *)SMT_R_P5PORT)->stBit.b4)	
	#define		SMT_R_ALE	(((volatile union SMT_BITCTL *)SMT_R_P2PORT)->stBit.b5)
	#define		SMT_R_CLE	(((volatile union SMT_BITCTL *)SMT_R_P2PORT)->stBit.b4)
	#define		SMT_R_WP	(((volatile union SMT_BITCTL *)SMT_R_P4PORT)->stBit.b0)
	#define		SMT_R_RB	(((volatile union SMT_BITCTL *)SMT_R_PDPORT)->stBit.b5)
	#define		SMT_R_WPS	0x1

	#define		SMT_R_DATAIO	((volatile unsigned char *)SMT_R_AREA15)

	#define 	SMT_ECC_EN		(*(volatile unsigned char*)0x300102|=0x01) 
	#define 	SMT_ECC_DIS	(*(volatile unsigned char*)0x300102 &=0xfe)
	#define 	SMT_ECC_RST	(*(volatile unsigned char*)0x300101|=0x01)
	#define 	SMT_ECC_RDY	(*(volatile unsigned char*)0x300101& 0x1)

	#define 	ECC_A0_CP_ADDR	(unsigned char*)0x300104
	#define 	ECC_A0_LPL_ADDR	(unsigned char*)0x300105
	#define 	ECC_A0_LPH_ADDR	(unsigned char*)0x300106
	#define 	ECC_A1_CP_ADDR	(unsigned char*)0x300107
	#define		ECC_A1_LPL_ADDR	(unsigned char*)0x300108
	#define		ECC_A1_LPH_ADDR	(unsigned char*)0x300109
//ECC value
	#define		SMT_M_ECCVALA1	(unsigned long)((*ECC_A0_LPL_ADDR )|(*ECC_A0_LPH_ADDR<<8)|(*ECC_A0_CP_ADDR<<16))
	#define		SMT_M_ECCVALA2	(unsigned long)((*ECC_A1_LPL_ADDR )|(*ECC_A1_LPH_ADDR<<8)|(*ECC_A1_CP_ADDR<<16))


	//DMA Ch2 setting	 
	#define		SMT_DMA_ENABLE		(*(volatile unsigned char*)0x4824c |= 0x01)
	#define		SMT_DMA_DISABLE		(*(volatile unsigned char*)0x4824c &= 0xfe)
	#define		SMT_DMA_TRG			(*(volatile unsigned char*)0x4029a |= 0x04)
	#define		SMT_DMA_FLAG		(*(volatile unsigned char*)0x4824c & 0x01)

#endif

#ifdef	L04DMT
	#define		SMT_R_CD	0x0
	#define		SMT_R_CE	(((volatile union SMT_BITCTL *)SMT_R_P5PORT)->stBit.b0)
	#define		SMT_R_ALE	(((volatile union SMT_BITCTL *)SMT_R_P2PORT)->stBit.b5)
	#define		SMT_R_CLE	(((volatile union SMT_BITCTL *)SMT_R_P2PORT)->stBit.b4)
	#define		SMT_R_WP	(((volatile union SMT_BITCTL *)SMT_R_KIOPORT)->stBit.b5)
	#define		SMT_R_RB	(((volatile union SMT_BITCTL *)SMT_R_KIOPORT)->stBit.b6)
	#define		SMT_R_WPS	0x1

	#define		SMT_R_DATAIO	((volatile unsigned char *)SMT_R_AREA15)	//L04Dmt

#endif


// *** K62 INTERRUPT SETTING *** //
#define		SMT_R_PILVL	((volatile union SMT_COMMSTR *)0x0040260L)	// Level
#define		SMT_R_PIENB	((volatile union SMT_COMMSTR *)0x0040270L)	// Enable
#define		SMT_R_PIFLG	((volatile union SMT_COMMSTR *)0x0040280L)	// Flag
#define		SMT_R_PISEL	((volatile union SMT_COMMSTR *)0x00402c6L)	// Select
#define		SMT_R_PI_HL	((volatile union SMT_COMMSTR *)0x00402c8L)	// High/Low
#define		SMT_R_PI_EL	((volatile union SMT_COMMSTR *)0x00402c9L)	// Edge/Level

/*------------------------------------------------------*/
/*	SMART MEDIA CONTROL COMMAND 						*/
/*------------------------------------------------------*/
#define		SMT_C_MDRESET	0xFF				// Reset command
#define		SMT_C_MIDREAD	0x90				// ID read command
#define		SMT_C_STSREAD	0x70				// Status read command
#define		SMT_C_ERASE_1	0x60				// Block erase command (1st cycle)
#define		SMT_C_ERASE_2	0xD0				//                     (2nd cycle)
#define		SMT_C_DREAD_1	0x00				// Read(1) command
#define		SMT_C_DREAD_2	0x01				// Read(2) command
#define		SMT_C_DREAD_3	0x50				// Read(3) command
#define		SMT_C_SDATINP	0x80				// Serial data input command
#define		SMT_C_PROGRAM	0x10				// Page program command
#define		SMT_C_DMYADDR	0x00				// Dummy address (ID READ)

/*------------------------------------------------------*/
/*	MACRO												*/
/*------------------------------------------------------*/
#define		SMT_AVERAGE_FAST	(double)333.331427
#define		SMT_AVERAGE_SLOW	(double)1166.660912
#define		SMT_AVERAGE		SMT_AVERAGE_FAST

#define		SMT_M_AVRTIM(n)	(double)(1000 / n * SMT_AVERAGE / 50)
#define		SMT_M_US2CNT(n)	(unsigned long)((double)n * 1000 / SMT_M_AVRTIM(40))
#define		SMT_M_MS2CNT(n)	(unsigned long)((double)n * 1000000 / SMT_M_AVRTIM(40))

#define		SMT_M_INTDISABLE	asm("pushn %r0\n ld.w %r0, %psr\n and %r0, 0x2f\n ld.w %psr, %r0\n popn  %r0")
#define		SMT_M_INTENABLE	asm("pushn %r0\n ld.w %r0, %psr\n   or %r0, 0x10\n ld.w %psr, %r0\n popn  %r0")


/********************************************************/
/*	STRUCTURE											*/
/********************************************************/
/*------------------------------------------------------*/
/*	PROGRAM / BLOCK ERASE STATUS CHECK 					*/
/*------------------------------------------------------*/
union	SMT_STATUS{
	unsigned char	bByte;
	struct{
		unsigned char	bPF:1;				// D0   : Pass / Fail
		unsigned char	bRSV:5;				// D1-5 : (RESERVED)
		unsigned char	bRB:1;				// D6   : Busy / Ready
		unsigned char	bWP:1;				// D7   : Write Protected
	}stBit;
};

/*------------------------------------------------------*/
/*	SMART MEDIA CONTROL 								*/
/*------------------------------------------------------*/
union	SMT_BITCTL{
	unsigned char	bByte;
	struct{
		unsigned char	b0:1;
		unsigned char	b1:1;
		unsigned char	b2:1;
		unsigned char	b3:1;
		unsigned char	b4:1;
		unsigned char	b5:1;
		unsigned char	b6:1;
		unsigned char	b7:1;
	}stBit;
};


/*------------------------------------------------------*/
/*	PROLIX AREA BUFFER									*/
/*------------------------------------------------------*/
union	SMT_PROLIX_BUFF{
	///////////////////
	/// FLAT BUFFER ///
	///////////////////
	unsigned char	bFlatBuff[SMT_S_PROLIX];

	///////////////////////
	/// CIS DATA BUFFER ///
	///////////////////////
	struct{
		unsigned char	bFnSelInf[4];			// Function Select Information Area
		unsigned char	bInvDatFlg;			// Invalid Data Flag Area
		unsigned char	bRsv1;				// (RESERVED) : 0xFF
		unsigned char	bRsv2[2];			// (RESERVED) : 0x00
		unsigned char	bEcc2[3];			// ECC Area-2
		unsigned char	bRsv3[2];			// (RESERVED) : 0x00
		unsigned char	bEcc1[3];			// ECC Area-1
	}stCisBuff;

	////////////////////
	///  DATA BUFFER ///
	////////////////////
	struct{
		unsigned char	bRsv1[4];			// (RESERVED)
		unsigned char	bDatSts;			// Data Status Area
		unsigned char	bBlkSts;			// Block Status Area
		unsigned char	bBlkAdr1[2];			// Block Address Area-1
		unsigned char	bEcc2[3];			// ECC Area-2
		unsigned char	bBlkAdr2[2];			// Block Address Area-2
		unsigned char	bEcc1[3];			// ECC Area-1
	}stDatBuff;
};

/********************************************************/
/*	PROTOTYPE					*/
/********************************************************/
extern	char	smtCardDetect(void);
extern	char	smtWriteProtect(void);
extern	int	smtMediaReset(void);
extern	int	smtStatusRead(unsigned char *);
extern	int	smtIdRead(unsigned char *, unsigned char *);
extern	int	smtBlockErase(unsigned long);
extern	int	smtPageRead(unsigned char, unsigned long, unsigned long, char *);
extern	int	smtPageProgram(unsigned long, unsigned long, const char *, unsigned char);
extern	int	smtProlixProgram(unsigned long, unsigned long, const char *);
extern	int	smtReadyCheck(unsigned long);
extern	int	smtEraseChk(void);

#endif	//__SMART_MEDIA_CONTROL_LIBRARY__

/***** End of file *****/